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17 lines
640 B
C
17 lines
640 B
C
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#pragma once
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struct mip_driver_stm32 {
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// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
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// HCLK range DIVIDER mdc_cr VALUE
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// -------------------------------------
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// -1 <-- tell driver to guess the value
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// 60-100 MHz HCLK/42 0
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// 100-150 MHz HCLK/62 1
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// 20-35 MHz HCLK/16 2
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// 35-60 MHz HCLK/26 3
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// 150-216 MHz HCLK/102 4 <-- value for Nucleo-F* on max speed
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// 216-310 MHz HCLK/124 5
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// 110, 111 Reserved
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int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4, 5
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};
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