2021-05-13 21:56:14 +08:00
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.cpu cortex-m7
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2021-05-18 00:36:57 +08:00
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.fpu softvfp
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.syntax unified
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2021-05-11 16:12:06 +08:00
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.thumb
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2021-05-18 00:36:57 +08:00
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.section .vectortab,"a",%progbits
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// Cortex-M7 interrupt handlers
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2021-05-12 03:44:14 +08:00
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.word _estack // 0 Stack top address
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.word _reset // 1 Reset
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.word pass // 2 NMI
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.word halt // 3 Hard Fault
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.word halt // 4 MM Fault
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.word halt // 5 Bus Fault
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.word halt // 6 Usage Fault
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2021-05-18 00:36:57 +08:00
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.word 0 // 7 RESERVED
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.word 0 // 8 RESERVED
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.word 0 // 9 RESERVED
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.word 0 // 10 RESERVED
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.word SVC_Handler // 11 SV call
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2021-05-12 03:44:14 +08:00
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.word halt // 12 Debug reserved
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2021-05-18 00:36:57 +08:00
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.word 0 // 13 RESERVED
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.word PendSV_Handler // 14 PendSV
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.word SysTick_Handler // 15 SysTick
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// 98 STM32 handlers
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2021-05-12 03:44:14 +08:00
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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2021-05-18 00:36:57 +08:00
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,ETH_IRQHandler,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt,halt,halt
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.word halt,halt,halt,halt,halt,halt,halt,halt
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2021-05-11 16:12:06 +08:00
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2021-05-18 00:36:57 +08:00
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.section .text
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2021-05-11 16:12:06 +08:00
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.global _reset
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_reset:
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2021-05-18 00:36:57 +08:00
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ldr sp, =_estack
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bl main
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b .
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halt: b .
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pass: bx lr
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