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62 lines
2.3 KiB
Batchfile
62 lines
2.3 KiB
Batchfile
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/*
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* Copyright (c) 2015-2016, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* ======== MSP_EXP432P401R.cmd ========
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* Define the memory block start/length for the MSP_EXP432P401R M4
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*/
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MEMORY
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{
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MAIN (RX) : origin = 0x00000000, length = 0x00040000
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INFO (RX) : origin = 0x00200000, length = 0x00004000
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SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000
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SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000
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}
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/* Section allocation in memory */
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SECTIONS
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{
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.text : > MAIN
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.const : > MAIN
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.cinit : > MAIN
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.pinit : > MAIN
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.data : > SRAM_DATA
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.bss : > SRAM_DATA
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.sysmem : > SRAM_DATA
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.stack : > SRAM_DATA (HIGH)
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}
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/* Symbolic definition of the WDTCTL register for RTS */
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WDTCTL_SYM = 0x4000480C;
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