mirror of
https://github.com/cesanta/mongoose.git
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Build w/semihosting support
This commit is contained in:
parent
09b1d6aa72
commit
2bb11888d5
@ -1,6 +1,13 @@
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#pragma once
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#define FREERTOS_IP_CONFIG_H
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#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1
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#define ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM 1
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#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 1
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#define ipconfigZERO_COPY_RX_DRIVER 1
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#define ipconfigZERO_COPY_TX_DRIVER 1
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#define ipconfigUSE_LINKED_RX_MESSAGES 1
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extern void vLoggingPrintf(const char *pcFormatString, ...);
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#define ipconfigHAS_DEBUG_PRINTF 0
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#if (ipconfigHAS_DEBUG_PRINTF == 1)
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@ -13,7 +20,6 @@ extern void vLoggingPrintf(const char *pcFormatString, ...);
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#endif
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#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN
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#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 1
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#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME (2000)
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#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME (5000)
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#define ipconfigUSE_LLMNR (0)
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@ -24,9 +30,8 @@ extern void vLoggingPrintf(const char *pcFormatString, ...);
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#define ipconfigDNS_REQUEST_ATTEMPTS (2)
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#define ipconfigIP_TASK_PRIORITY (configMAX_PRIORITIES - 2)
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#define ipconfigIP_TASK_STACK_SIZE_WORDS (configMINIMAL_STACK_SIZE * 5)
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extern UBaseType_t uxRand();
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#define ipconfigRAND32() uxRand()
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#define ipconfigUSE_NETWORK_EVENT_HOOK 1
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#define ipconfigUSE_NETWORK_EVENT_HOOK 0
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#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS (5000 / portTICK_PERIOD_MS)
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#define ipconfigUSE_DHCP 0
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#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD (120000 / portTICK_PERIOD_MS)
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@ -48,7 +53,6 @@ extern UBaseType_t uxRand();
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#define ipconfigSUPPORT_OUTGOING_PINGS 0
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#define ipconfigSUPPORT_SELECT_FUNCTION 1
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#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1
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#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1
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#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY (20 / portTICK_PERIOD_MS)
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#define ipconfigPACKET_FILLER_SIZE 2
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#define ipconfigTCP_WIN_SEG_COUNT 240
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@ -3,13 +3,19 @@ PROG = firmware
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ARCH = stm32f7
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ROOT = $(realpath $(CURDIR)/../..)
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DOCKER ?= docker run -it --rm -v $(ROOT):$(ROOT) -w $(CURDIR) mdashnet/armgcc
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MONGOOSE_OPTS = -DMG_ENABLE_LINES=1 -DMG_ENABLE_LOG=0 -DMG_ARCH=MG_ARCH_FREERTOS_TCP -DMG_ENABLE_FS=0
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MONGOOSE_OPTS = -DMG_ARCH=MG_ARCH_FREERTOS_TCP -DMG_ENABLE_FS=0 -DMG_ENABLE_LINES=1
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MCU = -mcpu=cortex-m7 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard
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INCS = -I. -I$(ROOT) -I$(ARCH) -I$(ROOT)/test/freertos-kernel/include -I$(ROOT)/test/freertos-tcp/include -I$(ROOT)/test/freertos-tcp/portable/Compiler/GCC
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CFLAGS = -W -Wall -Werror -Wno-format -Wno-address-of-packed-member -Os -g $(MCU) -fdata-sections -ffunction-sections $(INCS) $(MONGOOSE_OPTS) $(EXTRA)
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LDFLAGS = $(MCU) -specs=nano.specs -T$(ARCH)/link.ld -nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections
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INCS = -I. -I$(ROOT) -I$(ARCH) -I$(ROOT)/test/freertos-kernel/include -I$(ROOT)/test/freertos-tcp/include -I$(ROOT)/test/freertos-tcp/portable/Compiler/GCC -I$(ROOT)/test/freertos-tcp/portable/NetworkInterface/include -IHAL
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NETFLAGS = -DSEMIHOSTING -DSTM32F7xx -DSTM32F746xx -Wno-sign-compare -Wno-unused-function -Wno-cpp
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CFLAGS = -W -Wall -Werror -Wno-format -Wno-address-of-packed-member -Os -g $(MCU) -fdata-sections -ffunction-sections $(INCS) $(MONGOOSE_OPTS) $(NETFLAGS) $(EXTRA)
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#LFLAGS = $(MCU) --static -Wl,-Map=$(TARGET).map -Wl,--gc-sections -lc -lgcc -T$(ARCH)/link.ld #-nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections
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LFLAGS = $(MCU) --static -Wl,-Map=$(TARGET).map -Wl,--gc-sections -specs rdimon.specs -lrdimon -lc -lgcc -T$(ARCH)/link.ld #-nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections
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SRCS = main.c $(wildcard $(ROOT)/test/freertos-kernel/*.c) $(wildcard $(ROOT)/test/freertos-tcp/*.c)
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SRCS += $(ROOT)/test/freertos-kernel/portable/MemMang/heap_4.c $(ARCH)/port.c
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SRCS += $(ROOT)/test/freertos-tcp/portable/BufferManagement/BufferAllocation_2.c
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SRCS += $(wildcard $(ROOT)/test/freertos-tcp/portable/NetworkInterface/STM32Fxx/*.c)
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SRCS += $(wildcard $(ROOT)/test/freertos-tcp/portable/NetworkInterface/Common/*.c)
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SRCS += $(wildcard HAL/*.c)
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OBJS = obj/boot.o $(SRCS:%.c=obj/%.o) obj/mongoose.o # ORDER MATTERS - boot (vector table) first!
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all: $(PROG).hex
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@ -21,7 +27,7 @@ $(PROG).hex: $(PROG).bin
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$(DOCKER) arm-none-eabi-objcopy -I binary -O ihex --change-address 0x8000000 $< $@
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$(PROG).elf: $(OBJS)
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$(DOCKER) arm-none-eabi-gcc $(OBJS) $(LDFLAGS) -o $@
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$(DOCKER) arm-none-eabi-gcc $(OBJS) $(LFLAGS) -o $@
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obj/%.o: %.c
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@mkdir -p $(dir $@)
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@ -37,13 +43,18 @@ obj/mongoose.o:
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flash: $(PROG).bin
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st-flash --reset write $< 0x8000000
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openocd:
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openocd -f openocd.cfg
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gdb: $(PROG).elf
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arm-none-eabi-gdb \
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-ex 'set confirm off' \
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-ex 'target extended-remote :4242' \
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-ex 'target extended-remote :3333' \
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-ex 'monitor arm semihosting enable' \
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-ex 'monitor reset halt' \
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-ex 'load firmware.elf' \
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-ex 'load' \
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-ex 'monitor reset init' \
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-ex 'r' \
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$<
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clean:
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@ -27,54 +27,40 @@ static void server(void *args) {
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static void blinker(void *args) {
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uint16_t pin = ((char *) args)[0] == '1' ? LED2 : LED3;
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int ms = pin == LED2 ? 750 : 1500;
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int ms = pin == LED2 ? 750 : 1130;
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for (;;) {
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gpio_toggle(pin);
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vTaskDelay(pdMS_TO_TICKS(ms));
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LOG(LL_INFO, ("blink %s", (char *) args));
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}
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}
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int main(void) {
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init_hardware();
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#ifdef SEMIHOSTING
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extern void initialise_monitor_handles(void);
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initialise_monitor_handles();
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#endif
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xTaskCreate(server, "server", 4096, NULL, configMAX_PRIORITIES - 1, NULL);
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xTaskCreate(blinker, "blinker", 128, "1", configMAX_PRIORITIES - 1, NULL);
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xTaskCreate(blinker, "blinker", 128, "2", configMAX_PRIORITIES - 1, NULL);
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xTaskCreate(blinker, "blinker", 256, "1", configMAX_PRIORITIES - 1, NULL);
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xTaskCreate(blinker, "blinker", 256, "2", configMAX_PRIORITIES - 1, NULL);
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vTaskStartScheduler(); // This blocks
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return 0; // Unreachable
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}
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// clang-format off
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// Stubs for FreeRTOS-TCP network interface
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BaseType_t xNetworkInterfaceInitialise(void) { return 0; }
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BaseType_t xNetworkInterfaceOutput(NetworkBufferDescriptor_t *const pxNetworkBuffer, BaseType_t xReleaseAfterSend) { (void)pxNetworkBuffer; (void) xReleaseAfterSend; return 0; }
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void vNetworkInterfaceAllocateRAMToBuffers(NetworkBufferDescriptor_t pxNetworkBuffers[ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS]) { (void) pxNetworkBuffers; }
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BaseType_t xGetPhyLinkStatus(void) { return 0; }
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void pxGetNetworkBufferWithDescriptor(void){}
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void vReleaseNetworkBufferAndDescriptor(void){}
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void xNetworkBuffersInitialise(void) {}
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void vApplicationIPNetworkEventHook(eIPCallbackEvent_t ev){(void) ev;}
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BaseType_t xApplicationGetRandomNumber( uint32_t * p){ *p = 0; return 1;}
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uint32_t ulApplicationGetNextSequenceNumber(uint32_t a, uint16_t b, uint32_t c, uint16_t d){return a^b^c^d;}
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void xBufferAllocFixedSize(void){}
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// Libc stubs
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extern uint32_t _data_end;
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void *_sbrk(int incr) {
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static unsigned char *heap = NULL;
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unsigned char *prev_heap;
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if (heap == NULL) heap = (unsigned char *) &_data_end;
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prev_heap = heap;
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heap += incr;
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return prev_heap;
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uint32_t ulApplicationGetNextSequenceNumber(uint32_t a, uint16_t b, uint32_t c,
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uint16_t d) {
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return a ^ b ^ c ^ d;
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}
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BaseType_t xApplicationGetRandomNumber(uint32_t *p) {
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*p = 0;
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return 1;
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}
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uint32_t SystemCoreClock = 216000000;
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uint32_t HAL_GetTick(void) {
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return 250;
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}
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uint32_t HAL_RCC_GetHCLKFreq(void) {
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return SystemCoreClock;
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}
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int _close(int fd) { (void) fd; return -1; }
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int _fstat(int fd, struct stat *st) { (void) fd; st->st_mode = S_IFCHR; return 0; }
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int _isatty(int fd) { (void) fd; return 0; }
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int _lseek(int fd, int ptr, int dir) { (void) fd; (void) ptr; (void) dir; return 0; }
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void _exit(int status) { (void) status; __asm("BKPT #0"); for(;;); }
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void _kill(int pid, int sig) { (void) pid; (void) sig; }
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int _getpid(void) { return -1; }
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int _write(int fd, char *ptr, int len) { (void) fd; (void) ptr; (void) len; return -1; }
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int _read(int fd, char *ptr, int len) { (void) fd; (void) ptr; (void) len; return -1; }
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int _gettimeofday(struct timeval *tv, void *tz) { (void) tz; unsigned long ms = mg_millis(); tv->tv_sec = ms / 1000; tv->tv_usec = ms % 1000; return 0;};
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// clang-format on
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#define configUSE_TASK_NOTIFICATIONS 1
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#define configUSE_MUTEXES 0
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#define configUSE_RECURSIVE_MUTEXES 0
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#define configUSE_COUNTING_SEMAPHORES 0
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#define configUSE_COUNTING_SEMAPHORES 1
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#define configQUEUE_REGISTRY_SIZE 10
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#define configUSE_QUEUE_SETS 0
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#define configUSE_QUEUE_SETS 1
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#define configUSE_TIME_SLICING 0
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#define configUSE_NEWLIB_REENTRANT 0
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#define configENABLE_BACKWARD_COMPATIBILITY 0
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@ -79,4 +79,4 @@
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#define vPortSVCHandler SVC_handler
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#define xPortPendSVHandler pending_SV_handler
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#define xPortSysTickHandler SysTick_handler
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#define xPortSysTickHandler SysTick_handler
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}
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static inline void init_ram(void) {
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extern uint32_t _bss_start, _bss_end;
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extern uint32_t __bss_start__, __bss_end__;
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extern uint32_t _data_start, _data_end, _data_flash_start;
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memset(&_bss_start, 0, ((char *) &_bss_end - (char *) &_bss_start));
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memset(&__bss_start__, 0, ((char *) &__bss_end__ - (char *) &__bss_start__));
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memcpy(&_data_start, &_data_flash_start,
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((char *) &_data_end - (char *) &_data_start));
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}
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.rodata : { *(.rodata*) } > rom
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.bss : {
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_bss_start = .;
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__bss_start__ = .;
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*(.bss SORT(.bss.*) COMMON)
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_bss_end = .;
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__bss_end__ = .;
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} > ram
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.data : {
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@ -21,3 +21,5 @@ SECTIONS {
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} > ram AT > rom
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_data_flash_start = LOADADDR(.data);
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}
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__end__ = _data_end;
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end = _data_end;
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@ -0,0 +1,122 @@
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/**
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******************************************************************************
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* @file system_stm32f7xx.h
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* @author MCD Application Team
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* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
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******************************************************************************
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* @attention
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*
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* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without
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*modification, are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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*notice, this list of conditions and the following disclaimer in the
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*documentation and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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*ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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*LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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*CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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*SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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*INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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*CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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*ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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*POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************
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*/
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/** @addtogroup CMSIS
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* @{
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*/
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/** @addtogroup stm32f7xx_system
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* @{
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*/
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/**
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* @brief Define to prevent recursive inclusion
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*/
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#ifndef __SYSTEM_STM32F7XX_H
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#define __SYSTEM_STM32F7XX_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/** @addtogroup STM32F7xx_System_Includes
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F7xx_System_Exported_Variables
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* @{
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*/
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/* The SystemCoreClock variable is updated in three ways:
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1) by calling CMSIS function SystemCoreClockUpdate()
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2) by calling HAL API function HAL_RCC_GetSysClockFreq()
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3) each time HAL_RCC_ClockConfig() is called to configure the system clock
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frequency Note: If you use this function to configure the system clock; then
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there is no need to call the 2 first functions listed above, since
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SystemCoreClock variable is updated automatically.
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*/
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
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extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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/**
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* @}
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*/
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/** @addtogroup STM32F7xx_System_Exported_Constants
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F7xx_System_Exported_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @addtogroup STM32F7xx_System_Exported_Functions
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* @{
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*/
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extern void SystemInit(void);
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extern void SystemCoreClockUpdate(void);
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SYSTEM_STM32F7XX_H */
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/**
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* @}
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*/
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/**
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* @}
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*/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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