Build w/semihosting support

This commit is contained in:
cpq 2021-05-13 22:03:46 +01:00
parent 09b1d6aa72
commit 2bb11888d5
7 changed files with 179 additions and 54 deletions

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@ -1,6 +1,13 @@
#pragma once #pragma once
#define FREERTOS_IP_CONFIG_H #define FREERTOS_IP_CONFIG_H
#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1
#define ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM 1
#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 1
#define ipconfigZERO_COPY_RX_DRIVER 1
#define ipconfigZERO_COPY_TX_DRIVER 1
#define ipconfigUSE_LINKED_RX_MESSAGES 1
extern void vLoggingPrintf(const char *pcFormatString, ...); extern void vLoggingPrintf(const char *pcFormatString, ...);
#define ipconfigHAS_DEBUG_PRINTF 0 #define ipconfigHAS_DEBUG_PRINTF 0
#if (ipconfigHAS_DEBUG_PRINTF == 1) #if (ipconfigHAS_DEBUG_PRINTF == 1)
@ -13,7 +20,6 @@ extern void vLoggingPrintf(const char *pcFormatString, ...);
#endif #endif
#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN #define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN
#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 1
#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME (2000) #define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME (2000)
#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME (5000) #define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME (5000)
#define ipconfigUSE_LLMNR (0) #define ipconfigUSE_LLMNR (0)
@ -24,9 +30,8 @@ extern void vLoggingPrintf(const char *pcFormatString, ...);
#define ipconfigDNS_REQUEST_ATTEMPTS (2) #define ipconfigDNS_REQUEST_ATTEMPTS (2)
#define ipconfigIP_TASK_PRIORITY (configMAX_PRIORITIES - 2) #define ipconfigIP_TASK_PRIORITY (configMAX_PRIORITIES - 2)
#define ipconfigIP_TASK_STACK_SIZE_WORDS (configMINIMAL_STACK_SIZE * 5) #define ipconfigIP_TASK_STACK_SIZE_WORDS (configMINIMAL_STACK_SIZE * 5)
extern UBaseType_t uxRand();
#define ipconfigRAND32() uxRand() #define ipconfigRAND32() uxRand()
#define ipconfigUSE_NETWORK_EVENT_HOOK 1 #define ipconfigUSE_NETWORK_EVENT_HOOK 0
#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS (5000 / portTICK_PERIOD_MS) #define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS (5000 / portTICK_PERIOD_MS)
#define ipconfigUSE_DHCP 0 #define ipconfigUSE_DHCP 0
#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD (120000 / portTICK_PERIOD_MS) #define ipconfigMAXIMUM_DISCOVER_TX_PERIOD (120000 / portTICK_PERIOD_MS)
@ -48,7 +53,6 @@ extern UBaseType_t uxRand();
#define ipconfigSUPPORT_OUTGOING_PINGS 0 #define ipconfigSUPPORT_OUTGOING_PINGS 0
#define ipconfigSUPPORT_SELECT_FUNCTION 1 #define ipconfigSUPPORT_SELECT_FUNCTION 1
#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1 #define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1
#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES 1
#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY (20 / portTICK_PERIOD_MS) #define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY (20 / portTICK_PERIOD_MS)
#define ipconfigPACKET_FILLER_SIZE 2 #define ipconfigPACKET_FILLER_SIZE 2
#define ipconfigTCP_WIN_SEG_COUNT 240 #define ipconfigTCP_WIN_SEG_COUNT 240

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@ -3,13 +3,19 @@ PROG = firmware
ARCH = stm32f7 ARCH = stm32f7
ROOT = $(realpath $(CURDIR)/../..) ROOT = $(realpath $(CURDIR)/../..)
DOCKER ?= docker run -it --rm -v $(ROOT):$(ROOT) -w $(CURDIR) mdashnet/armgcc DOCKER ?= docker run -it --rm -v $(ROOT):$(ROOT) -w $(CURDIR) mdashnet/armgcc
MONGOOSE_OPTS = -DMG_ENABLE_LINES=1 -DMG_ENABLE_LOG=0 -DMG_ARCH=MG_ARCH_FREERTOS_TCP -DMG_ENABLE_FS=0 MONGOOSE_OPTS = -DMG_ARCH=MG_ARCH_FREERTOS_TCP -DMG_ENABLE_FS=0 -DMG_ENABLE_LINES=1
MCU = -mcpu=cortex-m7 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard MCU = -mcpu=cortex-m7 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=hard
INCS = -I. -I$(ROOT) -I$(ARCH) -I$(ROOT)/test/freertos-kernel/include -I$(ROOT)/test/freertos-tcp/include -I$(ROOT)/test/freertos-tcp/portable/Compiler/GCC INCS = -I. -I$(ROOT) -I$(ARCH) -I$(ROOT)/test/freertos-kernel/include -I$(ROOT)/test/freertos-tcp/include -I$(ROOT)/test/freertos-tcp/portable/Compiler/GCC -I$(ROOT)/test/freertos-tcp/portable/NetworkInterface/include -IHAL
CFLAGS = -W -Wall -Werror -Wno-format -Wno-address-of-packed-member -Os -g $(MCU) -fdata-sections -ffunction-sections $(INCS) $(MONGOOSE_OPTS) $(EXTRA) NETFLAGS = -DSEMIHOSTING -DSTM32F7xx -DSTM32F746xx -Wno-sign-compare -Wno-unused-function -Wno-cpp
LDFLAGS = $(MCU) -specs=nano.specs -T$(ARCH)/link.ld -nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections CFLAGS = -W -Wall -Werror -Wno-format -Wno-address-of-packed-member -Os -g $(MCU) -fdata-sections -ffunction-sections $(INCS) $(MONGOOSE_OPTS) $(NETFLAGS) $(EXTRA)
#LFLAGS = $(MCU) --static -Wl,-Map=$(TARGET).map -Wl,--gc-sections -lc -lgcc -T$(ARCH)/link.ld #-nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections
LFLAGS = $(MCU) --static -Wl,-Map=$(TARGET).map -Wl,--gc-sections -specs rdimon.specs -lrdimon -lc -lgcc -T$(ARCH)/link.ld #-nostartfiles -lgcc #-Wl,-Map=obj/$(PROG).map,--cref -Wl,--gc-sections
SRCS = main.c $(wildcard $(ROOT)/test/freertos-kernel/*.c) $(wildcard $(ROOT)/test/freertos-tcp/*.c) SRCS = main.c $(wildcard $(ROOT)/test/freertos-kernel/*.c) $(wildcard $(ROOT)/test/freertos-tcp/*.c)
SRCS += $(ROOT)/test/freertos-kernel/portable/MemMang/heap_4.c $(ARCH)/port.c SRCS += $(ROOT)/test/freertos-kernel/portable/MemMang/heap_4.c $(ARCH)/port.c
SRCS += $(ROOT)/test/freertos-tcp/portable/BufferManagement/BufferAllocation_2.c
SRCS += $(wildcard $(ROOT)/test/freertos-tcp/portable/NetworkInterface/STM32Fxx/*.c)
SRCS += $(wildcard $(ROOT)/test/freertos-tcp/portable/NetworkInterface/Common/*.c)
SRCS += $(wildcard HAL/*.c)
OBJS = obj/boot.o $(SRCS:%.c=obj/%.o) obj/mongoose.o # ORDER MATTERS - boot (vector table) first! OBJS = obj/boot.o $(SRCS:%.c=obj/%.o) obj/mongoose.o # ORDER MATTERS - boot (vector table) first!
all: $(PROG).hex all: $(PROG).hex
@ -21,7 +27,7 @@ $(PROG).hex: $(PROG).bin
$(DOCKER) arm-none-eabi-objcopy -I binary -O ihex --change-address 0x8000000 $< $@ $(DOCKER) arm-none-eabi-objcopy -I binary -O ihex --change-address 0x8000000 $< $@
$(PROG).elf: $(OBJS) $(PROG).elf: $(OBJS)
$(DOCKER) arm-none-eabi-gcc $(OBJS) $(LDFLAGS) -o $@ $(DOCKER) arm-none-eabi-gcc $(OBJS) $(LFLAGS) -o $@
obj/%.o: %.c obj/%.o: %.c
@mkdir -p $(dir $@) @mkdir -p $(dir $@)
@ -37,13 +43,18 @@ obj/mongoose.o:
flash: $(PROG).bin flash: $(PROG).bin
st-flash --reset write $< 0x8000000 st-flash --reset write $< 0x8000000
openocd:
openocd -f openocd.cfg
gdb: $(PROG).elf gdb: $(PROG).elf
arm-none-eabi-gdb \ arm-none-eabi-gdb \
-ex 'set confirm off' \ -ex 'set confirm off' \
-ex 'target extended-remote :4242' \ -ex 'target extended-remote :3333' \
-ex 'monitor arm semihosting enable' \
-ex 'monitor reset halt' \ -ex 'monitor reset halt' \
-ex 'load firmware.elf' \ -ex 'load' \
-ex 'monitor reset init' \ -ex 'monitor reset init' \
-ex 'r' \
$< $<
clean: clean:

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@ -27,54 +27,40 @@ static void server(void *args) {
static void blinker(void *args) { static void blinker(void *args) {
uint16_t pin = ((char *) args)[0] == '1' ? LED2 : LED3; uint16_t pin = ((char *) args)[0] == '1' ? LED2 : LED3;
int ms = pin == LED2 ? 750 : 1500; int ms = pin == LED2 ? 750 : 1130;
for (;;) { for (;;) {
gpio_toggle(pin); gpio_toggle(pin);
vTaskDelay(pdMS_TO_TICKS(ms)); vTaskDelay(pdMS_TO_TICKS(ms));
LOG(LL_INFO, ("blink %s", (char *) args));
} }
} }
int main(void) { int main(void) {
init_hardware(); init_hardware();
#ifdef SEMIHOSTING
extern void initialise_monitor_handles(void);
initialise_monitor_handles();
#endif
xTaskCreate(server, "server", 4096, NULL, configMAX_PRIORITIES - 1, NULL); xTaskCreate(server, "server", 4096, NULL, configMAX_PRIORITIES - 1, NULL);
xTaskCreate(blinker, "blinker", 128, "1", configMAX_PRIORITIES - 1, NULL); xTaskCreate(blinker, "blinker", 256, "1", configMAX_PRIORITIES - 1, NULL);
xTaskCreate(blinker, "blinker", 128, "2", configMAX_PRIORITIES - 1, NULL); xTaskCreate(blinker, "blinker", 256, "2", configMAX_PRIORITIES - 1, NULL);
vTaskStartScheduler(); // This blocks vTaskStartScheduler(); // This blocks
return 0; // Unreachable return 0; // Unreachable
} }
// clang-format off
// Stubs for FreeRTOS-TCP network interface // Stubs for FreeRTOS-TCP network interface
BaseType_t xNetworkInterfaceInitialise(void) { return 0; } uint32_t ulApplicationGetNextSequenceNumber(uint32_t a, uint16_t b, uint32_t c,
BaseType_t xNetworkInterfaceOutput(NetworkBufferDescriptor_t *const pxNetworkBuffer, BaseType_t xReleaseAfterSend) { (void)pxNetworkBuffer; (void) xReleaseAfterSend; return 0; } uint16_t d) {
void vNetworkInterfaceAllocateRAMToBuffers(NetworkBufferDescriptor_t pxNetworkBuffers[ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS]) { (void) pxNetworkBuffers; } return a ^ b ^ c ^ d;
BaseType_t xGetPhyLinkStatus(void) { return 0; } }
void pxGetNetworkBufferWithDescriptor(void){} BaseType_t xApplicationGetRandomNumber(uint32_t *p) {
void vReleaseNetworkBufferAndDescriptor(void){} *p = 0;
void xNetworkBuffersInitialise(void) {} return 1;
void vApplicationIPNetworkEventHook(eIPCallbackEvent_t ev){(void) ev;} }
BaseType_t xApplicationGetRandomNumber( uint32_t * p){ *p = 0; return 1;} uint32_t SystemCoreClock = 216000000;
uint32_t ulApplicationGetNextSequenceNumber(uint32_t a, uint16_t b, uint32_t c, uint16_t d){return a^b^c^d;} uint32_t HAL_GetTick(void) {
void xBufferAllocFixedSize(void){} return 250;
}
// Libc stubs uint32_t HAL_RCC_GetHCLKFreq(void) {
extern uint32_t _data_end; return SystemCoreClock;
void *_sbrk(int incr) {
static unsigned char *heap = NULL;
unsigned char *prev_heap;
if (heap == NULL) heap = (unsigned char *) &_data_end;
prev_heap = heap;
heap += incr;
return prev_heap;
} }
int _close(int fd) { (void) fd; return -1; }
int _fstat(int fd, struct stat *st) { (void) fd; st->st_mode = S_IFCHR; return 0; }
int _isatty(int fd) { (void) fd; return 0; }
int _lseek(int fd, int ptr, int dir) { (void) fd; (void) ptr; (void) dir; return 0; }
void _exit(int status) { (void) status; __asm("BKPT #0"); for(;;); }
void _kill(int pid, int sig) { (void) pid; (void) sig; }
int _getpid(void) { return -1; }
int _write(int fd, char *ptr, int len) { (void) fd; (void) ptr; (void) len; return -1; }
int _read(int fd, char *ptr, int len) { (void) fd; (void) ptr; (void) len; return -1; }
int _gettimeofday(struct timeval *tv, void *tz) { (void) tz; unsigned long ms = mg_millis(); tv->tv_sec = ms / 1000; tv->tv_usec = ms % 1000; return 0;};
// clang-format on

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@ -14,9 +14,9 @@
#define configUSE_TASK_NOTIFICATIONS 1 #define configUSE_TASK_NOTIFICATIONS 1
#define configUSE_MUTEXES 0 #define configUSE_MUTEXES 0
#define configUSE_RECURSIVE_MUTEXES 0 #define configUSE_RECURSIVE_MUTEXES 0
#define configUSE_COUNTING_SEMAPHORES 0 #define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 10 #define configQUEUE_REGISTRY_SIZE 10
#define configUSE_QUEUE_SETS 0 #define configUSE_QUEUE_SETS 1
#define configUSE_TIME_SLICING 0 #define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0 #define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 0 #define configENABLE_BACKWARD_COMPATIBILITY 0
@ -79,4 +79,4 @@
#define vPortSVCHandler SVC_handler #define vPortSVCHandler SVC_handler
#define xPortPendSVHandler pending_SV_handler #define xPortPendSVHandler pending_SV_handler
#define xPortSysTickHandler SysTick_handler #define xPortSysTickHandler SysTick_handler

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@ -51,9 +51,9 @@ static inline void gpio_init(uint16_t pin, uint8_t state) {
} }
static inline void init_ram(void) { static inline void init_ram(void) {
extern uint32_t _bss_start, _bss_end; extern uint32_t __bss_start__, __bss_end__;
extern uint32_t _data_start, _data_end, _data_flash_start; extern uint32_t _data_start, _data_end, _data_flash_start;
memset(&_bss_start, 0, ((char *) &_bss_end - (char *) &_bss_start)); memset(&__bss_start__, 0, ((char *) &__bss_end__ - (char *) &__bss_start__));
memcpy(&_data_start, &_data_flash_start, memcpy(&_data_start, &_data_flash_start,
((char *) &_data_end - (char *) &_data_start)); ((char *) &_data_end - (char *) &_data_start));
} }

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@ -9,9 +9,9 @@ SECTIONS {
.rodata : { *(.rodata*) } > rom .rodata : { *(.rodata*) } > rom
.bss : { .bss : {
_bss_start = .; __bss_start__ = .;
*(.bss SORT(.bss.*) COMMON) *(.bss SORT(.bss.*) COMMON)
_bss_end = .; __bss_end__ = .;
} > ram } > ram
.data : { .data : {
@ -21,3 +21,5 @@ SECTIONS {
} > ram AT > rom } > ram AT > rom
_data_flash_start = LOADADDR(.data); _data_flash_start = LOADADDR(.data);
} }
__end__ = _data_end;
end = _data_end;

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@ -0,0 +1,122 @@
/**
******************************************************************************
* @file system_stm32f7xx.h
* @author MCD Application Team
* @brief CMSIS Cortex-M7 Device System Source File for STM32F7xx devices.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without
*modification, are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
*notice, this list of conditions and the following disclaimer in the
*documentation and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
*ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
*LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
*CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
*SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
*INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
*CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
*ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
*POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f7xx_system
* @{
*/
/**
* @brief Define to prevent recursive inclusion
*/
#ifndef __SYSTEM_STM32F7XX_H
#define __SYSTEM_STM32F7XX_H
#ifdef __cplusplus
extern "C" {
#endif
/** @addtogroup STM32F7xx_System_Includes
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F7xx_System_Exported_Variables
* @{
*/
/* The SystemCoreClock variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetSysClockFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock
frequency Note: If you use this function to configure the system clock; then
there is no need to call the 2 first functions listed above, since
SystemCoreClock variable is updated automatically.
*/
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
/**
* @}
*/
/** @addtogroup STM32F7xx_System_Exported_Constants
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F7xx_System_Exported_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F7xx_System_Exported_Functions
* @{
*/
extern void SystemInit(void);
extern void SystemCoreClockUpdate(void);
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /*__SYSTEM_STM32F7XX_H */
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/