From 3081d0766b042c88ccdcd1202b47aefaed61ff5d Mon Sep 17 00:00:00 2001 From: "Sergio R. Caprile" Date: Tue, 30 Jul 2024 14:05:09 -0300 Subject: [PATCH] Patch KSZ PHY for NXP --- examples/nxp/rt1060-evk-make-baremetal-builtin/hal.h | 2 +- examples/nxp/rt1060-evk-make-freertos-builtin/hal.h | 2 +- mongoose.c | 5 ++++- src/drivers/phy.c | 5 ++++- 4 files changed, 10 insertions(+), 4 deletions(-) diff --git a/examples/nxp/rt1060-evk-make-baremetal-builtin/hal.h b/examples/nxp/rt1060-evk-make-baremetal-builtin/hal.h index bfb0445c..5b549ae8 100644 --- a/examples/nxp/rt1060-evk-make-baremetal-builtin/hal.h +++ b/examples/nxp/rt1060-evk-make-baremetal-builtin/hal.h @@ -285,7 +285,7 @@ static inline void ethernet_init(void) { GPIO_SPEED_HIGH, GPIO_PULL_UP); gpio_mux_config(kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11, 3); // set for RXERR periph_mux_config(kIOMUXC_ENET_RXERR_SELECT_INPUT, - 1); // drive peripheral from B0_12 + 1); // drive peripheral from B1_11 gpio_pad_config(kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, GPIO_PULL_UP); gpio_mux_config(kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40, 4); // set for MDC diff --git a/examples/nxp/rt1060-evk-make-freertos-builtin/hal.h b/examples/nxp/rt1060-evk-make-freertos-builtin/hal.h index bfb0445c..5b549ae8 100644 --- a/examples/nxp/rt1060-evk-make-freertos-builtin/hal.h +++ b/examples/nxp/rt1060-evk-make-freertos-builtin/hal.h @@ -285,7 +285,7 @@ static inline void ethernet_init(void) { GPIO_SPEED_HIGH, GPIO_PULL_UP); gpio_mux_config(kIOMUXC_SW_MUX_CTL_PAD_GPIO_B1_11, 3); // set for RXERR periph_mux_config(kIOMUXC_ENET_RXERR_SELECT_INPUT, - 1); // drive peripheral from B0_12 + 1); // drive peripheral from B1_11 gpio_pad_config(kIOMUXC_SW_PAD_CTL_PAD_GPIO_B1_11, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, GPIO_PULL_UP); gpio_mux_config(kIOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_40, 4); // set for MDC diff --git a/mongoose.c b/mongoose.c index 3fe2704a..27673eb4 100644 --- a/mongoose.c +++ b/mongoose.c @@ -17174,7 +17174,7 @@ void mg_phy_init(struct mg_phy *phy, uint8_t phy_addr, uint8_t config) { MG_INFO(("PHY ID: %#04x %#04x (%s)", id1, id2, mg_phy_id_to_str(id1, id2))); if (id1 == MG_PHY_DP83x && id2 == MG_PHY_DP83867) { - phy->write_reg(phy_addr, 0x0d, 0x1f); // write 0x10d to IO_MUX_CFG (0x0170) + phy->write_reg(phy_addr, 0x0d, 0x1f); // write 0x10d to IO_MUX_CFG (0x0170) phy->write_reg(phy_addr, 0x0e, 0x170); phy->write_reg(phy_addr, 0x0d, 0x401f); phy->write_reg(phy_addr, 0x0e, 0x10d); @@ -17188,6 +17188,9 @@ void mg_phy_init(struct mg_phy *phy, uint8_t phy_addr, uint8_t config) { if (id1 == MG_PHY_DP83x && id2 != MG_PHY_DP83867) { phy->write_reg(phy_addr, MG_PHY_DP83x_REG_RCSR, MG_BIT(7) | MG_BIT(0)); } else if (id1 == MG_PHY_KSZ8x) { + phy->write_reg( + phy_addr, MG_PHY_REG_BCR, // Disable isolation (override hw) + phy->read_reg(phy_addr, MG_PHY_REG_BCR) & (uint16_t) ~MG_BIT(10)); phy->write_reg(phy_addr, MG_PHY_KSZ8x_REG_PC2R, MG_BIT(15) | MG_BIT(8) | MG_BIT(7)); } else if (id1 == MG_PHY_LAN87x) { diff --git a/src/drivers/phy.c b/src/drivers/phy.c index 9acb28d9..e4f112a8 100644 --- a/src/drivers/phy.c +++ b/src/drivers/phy.c @@ -56,7 +56,7 @@ void mg_phy_init(struct mg_phy *phy, uint8_t phy_addr, uint8_t config) { MG_INFO(("PHY ID: %#04x %#04x (%s)", id1, id2, mg_phy_id_to_str(id1, id2))); if (id1 == MG_PHY_DP83x && id2 == MG_PHY_DP83867) { - phy->write_reg(phy_addr, 0x0d, 0x1f); // write 0x10d to IO_MUX_CFG (0x0170) + phy->write_reg(phy_addr, 0x0d, 0x1f); // write 0x10d to IO_MUX_CFG (0x0170) phy->write_reg(phy_addr, 0x0e, 0x170); phy->write_reg(phy_addr, 0x0d, 0x401f); phy->write_reg(phy_addr, 0x0e, 0x10d); @@ -70,6 +70,9 @@ void mg_phy_init(struct mg_phy *phy, uint8_t phy_addr, uint8_t config) { if (id1 == MG_PHY_DP83x && id2 != MG_PHY_DP83867) { phy->write_reg(phy_addr, MG_PHY_DP83x_REG_RCSR, MG_BIT(7) | MG_BIT(0)); } else if (id1 == MG_PHY_KSZ8x) { + phy->write_reg( + phy_addr, MG_PHY_REG_BCR, // Disable isolation (override hw) + phy->read_reg(phy_addr, MG_PHY_REG_BCR) & (uint16_t) ~MG_BIT(10)); phy->write_reg(phy_addr, MG_PHY_KSZ8x_REG_PC2R, MG_BIT(15) | MG_BIT(8) | MG_BIT(7)); } else if (id1 == MG_PHY_LAN87x) {