Removed MG_DRIVER_* macros

mongoose.c

@@ -21820,7 +21820,9 @@ bool mg_wifi_ap_stop(void) {
 #endif
 
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_IMXRT10) && MG_ENABLE_DRIVER_IMXRT10) || \
+  (defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11)
 struct imxrt_enet {
   volatile uint32_t RESERVED0, EIR, EIMR, RESERVED1, RDAR, TDAR, RESERVED2[3],
       ECR, RESERVED3[6], MMFR, MSCR, RESERVED4[7], MIBC, RESERVED5[7], RCR,
@@ -21846,7 +21848,7 @@ struct imxrt_enet {
 };
 
 #undef ENET
-#if defined(MG_DRIVER_IMXRT_RT11) && MG_DRIVER_IMXRT_RT11
+#if defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11
 #define ENET ((struct imxrt_enet *) (uintptr_t) 0x40424000U)
 #define ETH_DESC_CNT 5     // Descriptors count
 #else
@@ -22690,7 +22692,9 @@ struct mg_tcpip_driver mg_tcpip_driver_ppp = {mg_ppp_init, mg_ppp_tx, mg_ppp_rx,
 #endif
 
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_RA6) && MG_ENABLE_DRIVER_RA6) || \
+  (defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8)
 struct ra_etherc {
   volatile uint32_t ECMR, RESERVED, RFLR, RESERVED1, ECSR, RESERVED2, ECSIPR,
       RESERVED3, PIR, RESERVED4, PSR, RESERVED5[5], RDMLR, RESERVED6[3], IPGR,
@@ -22711,7 +22715,7 @@ struct ra_edmac {
 #undef EDMAC
 #undef RASYSC
 #undef ICU_IELSR
-#if defined(MG_DRIVER_RA8) && MG_DRIVER_RA8
+#if defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8
 #define ETHERC ((struct ra_etherc *) (uintptr_t) 0x40354100U)
 #define EDMAC ((struct ra_edmac *) (uintptr_t) 0x40354000U)
 #define RASYSC ((uint32_t *) (uintptr_t) 0x4001E000U)

mongoose.h

@@ -3114,7 +3114,9 @@ struct mg_tcpip_driver_cyw_data {
 #endif
 
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_IMXRT10) && MG_ENABLE_DRIVER_IMXRT10) || \
+  (defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11)
 
 struct mg_tcpip_driver_imxrt_data {
   // MDC clock divider. MDC clock is derived from IPS Bus clock (ipg_clk),
@@ -3230,7 +3232,9 @@ struct mg_tcpip_driver_ppp_data {
 };
 
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_RA6) && MG_ENABLE_DRIVER_RA6) || \
+  (defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8)
 
 struct mg_tcpip_driver_ra_data {
   // MDC clock "divider". MDC clock is software generated,

src/drivers/imxrt.c

@@ -1,6 +1,8 @@
 #include "net_builtin.h"
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_IMXRT10) && MG_ENABLE_DRIVER_IMXRT10) || \
+  (defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11)
 struct imxrt_enet {
   volatile uint32_t RESERVED0, EIR, EIMR, RESERVED1, RDAR, TDAR, RESERVED2[3],
       ECR, RESERVED3[6], MMFR, MSCR, RESERVED4[7], MIBC, RESERVED5[7], RCR,
@@ -26,7 +28,7 @@ struct imxrt_enet {
 };
 
 #undef ENET
-#if defined(MG_DRIVER_IMXRT_RT11) && MG_DRIVER_IMXRT_RT11
+#if defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11
 #define ENET ((struct imxrt_enet *) (uintptr_t) 0x40424000U)
 #define ETH_DESC_CNT 5     // Descriptors count
 #else

src/drivers/imxrt.h

@@ -1,6 +1,8 @@
 #pragma once
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_IMXRT) && MG_ENABLE_DRIVER_IMXRT
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_IMXRT10) && MG_ENABLE_DRIVER_IMXRT10) || \
+  (defined(MG_ENABLE_DRIVER_IMXRT11) && MG_ENABLE_DRIVER_IMXRT11)
 
 struct mg_tcpip_driver_imxrt_data {
   // MDC clock divider. MDC clock is derived from IPS Bus clock (ipg_clk),

src/drivers/ra.c

@@ -1,6 +1,8 @@
 #include "net_builtin.h"
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_RA6) && MG_ENABLE_DRIVER_RA6) || \
+  (defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8)
 struct ra_etherc {
   volatile uint32_t ECMR, RESERVED, RFLR, RESERVED1, ECSR, RESERVED2, ECSIPR,
       RESERVED3, PIR, RESERVED4, PSR, RESERVED5[5], RDMLR, RESERVED6[3], IPGR,
@@ -21,7 +23,7 @@ struct ra_edmac {
 #undef EDMAC
 #undef RASYSC
 #undef ICU_IELSR
-#if defined(MG_DRIVER_RA8) && MG_DRIVER_RA8
+#if defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8
 #define ETHERC ((struct ra_etherc *) (uintptr_t) 0x40354100U)
 #define EDMAC ((struct ra_edmac *) (uintptr_t) 0x40354000U)
 #define RASYSC ((uint32_t *) (uintptr_t) 0x4001E000U)

src/drivers/ra.h

@@ -1,6 +1,8 @@
 #pragma once
 
-#if MG_ENABLE_TCPIP && defined(MG_ENABLE_DRIVER_RA) && MG_ENABLE_DRIVER_RA
+#if MG_ENABLE_TCPIP && \
+  (defined(MG_ENABLE_DRIVER_RA6) && MG_ENABLE_DRIVER_RA6) || \
+  (defined(MG_ENABLE_DRIVER_RA8) && MG_ENABLE_DRIVER_RA8)
 
 struct mg_tcpip_driver_ra_data {
   // MDC clock "divider". MDC clock is software generated,

tutorials/http/http-server/arduino/teensy41-http/mongoose_config.h

@@ -2,7 +2,7 @@
 
 #define MG_ARCH MG_ARCH_NEWLIB     // Use ARM toolchain
 #define MG_ENABLE_TCPIP 1          // Enable built-in network stack
-#define MG_ENABLE_DRIVER_IMXRT 1   // Enable RTxx driver
+#define MG_ENABLE_DRIVER_IMXRT10 1   // Enable RTxx driver
 #define MG_ENABLE_CUSTOM_MILLIS 1  // Let user implement mg_millis()
 #define MG_ENABLE_POSIX_FS 0       // Disable POSIX filesystem
 #define MG_ENABLE_PACKED_FS 1      // Enable packed filesystem

tutorials/nxp/rt1060-evk-xpresso-baremetal-builtin/source/mongoose_config.h

@@ -3,7 +3,7 @@
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_NEWLIB
 #define MG_ENABLE_TCPIP 1
-#define MG_ENABLE_DRIVER_IMXRT 1
+#define MG_ENABLE_DRIVER_IMXRT10 1
 #define MG_ENABLE_CUSTOM_MILLIS 1
 #define MG_ENABLE_CUSTOM_RANDOM 1
 #define MG_ENABLE_PACKED_FS 1

tutorials/renesas/ek-ra6m4-make-baremetal-builtin/mongoose_config.h

@@ -7,5 +7,5 @@
 #define MG_ENABLE_CUSTOM_MILLIS 1
 #define MG_ENABLE_CUSTOM_RANDOM 0
 #define MG_ENABLE_PACKED_FS 1 
-#define MG_ENABLE_DRIVER_RA 1
+#define MG_ENABLE_DRIVER_RA6 1
 //#define MG_ENABLE_LINES 1