mirror of
https://github.com/cesanta/mongoose.git
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Add Mongoose example project for NXP Kinetis K64
PUBLISHED_FROM=c3e39efb339ed9ae45ac4bbb3bd421704ea5a143
This commit is contained in:
Deomid Ryabkov
Cesanta Bot
parent
85d6292b8f
commit
988ad66a12
@ -3,7 +3,7 @@
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# `wildcard ./*/` works in both linux and linux/wine, while `wildcard */` enumerates nothing under wine
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SUBDIRS = $(sort $(dir $(wildcard ./*/)))
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SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./MSP432/ ./PIC32/ ./STM32F4_CC3100/, $(SUBDIRS))
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SUBDIRS:=$(filter-out ./ ./CC3200/ ./ESP8266_RTOS/ ./MSP432/ ./NXP_K64/ ./PIC32/ ./STM32F4_CC3100/, $(SUBDIRS))
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ifeq ($(OS), Windows_NT)
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SUBDIRS:=$(filter-out ./load_balancer/ ./netcat/ ./raspberry_pi_mjpeg_led/ ./captive_dns_server/, $(SUBDIRS))
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42
examples/NXP_K64/board.c
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42
examples/NXP_K64/board.c
Normal file
@ -0,0 +1,42 @@
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/* clang-format off */
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
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||||
*
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||||
* o Redistributions in binary form must reproduce the above copyright notice, this
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||||
* list of conditions and the following disclaimer in the documentation and/or
|
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <stdint.h>
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#include "fsl_common.h"
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#include "fsl_debug_console.h"
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#include "board.h"
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/* Initialize debug console. */
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void BOARD_InitDebugConsole(void)
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{
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uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ;
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DbgConsole_Init(BOARD_DEBUG_UART_BASEADDR, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
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}
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153
examples/NXP_K64/board.h
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153
examples/NXP_K64/board.h
Normal file
@ -0,0 +1,153 @@
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/* clang-format off */
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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#include "clock_config.h"
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#include "fsl_gpio.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/* The board name */
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#define BOARD_NAME "FRDM-K64F"
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/* The UART to use for debug messages. */
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#define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART
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#define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART0
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#define BOARD_DEBUG_UART_CLKSRC SYS_CLK
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#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetCoreSysClkFreq()
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#define BOARD_UART_IRQ UART0_RX_TX_IRQn
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#define BOARD_UART_IRQ_HANDLER UART0_RX_TX_IRQHandler
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#ifndef BOARD_DEBUG_UART_BAUDRATE
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#define BOARD_DEBUG_UART_BAUDRATE 115200
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#endif /* BOARD_DEBUG_UART_BAUDRATE */
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/* Define the port interrupt number for the board switches */
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#define BOARD_SW2_GPIO GPIOC
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#define BOARD_SW2_PORT PORTC
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#define BOARD_SW2_GPIO_PIN 6U
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#define BOARD_SW2_IRQ PORTC_IRQn
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#define BOARD_SW2_IRQ_HANDLER PORTC_IRQHandler
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#define BOARD_SW2_NAME "SW2"
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#define BOARD_SW3_GPIO GPIOA
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#define BOARD_SW3_PORT PORTA
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#define BOARD_SW3_GPIO_PIN 4U
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#define BOARD_SW3_IRQ PORTA_IRQn
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#define BOARD_SW3_IRQ_HANDLER PORTA_IRQHandler
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#define BOARD_SW3_NAME "SW3"
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/* Board led color mapping */
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#define LOGIC_LED_ON 0U
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#define LOGIC_LED_OFF 1U
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#define BOARD_LED_RED_GPIO GPIOB
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#define BOARD_LED_RED_GPIO_PORT PORTB
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#define BOARD_LED_RED_GPIO_PIN 22U
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#define BOARD_LED_GREEN_GPIO GPIOE
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#define BOARD_LED_GREEN_GPIO_PORT PORTE
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#define BOARD_LED_GREEN_GPIO_PIN 26U
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#define BOARD_LED_BLUE_GPIO GPIOB
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#define BOARD_LED_BLUE_GPIO_PORT PORTB
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#define BOARD_LED_BLUE_GPIO_PIN 21U
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#define LED_RED_INIT(output) \
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GPIO_PinInit(BOARD_LED_RED_GPIO, BOARD_LED_RED_GPIO_PIN, \
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&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_RED */
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#define LED_RED_ON() \
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GPIO_ClearPinsOutput(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn on target LED_RED */
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#define LED_RED_OFF() \
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GPIO_SetPinsOutput(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Turn off target LED_RED */
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#define LED_RED_TOGGLE() \
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GPIO_TogglePinsOutput(BOARD_LED_RED_GPIO, 1U << BOARD_LED_RED_GPIO_PIN) /*!< Toggle on target LED_RED */
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#define LED_GREEN_INIT(output) \
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GPIO_PinInit(BOARD_LED_GREEN_GPIO, BOARD_LED_GREEN_GPIO_PIN, \
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&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_GREEN */
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#define LED_GREEN_ON() \
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GPIO_ClearPinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn on target LED_GREEN */
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#define LED_GREEN_OFF() \
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GPIO_SetPinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Turn off target LED_GREEN */
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#define LED_GREEN_TOGGLE() \
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GPIO_TogglePinsOutput(BOARD_LED_GREEN_GPIO, 1U << BOARD_LED_GREEN_GPIO_PIN) /*!< Toggle on target LED_GREEN */
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#define LED_BLUE_INIT(output) \
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GPIO_PinInit(BOARD_LED_BLUE_GPIO, BOARD_LED_BLUE_GPIO_PIN, \
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&(gpio_pin_config_t){kGPIO_DigitalOutput, (output)}) /*!< Enable target LED_BLUE */
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#define LED_BLUE_ON() \
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GPIO_ClearPinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn on target LED_BLUE */
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#define LED_BLUE_OFF() \
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GPIO_SetPinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Turn off target LED_BLUE */
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#define LED_BLUE_TOGGLE() \
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GPIO_TogglePinsOutput(BOARD_LED_BLUE_GPIO, 1U << BOARD_LED_BLUE_GPIO_PIN) /*!< Toggle on target LED_BLUE */
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/* The SDHC instance/channel used for board */
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#define BOARD_SDHC_CD_GPIO_IRQ_HANDLER PORTB_IRQHandler
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/* SDHC base address, clock and card detection pin */
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#define BOARD_SDHC_BASEADDR SDHC
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#define BOARD_SDHC_CLKSRC kCLOCK_CoreSysClk
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#define BOARD_SDHC_IRQ SDHC_IRQn
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#define BOARD_SDHC_CD_GPIO_BASE GPIOE
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#define BOARD_SDHC_CD_GPIO_PIN 6U
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#define BOARD_SDHC_CD_PORT_BASE PORTE
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#define BOARD_SDHC_CD_PORT_IRQ PORTE_IRQn
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#define BOARD_SDHC_CD_PORT_IRQ_HANDLER PORTE_IRQHandler
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#define BOARD_SDHC_CD_LOGIC_RISING
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#define BOARD_ACCEL_I2C_BASEADDR I2C0
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/* @brief FreeRTOS tickless timer configuration. */
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#define vPortLptmrIsr LPTMR0_IRQHandler /*!< Timer IRQ handler. */
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#define TICKLESS_LPTMR_BASE_PTR LPTMR0 /*!< Tickless timer base address. */
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#define TICKLESS_LPTMR_IRQn LPTMR0_IRQn /*!< Tickless timer IRQ number. */
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/* @brief pit IRQ configuration for lwip demo */
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#define LWIP_TIME_ISR PIT0_IRQHandler
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#define LWIP_PIT_IRQ_ID PIT0_IRQn
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/*******************************************************************************
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* API
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******************************************************************************/
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void BOARD_InitDebugConsole(void);
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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#endif /* _BOARD_H_ */
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197
examples/NXP_K64/clock_config.c
Normal file
197
examples/NXP_K64/clock_config.c
Normal file
@ -0,0 +1,197 @@
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/* clang-format off */
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/*
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
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||||
*
|
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* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
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* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "fsl_common.h"
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#include "fsl_smc.h"
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#include "clock_config.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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/*! @brief Clock configuration structure. */
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typedef struct _clock_config
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{
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mcg_config_t mcgConfig; /*!< MCG configuration. */
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sim_clock_config_t simConfig; /*!< SIM configuration. */
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osc_config_t oscConfig; /*!< OSC configuration. */
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uint32_t coreClock; /*!< core clock frequency. */
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} clock_config_t;
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/*******************************************************************************
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* Variables
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******************************************************************************/
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/* System clock frequency. */
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extern uint32_t SystemCoreClock;
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/* Configuration for enter VLPR mode. Core clock = 4MHz. */
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const clock_config_t g_defaultClockConfigVlpr = {
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.mcgConfig =
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{
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.mcgMode = kMCG_ModeBLPI, /* Work in BLPI mode. */
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.irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enable. */
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.ircs = kMCG_IrcFast, /* Select IRC4M. */
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.fcrdiv = 0U, /* FCRDIV is 0. */
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.frdiv = 0U,
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.drs = kMCG_DrsLow, /* Low frequency range. */
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.dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25%. */
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.oscsel = kMCG_OscselOsc, /* Select OSC. */
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.pll0Config =
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{
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.enableMode = 0U, /* Don't eanble PLL. */
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.prdiv = 0U,
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.vdiv = 0U,
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},
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},
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.simConfig =
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{
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.pllFllSel = 3U, /* PLLFLLSEL select IRC48MCLK. */
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.er32kSrc = 2U, /* ERCLK32K selection, use RTC. */
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.clkdiv1 = 0x00040000U, /* SIM_CLKDIV1. */
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},
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.oscConfig = {.freq = BOARD_XTAL0_CLK_HZ,
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.capLoad = 0,
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.workMode = kOSC_ModeExt,
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.oscerConfig =
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{
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.enableMode = kOSC_ErClkEnable,
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#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
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.erclkDiv = 0U,
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#endif
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}},
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.coreClock = 4000000U, /* Core clock frequency */
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};
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/* Configuration for enter RUN mode. Core clock = 120MHz. */
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const clock_config_t g_defaultClockConfigRun = {
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.mcgConfig =
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{
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.mcgMode = kMCG_ModePEE, /* Work in PEE mode. */
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.irclkEnableMode = kMCG_IrclkEnable, /* MCGIRCLK enable. */
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.ircs = kMCG_IrcSlow, /* Select IRC32k. */
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.fcrdiv = 0U, /* FCRDIV is 0. */
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.frdiv = 7U,
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.drs = kMCG_DrsLow, /* Low frequency range. */
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.dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25%. */
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.oscsel = kMCG_OscselOsc, /* Select OSC. */
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.pll0Config =
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{
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.enableMode = 0U, .prdiv = 0x13U, .vdiv = 0x18U,
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},
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},
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.simConfig =
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{
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.pllFllSel = 1U, /* PLLFLLSEL select PLL. */
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.er32kSrc = 2U, /* ERCLK32K selection, use RTC. */
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.clkdiv1 = 0x01140000U, /* SIM_CLKDIV1. */
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},
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.oscConfig = {.freq = BOARD_XTAL0_CLK_HZ,
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.capLoad = 0,
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.workMode = kOSC_ModeExt,
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.oscerConfig =
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{
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.enableMode = kOSC_ErClkEnable,
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#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
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.erclkDiv = 0U,
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#endif
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}},
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.coreClock = 120000000U, /* Core clock frequency */
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};
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*
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* How to setup clock using clock driver functions:
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*
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* 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
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* and flash clock are in allowed range during clock mode switch.
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*
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* 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
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*
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* 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
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* internal reference clock(MCGIRCLK). Follow the steps to setup:
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*
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* 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
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*
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* 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
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* correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
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* explicitly to setup MCGIRCLK.
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*
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* 3). Don't need to configure FLL explicitly, because if target mode is FLL
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* mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
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* if the target mode is not FLL mode, the FLL is disabled.
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*
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* 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
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* setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
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* be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
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*
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* 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
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*/
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void BOARD_BootClockVLPR(void)
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{
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CLOCK_SetSimSafeDivs();
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CLOCK_BootToBlpiMode(g_defaultClockConfigVlpr.mcgConfig.fcrdiv, g_defaultClockConfigVlpr.mcgConfig.ircs,
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g_defaultClockConfigVlpr.mcgConfig.irclkEnableMode);
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CLOCK_SetSimConfig(&g_defaultClockConfigVlpr.simConfig);
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SystemCoreClock = g_defaultClockConfigVlpr.coreClock;
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SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
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SMC_SetPowerModeVlpr(SMC, false);
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while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
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{
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}
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}
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void BOARD_BootClockRUN(void)
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{
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CLOCK_SetSimSafeDivs();
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|
||||
CLOCK_InitOsc0(&g_defaultClockConfigRun.oscConfig);
|
||||
CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ);
|
||||
|
||||
CLOCK_BootToPeeMode(g_defaultClockConfigRun.mcgConfig.oscsel, kMCG_PllClkSelPll0,
|
||||
&g_defaultClockConfigRun.mcgConfig.pll0Config);
|
||||
|
||||
CLOCK_SetInternalRefClkConfig(g_defaultClockConfigRun.mcgConfig.irclkEnableMode,
|
||||
g_defaultClockConfigRun.mcgConfig.ircs, g_defaultClockConfigRun.mcgConfig.fcrdiv);
|
||||
|
||||
CLOCK_SetSimConfig(&g_defaultClockConfigRun.simConfig);
|
||||
|
||||
SystemCoreClock = g_defaultClockConfigRun.coreClock;
|
||||
}
|
||||
54
examples/NXP_K64/clock_config.h
Normal file
54
examples/NXP_K64/clock_config.h
Normal file
@ -0,0 +1,54 @@
|
||||
/* clang-format off */
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef _CLOCK_CONFIG_H_
|
||||
#define _CLOCK_CONFIG_H_
|
||||
|
||||
/*******************************************************************************
|
||||
* DEFINITION
|
||||
******************************************************************************/
|
||||
#define BOARD_XTAL0_CLK_HZ 50000000U
|
||||
#define BOARD_XTAL32K_CLK_HZ 32768U
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
void BOARD_BootClockVLPR(void);
|
||||
void BOARD_BootClockRUN(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus*/
|
||||
|
||||
#endif /* _CLOCK_CONFIG_H_ */
|
||||
293
examples/NXP_K64/fsl_phy.c
Normal file
293
examples/NXP_K64/fsl_phy.c
Normal file
@ -0,0 +1,293 @@
|
||||
/* clang-format off */
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "fsl_phy.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Defines the timeout macro. */
|
||||
#define PHY_TIMEOUT_COUNT 0xFFFFFU
|
||||
|
||||
/*******************************************************************************
|
||||
* Prototypes
|
||||
******************************************************************************/
|
||||
|
||||
/*!
|
||||
* @brief Get the ENET instance from peripheral base address.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @return ENET instance.
|
||||
*/
|
||||
extern uint32_t ENET_GetInstance(ENET_Type *base);
|
||||
|
||||
/*******************************************************************************
|
||||
* Variables
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief Pointers to enet clocks for each instance. */
|
||||
extern clock_ip_name_t s_enetClock[FSL_FEATURE_SOC_ENET_COUNT];
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
|
||||
status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz)
|
||||
{
|
||||
uint32_t bssReg;
|
||||
uint32_t counter = PHY_TIMEOUT_COUNT;
|
||||
status_t result = kStatus_Success;
|
||||
uint32_t instance = ENET_GetInstance(base);
|
||||
|
||||
/* Set SMI first. */
|
||||
CLOCK_EnableClock(s_enetClock[instance]);
|
||||
ENET_SetSMI(base, srcClock_Hz, false);
|
||||
|
||||
/* Reset PHY. */
|
||||
result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, PHY_BCTL_RESET_MASK);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
/* Set the negotiation. */
|
||||
result = PHY_Write(base, phyAddr, PHY_AUTONEG_ADVERTISE_REG,
|
||||
(PHY_100BASETX_FULLDUPLEX_MASK | PHY_100BASETX_HALFDUPLEX_MASK |
|
||||
PHY_10BASETX_FULLDUPLEX_MASK | PHY_10BASETX_HALFDUPLEX_MASK | 0x1U));
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
result = PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG,
|
||||
(PHY_BCTL_AUTONEG_MASK | PHY_BCTL_RESTART_AUTONEG_MASK));
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
/* Check auto negotiation complete. */
|
||||
while (counter --)
|
||||
{
|
||||
result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &bssReg);
|
||||
if ( result == kStatus_Success)
|
||||
{
|
||||
if ((bssReg & PHY_BSTATUS_AUTONEGCOMP_MASK) != 0)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!counter)
|
||||
{
|
||||
return kStatus_PHY_AutoNegotiateFail;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data)
|
||||
{
|
||||
uint32_t counter;
|
||||
|
||||
/* Clear the SMI interrupt event. */
|
||||
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
|
||||
|
||||
/* Starts a SMI write command. */
|
||||
ENET_StartSMIWrite(base, phyAddr, phyReg, kENET_MiiWriteValidFrame, data);
|
||||
|
||||
/* Wait for SMI complete. */
|
||||
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
|
||||
{
|
||||
if (ENET_GetInterruptStatus(base) & ENET_EIR_MII_MASK)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check for timeout. */
|
||||
if (!counter)
|
||||
{
|
||||
return kStatus_PHY_SMIVisitTimeout;
|
||||
}
|
||||
|
||||
/* Clear MII interrupt event. */
|
||||
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr)
|
||||
{
|
||||
assert(dataPtr);
|
||||
|
||||
uint32_t counter;
|
||||
|
||||
/* Clear the MII interrupt event. */
|
||||
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
|
||||
|
||||
/* Starts a SMI read command operation. */
|
||||
ENET_StartSMIRead(base, phyAddr, phyReg, kENET_MiiReadValidFrame);
|
||||
|
||||
/* Wait for MII complete. */
|
||||
for (counter = PHY_TIMEOUT_COUNT; counter > 0; counter--)
|
||||
{
|
||||
if (ENET_GetInterruptStatus(base) & ENET_EIR_MII_MASK)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
/* Check for timeout. */
|
||||
if (!counter)
|
||||
{
|
||||
return kStatus_PHY_SMIVisitTimeout;
|
||||
}
|
||||
|
||||
/* Get data from MII register. */
|
||||
*dataPtr = ENET_ReadSMIData(base);
|
||||
|
||||
/* Clear MII interrupt event. */
|
||||
ENET_ClearInterruptStatus(base, ENET_EIR_MII_MASK);
|
||||
|
||||
return kStatus_Success;
|
||||
}
|
||||
|
||||
status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, bool enable)
|
||||
{
|
||||
status_t result;
|
||||
uint32_t data = 0;
|
||||
|
||||
/* Set the loop mode. */
|
||||
if (enable)
|
||||
{
|
||||
if (mode == kPHY_LocalLoop)
|
||||
{
|
||||
/* First read the current status in control register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &data);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data | PHY_BCTL_LOOP_MASK));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* First read the current status in control register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data | PHY_CTL2_REMOTELOOP_MASK));
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Disable the loop mode. */
|
||||
if (mode == kPHY_LocalLoop)
|
||||
{
|
||||
/* First read the current status in the basic control register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_BASICCONTROL_REG, &data);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
return PHY_Write(base, phyAddr, PHY_BASICCONTROL_REG, (data & ~PHY_BCTL_LOOP_MASK));
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
/* First read the current status in control one register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_CONTROL2_REG, &data);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
return PHY_Write(base, phyAddr, PHY_CONTROL2_REG, (data & ~PHY_CTL2_REMOTELOOP_MASK));
|
||||
}
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status)
|
||||
{
|
||||
assert(status);
|
||||
|
||||
status_t result = kStatus_Success;
|
||||
uint32_t data;
|
||||
|
||||
/* Read the basic status register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_BASICSTATUS_REG, &data);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
if (!(PHY_BSTATUS_LINKSTATUS_MASK & data))
|
||||
{
|
||||
/* link down. */
|
||||
*status = false;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* link up. */
|
||||
*status = true;
|
||||
}
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex)
|
||||
{
|
||||
assert(duplex);
|
||||
|
||||
status_t result = kStatus_Success;
|
||||
uint32_t data, ctlReg;
|
||||
|
||||
/* Read the control two register. */
|
||||
result = PHY_Read(base, phyAddr, PHY_CONTROL1_REG, &ctlReg);
|
||||
if (result == kStatus_Success)
|
||||
{
|
||||
data = ctlReg & PHY_CTL1_SPEEDUPLX_MASK;
|
||||
if ((PHY_CTL1_10FULLDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
|
||||
{
|
||||
/* Full duplex. */
|
||||
*duplex = kPHY_FullDuplex;
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Half duplex. */
|
||||
*duplex = kPHY_HalfDuplex;
|
||||
}
|
||||
|
||||
data = ctlReg & PHY_CTL1_SPEEDUPLX_MASK;
|
||||
if ((PHY_CTL1_100HALFDUPLEX_MASK == data) || (PHY_CTL1_100FULLDUPLEX_MASK == data))
|
||||
{
|
||||
/* 100M speed. */
|
||||
*speed = kPHY_Speed100M;
|
||||
}
|
||||
else
|
||||
{ /* 10M speed. */
|
||||
*speed = kPHY_Speed10M;
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
217
examples/NXP_K64/fsl_phy.h
Normal file
217
examples/NXP_K64/fsl_phy.h
Normal file
@ -0,0 +1,217 @@
|
||||
/* clang-format off */
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
#ifndef _FSL_PHY_H_
|
||||
#define _FSL_PHY_H_
|
||||
|
||||
#include "fsl_enet.h"
|
||||
|
||||
/*!
|
||||
* @addtogroup phy_driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*******************************************************************************
|
||||
* Definitions
|
||||
******************************************************************************/
|
||||
|
||||
/*! @brief PHY driver version */
|
||||
#define FSL_PHY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
|
||||
|
||||
/*! @brief Defines the PHY registers. */
|
||||
#define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
|
||||
#define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
|
||||
#define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
|
||||
#define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
|
||||
#define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
|
||||
#define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
|
||||
#define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
|
||||
|
||||
#define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
|
||||
|
||||
/*! @brief Defines the mask flag in basic control register. */
|
||||
#define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
|
||||
#define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
|
||||
#define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
|
||||
#define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
|
||||
#define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
|
||||
#define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
|
||||
|
||||
/*!@brief Defines the mask flag of operation mode in control two register*/
|
||||
#define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
|
||||
#define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
|
||||
#define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
|
||||
#define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
|
||||
#define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
|
||||
#define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
|
||||
|
||||
/*! @brief Defines the mask flag in basic status register. */
|
||||
#define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
|
||||
#define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
|
||||
#define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
|
||||
|
||||
/*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
|
||||
#define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
|
||||
#define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
|
||||
#define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
|
||||
#define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
|
||||
#define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
|
||||
|
||||
/*! @brief Defines the PHY status. */
|
||||
enum _phy_status
|
||||
{
|
||||
kStatus_PHY_SMIVisitTimeout = MAKE_STATUS(kStatusGroup_PHY, 1), /*!< ENET PHY SMI visit timeout. */
|
||||
kStatus_PHY_AutoNegotiateFail = MAKE_STATUS(kStatusGroup_PHY, 2) /*!< ENET PHY AutoNegotiate Fail. */
|
||||
};
|
||||
|
||||
/*! @brief Defines the PHY link speed. This is align with the speed for ENET MAC. */
|
||||
typedef enum _phy_speed
|
||||
{
|
||||
kPHY_Speed10M = 0U, /*!< ENET PHY 10M speed. */
|
||||
kPHY_Speed100M /*!< ENET PHY 100M speed. */
|
||||
} phy_speed_t;
|
||||
|
||||
/*! @brief Defines the PHY link duplex. */
|
||||
typedef enum _phy_duplex
|
||||
{
|
||||
kPHY_HalfDuplex = 0U, /*!< ENET PHY half duplex. */
|
||||
kPHY_FullDuplex /*!< ENET PHY full duplex. */
|
||||
} phy_duplex_t;
|
||||
|
||||
/*! @brief Defines the PHY loopback mode. */
|
||||
typedef enum _phy_loop
|
||||
{
|
||||
kPHY_LocalLoop = 0U, /*!< ENET PHY local loopback. */
|
||||
kPHY_RemoteLoop /*!< ENET PHY remote loopback. */
|
||||
} phy_loop_t;
|
||||
|
||||
/*******************************************************************************
|
||||
* API
|
||||
******************************************************************************/
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/*!
|
||||
* @name PHY Driver
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*!
|
||||
* @brief Initializes PHY.
|
||||
*
|
||||
* This function initialize the SMI interface and initialize PHY.
|
||||
* The SMI is the MII management interface between PHY and MAC, which should be
|
||||
* firstly initialized before any other operation for PHY.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param srcClock_Hz The module clock frequency - system clock for MII management interface - SMI.
|
||||
* @retval kStatus_Success PHY initialize success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
* @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
|
||||
*/
|
||||
status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
|
||||
|
||||
/*!
|
||||
* @brief PHY Write function. This function write data over the SMI to
|
||||
* the specified PHY register. This function is called by all PHY interfaces.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param phyReg The PHY register.
|
||||
* @param data The data written to the PHY register.
|
||||
* @retval kStatus_Success PHY write success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
*/
|
||||
status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
|
||||
|
||||
/*!
|
||||
* @brief PHY Read function. This interface read data over the SMI from the
|
||||
* specified PHY register. This function is called by all PHY interfaces.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param phyReg The PHY register.
|
||||
* @param dataPtr The address to store the data read from the PHY register.
|
||||
* @retval kStatus_Success PHY read success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
*/
|
||||
status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
|
||||
|
||||
/*!
|
||||
* @brief Enables/disables PHY loopback.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param mode The loopback mode to be enabled, please see "phy_loop_t".
|
||||
* the two loopback mode should not be both set. when one loopback mode is set
|
||||
* the other one should be disabled.
|
||||
* @param enable True to enable, false to disable.
|
||||
* @retval kStatus_Success PHY loopback success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
*/
|
||||
status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, bool enable);
|
||||
|
||||
/*!
|
||||
* @brief Gets the PHY link status.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param status The link up or down status of the PHY.
|
||||
* - true the link is up.
|
||||
* - false the link is down.
|
||||
* @retval kStatus_Success PHY get link status success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
*/
|
||||
status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
|
||||
|
||||
/*!
|
||||
* @brief Gets the PHY link speed and duplex.
|
||||
*
|
||||
* @param base ENET peripheral base address.
|
||||
* @param phyAddr The PHY address.
|
||||
* @param speed The address of PHY link speed.
|
||||
* @param duplex The link duplex of PHY.
|
||||
* @retval kStatus_Success PHY get link speed and duplex success
|
||||
* @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
|
||||
*/
|
||||
status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex);
|
||||
|
||||
/* @} */
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
/*! @}*/
|
||||
|
||||
#endif /* _FSL_PHY_H_ */
|
||||
315
examples/NXP_K64/kds/.cproject
Normal file
315
examples/NXP_K64/kds/.cproject
Normal file
@ -0,0 +1,315 @@
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||||
<builder buildPath="${workspace_loc:/k64f}/debug" id="ilg.gnuarmeclipse.managedbuild.cross.builder.1406291427" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="false" stopOnErr="false" superClass="ilg.gnuarmeclipse.managedbuild.cross.builder"/>
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||||
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||||
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||||
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<listOptionValue builtIn="false" value=""../../../../""/>
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||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/drivers}/..""/>
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||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/drivers}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/utilities}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/port}""/>
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||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/src/include}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/src/include/ipv4}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/CMSIS_Include}""/>
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||||
</option>
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<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input.871599837" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.955273220" name="Cross ARM C Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler">
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths.767758500" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.include.paths" useByScannerDiscovery="false" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value=""../..""/>
|
||||
<listOptionValue builtIn="false" value=""../../../../""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/drivers}/..""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/drivers}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/utilities}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/port}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/src/include}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/lwip/src/include/ipv4}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/Mongoose_FRDMK64F_BM/CMSIS_Include}""/>
|
||||
</option>
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.997197032" name="Language standard" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.std.gnu99" valueType="enumerated"/>
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<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs.6830536915" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.defs" useByScannerDiscovery="false" valueType="definedSymbols">
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||||
<listOptionValue builtIn="false" value="NDEBUG"/>
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||||
<listOptionValue builtIn="false" value="CPU_MK64FN1M0VMD12"/>
|
||||
<listOptionValue builtIn="false" value="FRDM_K64F"/>
|
||||
<listOptionValue builtIn="false" value="FREEDOM"/>
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||||
</option>
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.nostdinc.9102863623" name="Do not search system directories (-nostdinc)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.nostdinc" useByScannerDiscovery="true" value="false" valueType="boolean"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other.9524876677" name="Other compiler flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other" useByScannerDiscovery="true" value=" -fno-common -ffreestanding -fno-builtin -mapcs " valueType="string"/>
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||||
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||||
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|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.270191615" name="Cross ARM C++ Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler"/>
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||||
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.gcsections.1012325190" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.gcsections" value="true" valueType="boolean"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.otherobjs.3003655888" name="Other objects" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.otherobjs"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.scriptfile.1938135444" name="Script files (-T)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.scriptfile" valueType="stringList">
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||||
<listOptionValue builtIn="false" value="../MK64FN1M0xxx12_flash.ld"/>
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||||
</option>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostart.7190303728" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostart" value="false" valueType="boolean"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nodeflibs.2673291920" name="Do not use default libraries (-nodefaultlibs)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nodeflibs" value="false" valueType="boolean"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.libs.7037434604" name="Libraries (-l)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.libs" valueType="libs">
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<listOptionValue builtIn="false" value="m"/>
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<listOptionValue builtIn="false" value="g"/>
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||||
<listOptionValue builtIn="false" value="gcc"/>
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<listOptionValue builtIn="false" value="nosys"/>
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||||
</option>
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.cref.6043148641" name="Cross reference (-Xlinker --cref)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.cref" value="false" valueType="boolean"/>
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.printgcsections.4277279969" name="Print removed sections (-Xlinker --print-gc-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.printgcsections" value="false" valueType="boolean"/>
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<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.strip.2164842634" name="Omit all symbol information (-s)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.strip" value="false" valueType="boolean"/>
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<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.other.4493069774" name="Other linker flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.other" value=" -Wall --specs=nano.specs -fno-common -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -mapcs -Xlinker -static -Xlinker -z -Xlinker muldefs -Xlinker --defsym=__ram_vector_table__=1 " valueType="string"/>
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<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.input.1297163151" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.input">
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||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
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<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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||||
</inputType>
|
||||
</tool>
|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker.1288631479" name="Cross ARM C++ Linker" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.linker">
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||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.gcsections.1722094624" name="Remove unused sections (-Xlinker --gc-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.cpp.linker.gcsections" value="true" valueType="boolean"/>
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</tool>
|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.archiver.571275503" name="Cross ARM GNU Archiver" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.archiver"/>
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||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.createflash.815118717" name="Cross ARM GNU Create Flash Image" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.createflash"/>
|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.createlisting.254728314" name="Cross ARM GNU Create Listing" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.createlisting">
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.source.1925404631" name="Display source (--source|-S)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.source" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.allheaders.167640084" name="Display all headers (--all-headers|-x)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.allheaders" value="true" valueType="boolean"/>
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.demangle.1474313123" name="Demangle names (--demangle|-C)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.demangle" value="true" valueType="boolean"/>
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<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.linenumbers.1969680589" name="Display line numbers (--line-numbers|-l)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.linenumbers" value="true" valueType="boolean"/>
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<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide.240541858" name="Wide lines (--wide|-w)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide" value="true" valueType="boolean"/>
|
||||
</tool>
|
||||
<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize.572718337" name="Cross ARM GNU Print Size" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize">
|
||||
<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.1162591107" name="Size format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format"/>
|
||||
</tool>
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="drivers/fsl_uart_freertos.c|drivers/fsl_i2c_freertos.c|drivers/fsl_dspi_freertos.c|lwip/src/core/snmp|lwip/src/core/ipv6" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="k64f.ilg.gnuarmeclipse.managedbuild.cross.target.elf.1537007018" name="Executable" projectType="ilg.gnuarmeclipse.managedbuild.cross.target.elf"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="refreshScope" versionNumber="2">
|
||||
<configuration configurationName="Multiple configurations">
|
||||
<resource resourceType="PROJECT" workspacePath="/FRDM-K64F_Demo"/>
|
||||
</configuration>
|
||||
<configuration configurationName="debug">
|
||||
<resource resourceType="PROJECT" workspacePath="/Mongoose_FRDMK64F_BM"/>
|
||||
</configuration>
|
||||
<configuration configurationName="release">
|
||||
<resource resourceType="PROJECT" workspacePath="/Mongoose_FRDMK64F_BM"/>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
|
||||
<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
<scannerConfigBuildInfo instanceId="ilg.gnuarmeclipse.managedbuild.cross.config.elf.release.1939339834;ilg.gnuarmeclipse.managedbuild.cross.config.elf.release.1939339834.;ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.955273220;ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.1711058916">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
<scannerConfigBuildInfo instanceId="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.1792027861;ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.1792027861.;ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.1397207158;ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.1895544709">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</scannerConfigBuildInfo>
|
||||
</storageModule>
|
||||
</cproject>
|
||||
144
examples/NXP_K64/kds/.project
Normal file
144
examples/NXP_K64/kds/.project
Normal file
@ -0,0 +1,144 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<projectDescription>
|
||||
<name>Mongoose_FRDMK64F_BM</name>
|
||||
<comment></comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>com.freescale.processorexpert.core.expertprojectbuilder</name>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>com.freescale.processorexpert.core.expertprojectnature</nature>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
<linkedResources>
|
||||
<link>
|
||||
<name>CMSIS_Include</name>
|
||||
<type>2</type>
|
||||
<locationURI>$%7BSDK_PATH%7D/CMSIS/Include</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>drivers</name>
|
||||
<type>2</type>
|
||||
<locationURI>SDK_PATH/devices/MK64F12/drivers</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>lwip</name>
|
||||
<type>2</type>
|
||||
<locationURI>LWIP_PATH</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>startup</name>
|
||||
<type>2</type>
|
||||
<locationURI>virtual:/virtual</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>utilities</name>
|
||||
<type>2</type>
|
||||
<locationURI>SDK_PATH/devices/MK64F12/utilities</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/board.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/board.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/board.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/board.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/clock_config.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/clock_config.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/clock_config.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/clock_config.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/fsl_phy.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/fsl_phy.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/fsl_phy.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/fsl_phy.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/main.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/main.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/mongoose.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-3-PROJECT_LOC/mongoose.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/mongoose.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-3-PROJECT_LOC/mongoose.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/pin_mux.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/pin_mux.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>source/pin_mux.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>PARENT-1-PROJECT_LOC/pin_mux.h</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>startup/startup_MK64F12.S</name>
|
||||
<type>1</type>
|
||||
<locationURI>SDK_PATH/devices/MK64F12/gcc/startup_MK64F12.S</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>startup/system_MK64F12.c</name>
|
||||
<type>1</type>
|
||||
<locationURI>SDK_PATH/devices/MK64F12/system_MK64F12.c</locationURI>
|
||||
</link>
|
||||
<link>
|
||||
<name>startup/system_MK64F12.h</name>
|
||||
<type>1</type>
|
||||
<locationURI>SDK_PATH/devices/MK64F12/system_MK64F12.h</locationURI>
|
||||
</link>
|
||||
</linkedResources>
|
||||
<variableList>
|
||||
<variable>
|
||||
<name>LWIP_PATH</name>
|
||||
<value>$%7BSDK_PATH%7D/middleware/lwip_1.4.1</value>
|
||||
</variable>
|
||||
<variable>
|
||||
<name>SDK_PATH</name>
|
||||
<value>PARENT-1-PROJECT_LOC/SDK_2.0_FRDM-K64F</value>
|
||||
</variable>
|
||||
</variableList>
|
||||
</projectDescription>
|
||||
261
examples/NXP_K64/kds/MK64FN1M0xxx12_flash.ld
Normal file
261
examples/NXP_K64/kds/MK64FN1M0xxx12_flash.ld
Normal file
@ -0,0 +1,261 @@
|
||||
/*
|
||||
** ###################################################################
|
||||
** Processors: MK64FN1M0VDC12
|
||||
** MK64FN1M0VLL12
|
||||
** MK64FN1M0VLQ12
|
||||
** MK64FN1M0VMD12
|
||||
**
|
||||
** Compiler: GNU C Compiler
|
||||
** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
|
||||
** Version: rev. 2.8, 2015-02-19
|
||||
** Build: b151217
|
||||
**
|
||||
** Abstract:
|
||||
** Linker file for the GNU C Compiler
|
||||
**
|
||||
** Copyright (c) 2015 Freescale Semiconductor, Inc.
|
||||
** All rights reserved.
|
||||
**
|
||||
** Redistribution and use in source and binary forms, with or without modification,
|
||||
** are permitted provided that the following conditions are met:
|
||||
**
|
||||
** o Redistributions of source code must retain the above copyright notice, this list
|
||||
** of conditions and the following disclaimer.
|
||||
**
|
||||
** o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
** list of conditions and the following disclaimer in the documentation and/or
|
||||
** other materials provided with the distribution.
|
||||
**
|
||||
** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
** contributors may be used to endorse or promote products derived from this
|
||||
** software without specific prior written permission.
|
||||
**
|
||||
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
**
|
||||
** http: www.freescale.com
|
||||
** mail: support@freescale.com
|
||||
**
|
||||
** ###################################################################
|
||||
*/
|
||||
|
||||
/* Entry Point */
|
||||
ENTRY(Reset_Handler)
|
||||
|
||||
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x1000;
|
||||
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
|
||||
M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
|
||||
|
||||
/* Specify the memory areas */
|
||||
MEMORY
|
||||
{
|
||||
m_interrupts (RX) : ORIGIN = 0x00000000, LENGTH = 0x00000400
|
||||
m_flash_config (RX) : ORIGIN = 0x00000400, LENGTH = 0x00000010
|
||||
m_text (RX) : ORIGIN = 0x00000410, LENGTH = 0x000FFBF0
|
||||
m_data (RW) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000
|
||||
m_data_2 (RW) : ORIGIN = 0x20000000, LENGTH = 0x00030000
|
||||
}
|
||||
|
||||
/* Define output sections */
|
||||
SECTIONS
|
||||
{
|
||||
/* The startup code goes first into internal flash */
|
||||
.interrupts :
|
||||
{
|
||||
__VECTOR_TABLE = .;
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.isr_vector)) /* Startup code */
|
||||
. = ALIGN(4);
|
||||
} > m_interrupts
|
||||
|
||||
.flash_config :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
KEEP(*(.FlashConfig)) /* Flash Configuration Field (FCF) */
|
||||
. = ALIGN(4);
|
||||
} > m_flash_config
|
||||
|
||||
/* The program code and other data goes into internal flash */
|
||||
.text :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
*(.text) /* .text sections (code) */
|
||||
*(.text*) /* .text* sections (code) */
|
||||
*(.rodata) /* .rodata sections (constants, strings, etc.) */
|
||||
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||
*(.glue_7) /* glue arm to thumb code */
|
||||
*(.glue_7t) /* glue thumb to arm code */
|
||||
*(.eh_frame)
|
||||
KEEP (*(.init))
|
||||
KEEP (*(.fini))
|
||||
. = ALIGN(4);
|
||||
} > m_text
|
||||
|
||||
.ARM.extab :
|
||||
{
|
||||
*(.ARM.extab* .gnu.linkonce.armextab.*)
|
||||
} > m_text
|
||||
|
||||
.ARM :
|
||||
{
|
||||
__exidx_start = .;
|
||||
*(.ARM.exidx*)
|
||||
__exidx_end = .;
|
||||
} > m_text
|
||||
|
||||
.ctors :
|
||||
{
|
||||
__CTOR_LIST__ = .;
|
||||
/* gcc uses crtbegin.o to find the start of
|
||||
the constructors, so we make sure it is
|
||||
first. Because this is a wildcard, it
|
||||
doesn't matter if the user does not
|
||||
actually link against crtbegin.o; the
|
||||
linker won't look for a file to match a
|
||||
wildcard. The wildcard also means that it
|
||||
doesn't matter which directory crtbegin.o
|
||||
is in. */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*crtbegin?.o(.ctors))
|
||||
/* We don't want to include the .ctor section from
|
||||
from the crtend.o file until after the sorted ctors.
|
||||
The .ctor section from the crtend file contains the
|
||||
end of ctors marker and it must be last */
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
__CTOR_END__ = .;
|
||||
} > m_text
|
||||
|
||||
.dtors :
|
||||
{
|
||||
__DTOR_LIST__ = .;
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*crtbegin?.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
__DTOR_END__ = .;
|
||||
} > m_text
|
||||
|
||||
.preinit_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__preinit_array_start = .);
|
||||
KEEP (*(.preinit_array*))
|
||||
PROVIDE_HIDDEN (__preinit_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.init_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__init_array_start = .);
|
||||
KEEP (*(SORT(.init_array.*)))
|
||||
KEEP (*(.init_array*))
|
||||
PROVIDE_HIDDEN (__init_array_end = .);
|
||||
} > m_text
|
||||
|
||||
.fini_array :
|
||||
{
|
||||
PROVIDE_HIDDEN (__fini_array_start = .);
|
||||
KEEP (*(SORT(.fini_array.*)))
|
||||
KEEP (*(.fini_array*))
|
||||
PROVIDE_HIDDEN (__fini_array_end = .);
|
||||
} > m_text
|
||||
|
||||
__etext = .; /* define a global symbol at end of code */
|
||||
__DATA_ROM = .; /* Symbol is used by startup for data initialization */
|
||||
|
||||
.interrupts_ram :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__VECTOR_RAM__ = .;
|
||||
__interrupts_ram_start__ = .; /* Create a global symbol at data start */
|
||||
*(.m_interrupts_ram) /* This is a user defined section */
|
||||
. += M_VECTOR_RAM_SIZE;
|
||||
. = ALIGN(4);
|
||||
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
|
||||
} > m_data
|
||||
|
||||
__VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
|
||||
__RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
|
||||
|
||||
.data : AT(__DATA_ROM)
|
||||
{
|
||||
. = ALIGN(4);
|
||||
__DATA_RAM = .;
|
||||
__data_start__ = .; /* create a global symbol at data start */
|
||||
*(.data) /* .data sections */
|
||||
*(.data*) /* .data* sections */
|
||||
KEEP(*(.jcr*))
|
||||
. = ALIGN(4);
|
||||
__data_end__ = .; /* define a global symbol at data end */
|
||||
} > m_data
|
||||
|
||||
__DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
|
||||
text_end = ORIGIN(m_text) + LENGTH(m_text);
|
||||
ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
|
||||
|
||||
USB_RAM_GAP = DEFINED(__usb_ram_size__) ? __usb_ram_size__ : 0x800;
|
||||
/* Uninitialized data section */
|
||||
.bss :
|
||||
{
|
||||
/* This is used by the startup in order to initialize the .bss section */
|
||||
. = ALIGN(4);
|
||||
__START_BSS = .;
|
||||
__bss_start__ = .;
|
||||
*(.bss)
|
||||
*(.bss*)
|
||||
. = ALIGN(512);
|
||||
USB_RAM_START = .;
|
||||
. += USB_RAM_GAP;
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
__bss_end__ = .;
|
||||
__END_BSS = .;
|
||||
} > m_data
|
||||
|
||||
.heap :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
__HeapBase = .;
|
||||
. += HEAP_SIZE;
|
||||
__HeapLimit = .;
|
||||
__heap_limit = .; /* Add for _sbrk */
|
||||
} > m_data_2
|
||||
|
||||
.stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
. += STACK_SIZE;
|
||||
} > m_data_2
|
||||
|
||||
m_usb_bdt USB_RAM_START (NOLOAD) :
|
||||
{
|
||||
*(m_usb_bdt)
|
||||
USB_RAM_BDT_END = .;
|
||||
}
|
||||
|
||||
m_usb_global USB_RAM_BDT_END (NOLOAD) :
|
||||
{
|
||||
*(m_usb_global)
|
||||
}
|
||||
|
||||
/* Initializes stack on the end of block */
|
||||
__StackTop = ORIGIN(m_data_2) + LENGTH(m_data_2);
|
||||
__StackLimit = __StackTop - STACK_SIZE;
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region m_data_2 overflowed with stack and heap")
|
||||
}
|
||||
|
||||
@ -0,0 +1,64 @@
|
||||
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
|
||||
<launchConfiguration type="ilg.gnuarmeclipse.debug.gdbjtag.openocd.launchConfigurationType">
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doConnectToRunning" value="false"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doContinue" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doDebugInRam" value="false"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doFirstReset" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doGdbServerAllocateConsole" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doGdbServerAllocateTelnetConsole" value="false"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doSecondReset" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.doStartGdbServer" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.enableSemihosting" value="true"/>
|
||||
<booleanAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.enableSemihostingIoclientTelnet" value="false"/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.firstResetType" value="init"/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbClientOtherCommands" value="set mem inaccessible-by-default off"/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbClientOtherOptions" value=""/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerConnectionAddress" value=""/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerExecutable" value="/opt/Freescale/KDS_v3/openocd/bin/openocd"/>
|
||||
<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerGdbPortNumber" value="3333"/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerLog" value=""/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerOther" value="-f kinetis.cfg"/>
|
||||
<intAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.gdbServerTelnetPortNumber" value="4444"/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.otherInitCommands" value=""/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.otherRunCommands" value=""/>
|
||||
<stringAttribute key="ilg.gnuarmeclipse.debug.gdbjtag.openocd.secondResetType" value="halt"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.imageOffset" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.ipAddress" value="localhost"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.jtagDevice" value="GNU ARM OpenOCD"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.loadSymbols" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.pcRegister" value=""/>
|
||||
<intAttribute key="org.eclipse.cdt.debug.gdbjtag.core.portNumber" value="3333"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setPcRegister" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setResume" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.setStopAt" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.stopAt" value="main"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsFileName" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.gdbjtag.core.symbolsOffset" value=""/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForImage" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useFileForSymbols" value="false"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForImage" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useProjBinaryForSymbols" value="true"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.gdbjtag.core.useRemoteTarget" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/>
|
||||
<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/>
|
||||
<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${cross_prefix}gdb${cross_suffix}"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.dsf.gdb.UPDATE_THREADLIST_ON_SUSPEND" value="false"/>
|
||||
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="debug/Mongoose_FRDMK64F_BM.elf"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="Mongoose_FRDMK64F_BM"/>
|
||||
<booleanAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_AUTO_ATTR" value="true"/>
|
||||
<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.1792027861"/>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
|
||||
<listEntry value="/Mongoose_FRDMK64F_BM"/>
|
||||
</listAttribute>
|
||||
<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES">
|
||||
<listEntry value="4"/>
|
||||
</listAttribute>
|
||||
<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="Context string"/> "/>
|
||||
<stringAttribute key="process_factory_id" value="org.eclipse.cdt.dsf.gdb.GdbProcessFactory"/>
|
||||
</launchConfiguration>
|
||||
9
examples/NXP_K64/kds/Mongoose_FRDMK64F_BM.wsd
Normal file
9
examples/NXP_K64/kds/Mongoose_FRDMK64F_BM.wsd
Normal file
@ -0,0 +1,9 @@
|
||||
<?xml version="1.0"?>
|
||||
<workspace xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="workingsets.xsd">
|
||||
<projects>
|
||||
<project><name>Mongoose_FRDMK64F_BM</name><path>.</path><open>true</open><activeconfig>debug</activeconfig><buildreferences config="debug">false</buildreferences><activeconfig>release</activeconfig><buildreferences config="release">false</buildreferences></project></projects>
|
||||
<workingsets>
|
||||
<workingSet editPageId="org.eclipse.cdt.ui.CElementWorkingSetPage" id="1323268527287_1" label="Mongoose_FRDMK64F_BM" name="Mongoose_FRDMK64F_BM"><item factoryID="org.eclipse.cdt.ui.PersistableCElementFactory" path="/Mongoose_FRDMK64F_BM" type="4"/></workingSet></workingsets>
|
||||
<cdtconfigurations>
|
||||
<workingSet name="Mongoose_FRDMK64F_BM"><config name="debug"><project config="com.freescale.arm.cdt.toolchain.config.arm.release.695495605" name="Mongoose_FRDMK64F_BM" configName="debug"/></config><config name="release"><project config="com.freescale.arm.cdt.toolchain.config.arm.release.695495605" name="Mongoose_FRDMK64F_BM" configName="release"/></config></workingSet></cdtconfigurations>
|
||||
</workspace>
|
||||
157
examples/NXP_K64/main.c
Normal file
157
examples/NXP_K64/main.c
Normal file
@ -0,0 +1,157 @@
|
||||
/*
|
||||
* Copyright (c) 2014-2016 Cesanta Software Limited
|
||||
* All rights reserved
|
||||
*/
|
||||
|
||||
#include "mongoose.h"
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#include "lwip/dhcp.h"
|
||||
#include "lwip/init.h"
|
||||
#include "lwip/netif.h"
|
||||
#include "lwip/timers.h"
|
||||
#include "netif/etharp.h"
|
||||
|
||||
#include "ethernetif.h"
|
||||
#include "board.h"
|
||||
#include "fsl_gpio.h"
|
||||
#include "fsl_port.h"
|
||||
|
||||
#include "pin_mux.h"
|
||||
|
||||
/* IP address configuration. */
|
||||
#define USE_DHCP 1 /* For static IP, set to 0 and configure options below */
|
||||
#if !USE_DHCP
|
||||
#define STATIC_IP "192.168.0.111"
|
||||
#define STATIC_NM "255.255.255.0"
|
||||
#define STATIC_GW "192.168.0.1"
|
||||
#endif
|
||||
|
||||
void gpio_init() {
|
||||
CLOCK_EnableClock(kCLOCK_PortA);
|
||||
CLOCK_EnableClock(kCLOCK_PortB);
|
||||
CLOCK_EnableClock(kCLOCK_PortE);
|
||||
PORT_SetPinMux(BOARD_LED_RED_GPIO_PORT, BOARD_LED_RED_GPIO_PIN,
|
||||
kPORT_MuxAsGpio);
|
||||
LED_RED_INIT(0);
|
||||
PORT_SetPinMux(BOARD_LED_GREEN_GPIO_PORT, BOARD_LED_GREEN_GPIO_PIN,
|
||||
kPORT_MuxAsGpio);
|
||||
LED_GREEN_INIT(0);
|
||||
PORT_SetPinMux(BOARD_LED_BLUE_GPIO_PORT, BOARD_LED_BLUE_GPIO_PIN,
|
||||
kPORT_MuxAsGpio);
|
||||
LED_BLUE_INIT(0);
|
||||
LED_BLUE_OFF();
|
||||
}
|
||||
|
||||
void ev_handler(struct mg_connection *nc, int ev, void *ev_data) {
|
||||
if (ev == MG_EV_POLL) return;
|
||||
/* printf("ev %d\n", ev); */
|
||||
switch (ev) {
|
||||
case MG_EV_ACCEPT: {
|
||||
char addr[32];
|
||||
mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
|
||||
MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
|
||||
printf("%p: Connection from %s\n", nc, addr);
|
||||
break;
|
||||
}
|
||||
case MG_EV_HTTP_REQUEST: {
|
||||
struct http_message *hm = (struct http_message *) ev_data;
|
||||
char addr[32];
|
||||
mg_sock_addr_to_str(&nc->sa, addr, sizeof(addr),
|
||||
MG_SOCK_STRINGIFY_IP | MG_SOCK_STRINGIFY_PORT);
|
||||
printf("%p: %.*s %.*s\n", nc, (int) hm->method.len, hm->method.p,
|
||||
(int) hm->uri.len, hm->uri.p);
|
||||
mg_send_response_line(nc, 200,
|
||||
"Content-Type: text/html\r\n"
|
||||
"Connection: close");
|
||||
mg_printf(nc,
|
||||
"\r\n<h1>Hello, %s!</h1>\r\n"
|
||||
"You asked for %.*s\r\n",
|
||||
addr, (int) hm->uri.len, hm->uri.p);
|
||||
nc->flags |= MG_F_SEND_AND_CLOSE;
|
||||
LED_BLUE_TOGGLE();
|
||||
break;
|
||||
}
|
||||
case MG_EV_CLOSE: {
|
||||
printf("%p: Connection closed\n", nc);
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This is a callback invoked by Mongoose to signal that a poll is needed soon.
|
||||
* Since we're in a tight polling loop anyway (see below), we don't need to do
|
||||
* anything.
|
||||
*/
|
||||
void mg_lwip_mgr_schedule_poll(struct mg_mgr *mgr) {
|
||||
}
|
||||
|
||||
int main(void) {
|
||||
struct netif eth0;
|
||||
MPU_Type *base = MPU;
|
||||
BOARD_InitPins();
|
||||
BOARD_BootClockRUN();
|
||||
BOARD_InitDebugConsole();
|
||||
/* Disable MPU. */
|
||||
base->CESR &= ~MPU_CESR_VLD_MASK;
|
||||
lwip_init();
|
||||
gpio_init();
|
||||
LED_RED_ON();
|
||||
printf("Waiting for link...\n");
|
||||
#if USE_DHCP
|
||||
netif_add(ð0, NULL, NULL, NULL, NULL, ethernetif_init, ethernet_input);
|
||||
printf("Waiting for DHCP...\n");
|
||||
LED_GREEN_ON();
|
||||
dhcp_start(ð0);
|
||||
u8_t os = 0xff, ds;
|
||||
do {
|
||||
ds = eth0.dhcp->state;
|
||||
if (ds != os) {
|
||||
printf(" DHCP state: %d\n", ds);
|
||||
os = ds;
|
||||
}
|
||||
sys_check_timeouts();
|
||||
} while (ds != DHCP_BOUND);
|
||||
printf("Waiting for DHCP...\n");
|
||||
#else
|
||||
ip_addr_t ip, nm, gw;
|
||||
if (!ipaddr_aton(STATIC_IP, &ip) || !ipaddr_aton(STATIC_NM, &nm) ||
|
||||
!ipaddr_aton(STATIC_GW, &gw)) {
|
||||
printf("Invalid static IP configuration.\n");
|
||||
return 1;
|
||||
} else {
|
||||
netif_add(ð0, &ip, &nm, &gw, NULL, ethernetif_init, ethernet_input);
|
||||
netif_set_up(ð0);
|
||||
}
|
||||
#endif
|
||||
netif_set_default(ð0);
|
||||
printf("Setting up HTTP server...\n");
|
||||
|
||||
struct mg_mgr mgr;
|
||||
mg_mgr_init(&mgr, NULL);
|
||||
|
||||
const char *err;
|
||||
struct mg_bind_opts opts = {};
|
||||
opts.error_string = &err;
|
||||
struct mg_connection *nc = mg_bind_opt(&mgr, "80", ev_handler, opts);
|
||||
if (nc == NULL) {
|
||||
printf("Failed to create listener: %s\n", err);
|
||||
LED_RED_ON();
|
||||
LED_GREEN_OFF();
|
||||
return 1;
|
||||
}
|
||||
mg_set_protocol_http_websocket(nc);
|
||||
printf("Server address: http://%s/\n", ipaddr_ntoa(ð0.ip_addr));
|
||||
LED_RED_OFF();
|
||||
LED_GREEN_ON();
|
||||
|
||||
while (1) {
|
||||
sys_check_timeouts();
|
||||
mg_mgr_poll(&mgr, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
97
examples/NXP_K64/pin_mux.c
Normal file
97
examples/NXP_K64/pin_mux.c
Normal file
@ -0,0 +1,97 @@
|
||||
/* clang-format off */
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "fsl_device_registers.h"
|
||||
#include "fsl_common.h"
|
||||
#include "fsl_port.h"
|
||||
#include "pin_mux.h"
|
||||
|
||||
/*******************************************************************************
|
||||
* Code
|
||||
******************************************************************************/
|
||||
void BOARD_InitPins(void)
|
||||
{
|
||||
port_pin_config_t configENET = {0};
|
||||
|
||||
/* Initialize UART0 pins below */
|
||||
/* Ungate the port clock */
|
||||
/* Ungate the port clock */
|
||||
CLOCK_EnableClock(kCLOCK_PortB);
|
||||
/* Affects PORTB_PCR16 register */
|
||||
PORT_SetPinMux(PORTB, 16u, kPORT_MuxAlt3);
|
||||
/* Affects PORTB_PCR17 register */
|
||||
PORT_SetPinMux(PORTB, 17u, kPORT_MuxAlt3);
|
||||
|
||||
CLOCK_EnableClock(kCLOCK_PortC);
|
||||
/* Affects PORTC_PCR16 register */
|
||||
PORT_SetPinMux(PORTC, 16u, kPORT_MuxAlt4);
|
||||
/* Affects PORTC_PCR17 register */
|
||||
PORT_SetPinMux(PORTC, 17u, kPORT_MuxAlt4);
|
||||
/* Affects PORTC_PCR18 register */
|
||||
PORT_SetPinMux(PORTC, 18u, kPORT_MuxAlt4);
|
||||
/* Affects PORTC_PCR19 register */
|
||||
PORT_SetPinMux(PORTC, 19u, kPORT_MuxAlt4);
|
||||
/* Affects PORTB_PCR1 register */
|
||||
PORT_SetPinMux(PORTB, 1u, kPORT_MuxAlt4);
|
||||
|
||||
configENET.openDrainEnable = kPORT_OpenDrainEnable;
|
||||
configENET.mux = kPORT_MuxAlt4;
|
||||
configENET.pullSelect = kPORT_PullUp;
|
||||
/* Ungate the port clock */
|
||||
CLOCK_EnableClock(kCLOCK_PortA);
|
||||
/* Affects PORTB_PCR0 register */
|
||||
PORT_SetPinConfig(PORTB, 0u, &configENET);
|
||||
|
||||
/* Affects PORTA_PCR13 register */
|
||||
PORT_SetPinMux(PORTA, 13u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR12 register */
|
||||
PORT_SetPinMux(PORTA, 12u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR14 register */
|
||||
PORT_SetPinMux(PORTA, 14u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR5 register */
|
||||
PORT_SetPinMux(PORTA, 5u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR16 register */
|
||||
PORT_SetPinMux(PORTA, 16u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR17 register */
|
||||
PORT_SetPinMux(PORTA, 17u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR15 register */
|
||||
PORT_SetPinMux(PORTA, 15u, kPORT_MuxAlt4);
|
||||
/* Affects PORTA_PCR28 register */
|
||||
PORT_SetPinMux(PORTA, 28u, kPORT_MuxAlt4);
|
||||
|
||||
/* Enable SW port clock */
|
||||
CLOCK_EnableClock(kCLOCK_PortA);
|
||||
/* Affects PORTA_PCR4 register */
|
||||
port_pin_config_t config = {0};
|
||||
config.pullSelect = kPORT_PullUp;
|
||||
config.mux = kPORT_MuxAsGpio;
|
||||
PORT_SetPinConfig(PORTA, 4U, &config);
|
||||
}
|
||||
49
examples/NXP_K64/pin_mux.h
Normal file
49
examples/NXP_K64/pin_mux.h
Normal file
@ -0,0 +1,49 @@
|
||||
/* clang-format off */
|
||||
/*
|
||||
* Copyright (c) 2015, Freescale Semiconductor, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* o Redistributions of source code must retain the above copyright notice, this list
|
||||
* of conditions and the following disclaimer.
|
||||
*
|
||||
* o Redistributions in binary form must reproduce the above copyright notice, this
|
||||
* list of conditions and the following disclaimer in the documentation and/or
|
||||
* other materials provided with the distribution.
|
||||
*
|
||||
* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
|
||||
* contributors may be used to endorse or promote products derived from this
|
||||
* software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _PIN_MUX_H_
|
||||
#define _PIN_MUX_H_
|
||||
|
||||
#if defined(__cplusplus)
|
||||
extern "C" {
|
||||
#endif /* __cplusplus */
|
||||
|
||||
/*!
|
||||
* @brief configure all pins for this demo/example
|
||||
*
|
||||
*/
|
||||
void BOARD_InitPins(void);
|
||||
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* _PIN_MUX_H_ */
|
||||
Loading…
Reference in New Issue
Block a user