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OTA RT1170
This commit is contained in:
robert
parent
69859c61e0
commit
9c4523f4fa
54
mongoose.c
54
mongoose.c
@ -5452,17 +5452,20 @@ bool mg_ota_end(void) {
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#if MG_OTA >= MG_OTA_RT1020 && MG_OTA <= MG_OTA_RT1064
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#if MG_OTA >= MG_OTA_RT1020 && MG_OTA <= MG_OTA_RT1170
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static bool mg_imxrt_write(void *, const void *, size_t);
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static bool mg_imxrt_swap(void);
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#if MG_OTA == MG_OTA_RT1064
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#define MG_IMXRT_FLASH_START 0x70000000
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#define FLEXSPI_NOR_INSTANCE 1
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#else
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#if MG_OTA <= MG_OTA_RT1060
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#define MG_IMXRT_FLASH_START 0x60000000
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#define FLEXSPI_NOR_INSTANCE 0
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#elif MG_OTA == MG_OTA_RT1064
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#define MG_IMXRT_FLASH_START 0x70000000
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#define FLEXSPI_NOR_INSTANCE 1
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#else // RT1170
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#define MG_IMXRT_FLASH_START 0x30000000
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#define FLEXSPI_NOR_INSTANCE 1
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#endif
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// TODO(): fill at init, support more devices in a dynamic way
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@ -5616,7 +5619,7 @@ struct mg_flexspi_nor_driver_interface {
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int (*xfer)(uint32_t instance, char *xfer);
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void (*clear_cache)(uint32_t instance);
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};
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#else
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#elif MG_OTA <= MG_OTA_RT1064
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// RT104x and RT106x support ROM API version 1.5
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struct mg_flexspi_nor_driver_interface {
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uint32_t version;
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@ -5635,11 +5638,48 @@ struct mg_flexspi_nor_driver_interface {
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int (*get_config)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *option);
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};
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#else
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// RT117x support ROM API version 1.7
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struct mg_flexspi_nor_driver_interface {
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uint32_t version;
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int (*init)(uint32_t instance, struct mg_flexspi_nor_config *config);
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int (*program)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t dst_addr, const uint32_t *src);
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int (*erase_all)(uint32_t instance, struct mg_flexspi_nor_config *config);
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int (*erase)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t start, uint32_t lengthInBytes);
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int (*read)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *dst, uint32_t addr, uint32_t lengthInBytes);
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uint32_t reserved;
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int (*xfer)(uint32_t instance, char *xfer);
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int (*update_lut)(uint32_t instance, uint32_t seqIndex,
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const uint32_t *lutBase, uint32_t seqNumber);
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int (*get_config)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *option);
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int (*erase_sector)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t address);
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int (*erase_block)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t address);
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void (*hw_reset)(uint32_t instance, uint32_t resetLogic);
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int (*wait_busy)(uint32_t instance, struct mg_flexspi_nor_config *config,
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bool isParallelMode, uint32_t address);
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int (*set_clock_source)(uint32_t instance, uint32_t clockSrc);
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void (*config_clock)(uint32_t instance, uint32_t freqOption,
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uint32_t sampleClkMode);
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};
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#endif
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#if MG_OTA <= MG_OTA_RT1064
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#define MG_FLEXSPI_BASE 0x402A8000
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#define flexspi_nor \
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(*((struct mg_flexspi_nor_driver_interface **) (*(uint32_t *) 0x0020001c + \
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16)))
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#else
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#define MG_FLEXSPI_BASE 0x400CC000
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#define flexspi_nor \
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(*((struct mg_flexspi_nor_driver_interface **) (*(uint32_t *) 0x0021001c + \
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12)))
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#endif
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static bool s_flash_irq_disabled;
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@ -5699,7 +5739,7 @@ MG_IRAM static void mg_spin(volatile uint32_t count) {
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}
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MG_IRAM static void flash_wait(void) {
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while ((*((volatile uint32_t *) (0x402A8000 + 0xE0)) & MG_BIT(1)) == 0)
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while ((*((volatile uint32_t *) (MG_FLEXSPI_BASE + 0xE0)) & MG_BIT(1)) == 0)
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mg_spin(1);
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}
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@ -2656,6 +2656,7 @@ void mg_rpc_list(struct mg_rpc_req *r);
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#define MG_OTA_RT1020 300 // IMXRT1020
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#define MG_OTA_RT1060 301 // IMXRT1060
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#define MG_OTA_RT1064 302 // IMXRT1064
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#define MG_OTA_RT1170 303 // IMXRT1170
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#define MG_OTA_MCXN 310 // MCXN947
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#define MG_OTA_FLASH 900 // OTA via an internal flash
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#define MG_OTA_ESP32 910 // ESP32 OTA implementation
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@ -14,6 +14,7 @@
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#define MG_OTA_RT1020 300 // IMXRT1020
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#define MG_OTA_RT1060 301 // IMXRT1060
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#define MG_OTA_RT1064 302 // IMXRT1064
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#define MG_OTA_RT1170 303 // IMXRT1170
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#define MG_OTA_MCXN 310 // MCXN947
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#define MG_OTA_FLASH 900 // OTA via an internal flash
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#define MG_OTA_ESP32 910 // ESP32 OTA implementation
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@ -2,17 +2,20 @@
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#include "log.h"
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#include "ota.h"
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#if MG_OTA >= MG_OTA_RT1020 && MG_OTA <= MG_OTA_RT1064
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#if MG_OTA >= MG_OTA_RT1020 && MG_OTA <= MG_OTA_RT1170
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static bool mg_imxrt_write(void *, const void *, size_t);
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static bool mg_imxrt_swap(void);
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#if MG_OTA == MG_OTA_RT1064
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#define MG_IMXRT_FLASH_START 0x70000000
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#define FLEXSPI_NOR_INSTANCE 1
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#else
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#if MG_OTA <= MG_OTA_RT1060
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#define MG_IMXRT_FLASH_START 0x60000000
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#define FLEXSPI_NOR_INSTANCE 0
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#elif MG_OTA == MG_OTA_RT1064
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#define MG_IMXRT_FLASH_START 0x70000000
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#define FLEXSPI_NOR_INSTANCE 1
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#else // RT1170
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#define MG_IMXRT_FLASH_START 0x30000000
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#define FLEXSPI_NOR_INSTANCE 1
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#endif
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// TODO(): fill at init, support more devices in a dynamic way
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@ -166,7 +169,7 @@ struct mg_flexspi_nor_driver_interface {
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int (*xfer)(uint32_t instance, char *xfer);
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void (*clear_cache)(uint32_t instance);
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};
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#else
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#elif MG_OTA <= MG_OTA_RT1064
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// RT104x and RT106x support ROM API version 1.5
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struct mg_flexspi_nor_driver_interface {
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uint32_t version;
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@ -185,11 +188,48 @@ struct mg_flexspi_nor_driver_interface {
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int (*get_config)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *option);
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};
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#else
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// RT117x support ROM API version 1.7
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struct mg_flexspi_nor_driver_interface {
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uint32_t version;
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int (*init)(uint32_t instance, struct mg_flexspi_nor_config *config);
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int (*program)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t dst_addr, const uint32_t *src);
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int (*erase_all)(uint32_t instance, struct mg_flexspi_nor_config *config);
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int (*erase)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t start, uint32_t lengthInBytes);
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int (*read)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *dst, uint32_t addr, uint32_t lengthInBytes);
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uint32_t reserved;
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int (*xfer)(uint32_t instance, char *xfer);
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int (*update_lut)(uint32_t instance, uint32_t seqIndex,
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const uint32_t *lutBase, uint32_t seqNumber);
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int (*get_config)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t *option);
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int (*erase_sector)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t address);
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int (*erase_block)(uint32_t instance, struct mg_flexspi_nor_config *config,
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uint32_t address);
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void (*hw_reset)(uint32_t instance, uint32_t resetLogic);
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int (*wait_busy)(uint32_t instance, struct mg_flexspi_nor_config *config,
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bool isParallelMode, uint32_t address);
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int (*set_clock_source)(uint32_t instance, uint32_t clockSrc);
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void (*config_clock)(uint32_t instance, uint32_t freqOption,
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uint32_t sampleClkMode);
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};
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#endif
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#if MG_OTA <= MG_OTA_RT1064
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#define MG_FLEXSPI_BASE 0x402A8000
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#define flexspi_nor \
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(*((struct mg_flexspi_nor_driver_interface **) (*(uint32_t *) 0x0020001c + \
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16)))
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#else
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#define MG_FLEXSPI_BASE 0x400CC000
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#define flexspi_nor \
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(*((struct mg_flexspi_nor_driver_interface **) (*(uint32_t *) 0x0021001c + \
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12)))
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#endif
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static bool s_flash_irq_disabled;
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@ -249,7 +289,7 @@ MG_IRAM static void mg_spin(volatile uint32_t count) {
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}
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MG_IRAM static void flash_wait(void) {
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while ((*((volatile uint32_t *) (0x402A8000 + 0xE0)) & MG_BIT(1)) == 0)
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while ((*((volatile uint32_t *) (MG_FLEXSPI_BASE + 0xE0)) & MG_BIT(1)) == 0)
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mg_spin(1);
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}
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