Split sys.h API over MG_SYS_*

This commit is contained in:
cpq 2023-09-25 07:33:38 +01:00
parent 7e75e51332
commit a0f8a197c9
11 changed files with 96 additions and 30 deletions

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@ -2,11 +2,11 @@
#define MG_ARCH MG_ARCH_NEWLIB
#define MG_OTA MG_OTA_FLASH
#define MG_SYS MG_SYS_STM32H5
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_CUSTOM_MILLIS 1
#define MG_ENABLE_CUSTOM_RANDOM 1
#define MG_ENABLE_PACKED_FS 1
#define MG_ENABLE_DRIVER_STM32H 1
#define MG_ENABLE_STM32H5 1
#define MG_ENABLE_LINES 1

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@ -2,11 +2,11 @@
#define MG_ARCH MG_ARCH_NEWLIB
#define MG_OTA MG_OTA_FLASH
#define MG_SYS MG_SYS_STM32H7
#define MG_ENABLE_TCPIP 1
#define MG_ENABLE_CUSTOM_MILLIS 1
#define MG_ENABLE_CUSTOM_RANDOM 1
#define MG_ENABLE_PACKED_FS 1
#define MG_ENABLE_DRIVER_STM32H 1
#define MG_ENABLE_STM32H7 1
#define MG_ENABLE_LINES 1

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@ -4979,8 +4979,6 @@ size_t mg_ota_size(int fw) {
(void) fw;
return 0;
}
void mg_sys_reset(void) {
}
#endif
#ifdef MG_ENABLE_LINES
@ -6844,6 +6842,42 @@ bool mg_path_is_sane(const char *path) {
return true;
}
#ifdef MG_ENABLE_LINES
#line 1 "src/sys_dummy.c"
#endif
#if MG_SYS == MG_SYS_NONE
void *mg_flash_start(void) {
return NULL;
}
size_t mg_flash_size(void) {
return 0;
}
size_t mg_flash_sector_size(void) {
return 0;
}
size_t mg_flash_write_align(void) {
return 0;
}
int mg_flash_bank(void) {
return 0;
}
bool mg_flash_erase(void *location) {
(void) location;
return false;
}
bool mg_flash_swap_bank(void) {
return true;
}
bool mg_flash_write(void *addr, const void *buf, size_t len) {
(void) addr, (void) buf, (void) len;
return false;
}
void mg_sys_reset(void) {
}
#endif
#ifdef MG_ENABLE_LINES
#line 1 "src/sys_stm32h5.c"
#endif
@ -6851,7 +6885,7 @@ bool mg_path_is_sane(const char *path) {
#if MG_ENABLE_STM32H5
#if MG_SYS == MG_SYS_STM32H5
#define FLASH_BASE 0x40022000 // Base address of the flash controller
#define FLASH_KEYR (FLASH_BASE + 0x4) // See RM0481 7.11
@ -6998,7 +7032,7 @@ void mg_sys_reset(void) {
#if MG_ENABLE_STM32H7
#if MG_SYS == MG_SYS_STM32H7
#define FLASH_BASE1 0x52002000 // Base address for bank1
#define FLASH_BASE2 0x52002100 // Base address for bank2

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@ -815,14 +815,6 @@ struct timeval {
#define MG_EPOLL_MOD(c, wr)
#endif
#ifndef MG_ENABLE_STM32H5
#define MG_ENABLE_STM32H5 0
#endif
#ifndef MG_ENABLE_STM32H7
#define MG_ENABLE_STM32H7 0
#endif
@ -1702,13 +1694,20 @@ size_t mg_ota_size(int firmware); // Firmware size
bool mg_ota_commit(void); // Commit current firmware
bool mg_ota_rollback(void); // Rollback to the previous firmware
void mg_sys_reset(void); // Reboot device immediately
// Copyright (c) 2023 Cesanta Software Limited
// All rights reserved
#define MG_SYS_NONE 0 // Dummy system
#define MG_SYS_STM32H5 1 // STM32 H5
#define MG_SYS_STM32H7 2 // STM32 H7
#define MG_SYS_CUSTOM 100 // Custom implementation
#ifndef MG_SYS
#define MG_SYS MG_SYS_NONE
#endif
// Flash information
void *mg_flash_start(void); // Return flash start address
size_t mg_flash_size(void); // Return flash size
@ -1726,6 +1725,8 @@ bool mg_flash_swap_bank(void);
bool mg_flash_load(void *sector, uint32_t key, void *buf, size_t len);
bool mg_flash_save(void *sector, uint32_t key, const void *buf, size_t len);
void mg_sys_reset(void); // Reboot device immediately

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@ -149,11 +149,3 @@
#define MG_EPOLL_ADD(c)
#define MG_EPOLL_MOD(c, wr)
#endif
#ifndef MG_ENABLE_STM32H5
#define MG_ENABLE_STM32H5 0
#endif
#ifndef MG_ENABLE_STM32H7
#define MG_ENABLE_STM32H7 0
#endif

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@ -33,5 +33,3 @@ size_t mg_ota_size(int firmware); // Firmware size
bool mg_ota_commit(void); // Commit current firmware
bool mg_ota_rollback(void); // Rollback to the previous firmware
void mg_sys_reset(void); // Reboot device immediately

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@ -35,6 +35,4 @@ size_t mg_ota_size(int fw) {
(void) fw;
return 0;
}
void mg_sys_reset(void) {
}
#endif

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@ -3,6 +3,15 @@
#pragma once
#define MG_SYS_NONE 0 // Dummy system
#define MG_SYS_STM32H5 1 // STM32 H5
#define MG_SYS_STM32H7 2 // STM32 H7
#define MG_SYS_CUSTOM 100 // Custom implementation
#ifndef MG_SYS
#define MG_SYS MG_SYS_NONE
#endif
// Flash information
void *mg_flash_start(void); // Return flash start address
size_t mg_flash_size(void); // Return flash size
@ -19,3 +28,5 @@ bool mg_flash_swap_bank(void);
// If `sector` is NULL, then the last sector of flash is used
bool mg_flash_load(void *sector, uint32_t key, void *buf, size_t len);
bool mg_flash_save(void *sector, uint32_t key, const void *buf, size_t len);
void mg_sys_reset(void); // Reboot device immediately

32
src/sys_dummy.c Normal file
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@ -0,0 +1,32 @@
#include "sys.h"
#if MG_SYS == MG_SYS_NONE
void *mg_flash_start(void) {
return NULL;
}
size_t mg_flash_size(void) {
return 0;
}
size_t mg_flash_sector_size(void) {
return 0;
}
size_t mg_flash_write_align(void) {
return 0;
}
int mg_flash_bank(void) {
return 0;
}
bool mg_flash_erase(void *location) {
(void) location;
return false;
}
bool mg_flash_swap_bank(void) {
return true;
}
bool mg_flash_write(void *addr, const void *buf, size_t len) {
(void) addr, (void) buf, (void) len;
return false;
}
void mg_sys_reset(void) {
}
#endif

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@ -2,7 +2,7 @@
#include "log.h"
#include "ota.h"
#if MG_ENABLE_STM32H5
#if MG_SYS == MG_SYS_STM32H5
#define FLASH_BASE 0x40022000 // Base address of the flash controller
#define FLASH_KEYR (FLASH_BASE + 0x4) // See RM0481 7.11

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@ -2,7 +2,7 @@
#include "log.h"
#include "ota.h"
#if MG_ENABLE_STM32H7
#if MG_SYS == MG_SYS_STM32H7
#define FLASH_BASE1 0x52002000 // Base address for bank1
#define FLASH_BASE2 0x52002100 // Base address for bank2