mirror of
https://github.com/cesanta/mongoose.git
synced 2024-11-24 02:59:01 +08:00
move to Wizard
This commit is contained in:
Sergio R. Caprile
parent
c49036a713
commit
a7db0d3cc5
@ -1,51 +1,29 @@
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CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
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BOARD = tm4c129
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CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
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IDE = GCC+make
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CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
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RTOS = baremetal
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CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_tm4c/Device/TI/TM4C/Include
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WIZARD_URL ?= http://mongoose.ws/wizard
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CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 $(CFLAGS_EXTRA)
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LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
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SOURCES = main.c syscalls.c sysinit.c
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SOURCES += startup.c # startup file. Compiler-dependent!
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# Mongoose options are defined in mongoose_config.h
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SOURCES += mongoose.c net.c packed_fs.c
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# Example specific build options. See README.md
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CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
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ifeq ($(OS),Windows_NT)
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RM = cmd /C del /Q /F /S
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else
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RM = rm -rf
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endif
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all build example: firmware.bin
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all build example: firmware.bin
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firmware.bin: firmware.elf
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firmware.bin: wizard
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arm-none-eabi-objcopy -O binary $< $@
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make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
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firmware.elf: cmsis_core cmsis_tm4c $(SOURCES) hal.h link.ld
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wizard:
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arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
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hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
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&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
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unzip wizard.zip
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cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
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flash: firmware.bin
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@echo "This requires Uniflash"
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cmsis_core: # ARM CMSIS core headers
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git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
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cmsis_tm4c: # CMSIS headers for TM4C series
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git clone --depth 1 --no-checkout https://github.com/speters/CMSIS $@ && cd $@ && git sparse-checkout set Device/TI/TM4C && git checkout
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# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
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# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
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DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/1
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DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/1
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update: firmware.bin
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update: firmware.bin
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curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
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curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
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test update: CFLAGS += -DUART_DEBUG=UART0
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test update: CFLAGS_EXTRA ="-DUART_DEBUG=UART0"
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test: update
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test: update
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curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
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curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
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grep 'READY, IP:' /tmp/output.txt # Check for network init
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grep 'READY, IP:' /tmp/output.txt # Check for network init
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# grep 'MQTT connected' /tmp/output.txt # Check for MQTT connection success
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clean:
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clean:
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$(RM) firmware.* *.su cmsis_core cmsis_tm4c
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rm -rf firmware.* wizard*
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@ -1 +1 @@
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See detailed tutorial at https://mongoose.ws/tutorials/ti/ek-tm4c1294xl-baremetal/
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See [Wizard](https://mongoose.ws/wizard/#/output?board=tm4c129&ide=GCC+make&rtos=baremetal&file=README.md)
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@ -1,181 +0,0 @@
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// Copyright (c) 2022 Cesanta Software Limited
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// All rights reserved
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// https://www.ti.com/lit/pdf/spms433
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#pragma once
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#include "TM4C1294NCPDT.h"
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <string.h>
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#define BIT(x) (1UL << (x))
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#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
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#define PIN(bank, num) ((bank << 8) | (num))
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#define PINNO(pin) (pin & 255)
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#define PINBANK(pin) pinbank(pin >> 8)
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// This MCU doesn't have GPIOI nor GPIOO
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static inline unsigned int pinbank(unsigned int bank) {
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bank = bank > 'O' ? bank - 2 : bank > 'I' ? bank - 1 : bank;
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return bank - 'A';
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}
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// 5.5, Table 5-12: configure flash (and EEPROM) timing in accordance to clock
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// freq
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enum {
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PLL_CLK = 25,
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PLL_M = 96,
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PLL_N = 5,
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PLL_Q = 1,
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PSYSDIV = 4
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}; // Run at 120 Mhz
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#define PLL_FREQ (PLL_CLK * PLL_M / PLL_N / PLL_Q / PSYSDIV)
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#define FLASH_CLKHIGH 6
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#define FLASH_WAITST 5
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#define SYS_FREQUENCY (PLL_FREQ * 1000000)
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static inline void spin(volatile uint32_t count) {
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while (count--) (void) 0;
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}
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enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
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enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
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enum { GPIO_SPEED_LOW, GPIO_SPEED_HIGH };
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enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
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#define GPIO(bank) ((GPIOA_AHB_Type *) (GPIOA_AHB_BASE + 0x1000U * (bank)))
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// CMSIS header forces 0xFF mask when writing to DATA (see 10.6 in datasheet)
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// and does not seem to support that feature for writing by defining RESERVED0
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// to read-only
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static inline void gpio_toggle(uint16_t pin) {
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GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
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volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
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uint8_t mask = BIT(PINNO(pin));
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GPIODATA[mask] ^= mask;
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}
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static inline int gpio_read(uint16_t pin) {
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GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
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volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
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uint8_t mask = BIT(PINNO(pin));
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return GPIODATA[mask] ? 1 : 0;
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}
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static inline void gpio_write(uint16_t pin, bool val) {
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GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
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volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
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uint8_t mask = BIT(PINNO(pin));
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GPIODATA[mask] = val ? mask : 0;
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}
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static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
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uint8_t speed, uint8_t pull, uint8_t af) {
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GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
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uint8_t n = (uint8_t) (PINNO(pin));
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SYSCTL->RCGCGPIO |= BIT(PINBANK(pin)); // Enable GPIO clock
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if (mode == GPIO_MODE_ANALOG) {
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gpio->AMSEL |= BIT(PINNO(pin));
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return;
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}
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if (mode == GPIO_MODE_INPUT) {
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gpio->DIR &= ~BIT(PINNO(pin));
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} else if (mode == GPIO_MODE_OUTPUT) {
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gpio->DIR |= BIT(PINNO(pin));
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} else { // GPIO_MODE_AF
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SETBITS(gpio->PCTL, 15UL << ((n & 7) * 4),
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((uint32_t) af) << ((n & 7) * 4));
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gpio->AFSEL |= BIT(PINNO(pin));
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}
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gpio->DEN |= BIT(PINNO(pin)); // Enable pin as digital function
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if (type == GPIO_OTYPE_OPEN_DRAIN)
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gpio->ODR |= BIT(PINNO(pin));
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else // GPIO_OTYPE_PUSH_PULL
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gpio->ODR &= ~BIT(PINNO(pin));
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if (speed == GPIO_SPEED_LOW)
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gpio->SLR |= BIT(PINNO(pin));
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else // GPIO_SPEED_HIGH
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gpio->SLR &= ~BIT(PINNO(pin));
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if (pull == GPIO_PULL_UP) {
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gpio->PUR |= BIT(PINNO(pin)); // setting one...
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} else if (pull == GPIO_PULL_DOWN) {
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gpio->PDR |= BIT(PINNO(pin)); // ...just clears the other
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} else {
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gpio->PUR &= ~BIT(PINNO(pin));
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gpio->PDR &= ~BIT(PINNO(pin));
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}
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}
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static inline void gpio_input(uint16_t pin) {
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gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
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GPIO_PULL_NONE, 0);
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}
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static inline void gpio_output(uint16_t pin) {
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gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
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GPIO_PULL_NONE, 0);
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}
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static inline void gpio_irq_attach(uint16_t pin) {
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uint8_t irqvecs[] = {16, 17, 18, 19, 20, 30, 31, 32,
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51, 52, 53, 72, 73, 76, 84};
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GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
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gpio->IS &= ~BIT(PINNO(pin)); // edge sensitive
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gpio->IBE |= BIT(PINNO(pin)); // both edges
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gpio->IM |= BIT(PINNO(pin)); // enable pin irq
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int irqvec = irqvecs[PINBANK(pin)]; // IRQ vector index, 2.5.2
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NVIC_SetPriority(irqvec, 3);
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NVIC_EnableIRQ(irqvec);
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}
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#ifndef UART_DEBUG
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#define UART_DEBUG UART0
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#endif
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#define UART_OFFSET 0x1000
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#define UART(N) ((UART0_Type *) (UART0_BASE + UART_OFFSET * (N)))
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#define UARTNO(u) ((uint8_t) (((unsigned int) (u) -UART0_BASE) / UART_OFFSET))
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static inline void uart_init(UART0_Type *uart, unsigned long baud) {
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uint8_t af = 1; // Alternate function
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uint16_t rx = 0, tx = 0; // pins
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uint8_t uartno = UARTNO(uart);
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SYSCTL->RCGCUART |= BIT(uartno); // Enable peripheral clock
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if (uart == UART0) tx = PIN('A', 0), rx = PIN('A', 1);
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if (uart == UART1) tx = PIN('B', 0), rx = PIN('B', 1);
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if (uart == UART2) tx = PIN('A', 6), rx = PIN('A', 7); // or PD4, PD5...
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gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
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gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
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// (16.3.2) ClkDiv = 16 (HSE=0)
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// BRD = BRDI + BRDF = UARTSysClk / (ClkDiv * Baud Rate)
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// UARTFBRD[DIVFRAC] = integer(BRDF * 64 + 0.5)
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// must write in this order
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uart->CTL = 0; // Disable this UART, clear HSE
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uart->IBRD = SYS_FREQUENCY / (16 * baud); // Baud rate, integer part
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uart->FBRD = ((SYS_FREQUENCY % (16 * baud)) >> 26) &
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0x3F; // Baud rate, fractional part
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uart->LCRH = (3 << 5); // 8N1, no FIFOs;
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uart->CTL |= BIT(0) | BIT(9) | BIT(8); // Set UARTEN, RXE, TXE
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}
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static inline void uart_write_byte(UART0_Type *uart, uint8_t byte) {
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uart->DR = byte;
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while ((uart->FR & BIT(7)) == 0) spin(1);
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}
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static inline void uart_write_buf(UART0_Type *uart, char *buf, size_t len) {
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while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
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}
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static inline int uart_read_ready(UART0_Type *uart) {
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return uart->FR & BIT(6); // If RXFF bit is set, data is ready
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}
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static inline uint8_t uart_read_byte(UART0_Type *uart) {
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return (uint8_t) (uart->DR & 0xFF);
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}
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// Helper macro for reading pre-flashed MAC from user registers
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#define READ_PREFLASHED_MAC() \
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{ \
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(FLASH_CTRL->USERREG0 >> 0) & 0xFF, (FLASH_CTRL->USERREG0 >> 8) & 0xFF, \
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(FLASH_CTRL->USERREG0 >> 16) & 0xFF, \
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(FLASH_CTRL->USERREG1 >> 0) & 0xFF, \
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(FLASH_CTRL->USERREG1 >> 8) & 0xFF, \
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(FLASH_CTRL->USERREG1 >> 16) & 0xFF \
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}
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@ -1,29 +0,0 @@
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ENTRY(Reset_Handler);
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MEMORY {
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flash(rx) : ORIGIN = 0x00000000, LENGTH = 1024k
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sram(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
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}
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_estack = ORIGIN(sram) + LENGTH(sram); /* stack points to end of SRAM */
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SECTIONS {
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.vectors : { KEEP(*(.vectors)) } > flash
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.text : { *(.text* .text.*) } > flash
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.rodata : { *(.rodata*) } > flash
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.data : {
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_sdata = .; /* for init_ram() */
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*(.first_data)
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*(.data SORT(.data.*))
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_edata = .; /* for init_ram() */
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} > sram AT > flash
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_sidata = LOADADDR(.data);
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.bss : {
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_sbss = .; /* for init_ram() */
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*(.bss SORT(.bss.*) COMMON)
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_ebss = .; /* for init_ram() */
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} > sram
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. = ALIGN(8);
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_end = .; /* for cmsis_gcc.h and init_ram() */
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}
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@ -1,103 +0,0 @@
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// Copyright (c) 2022-2023 Cesanta Software Limited
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// All rights reserved
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#include "hal.h"
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#include "mongoose.h"
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#include "net.h"
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#define LED1 PIN('N', 1) // On-board LED pin
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#define LED2 PIN('N', 0) // On-board LED pin
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#define LED3 PIN('F', 4) // On-board LED pin
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#define LED4 PIN('F', 0) // On-board LED pin
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#define LED LED1 // Use this LED for blinking
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#define BLINK_PERIOD_MS 1000 // LED blinking period in millis
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static volatile uint64_t s_ticks; // Milliseconds since boot
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void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms
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s_ticks++;
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}
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uint64_t mg_millis(void) { // Let Mongoose use our uptime function
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return s_ticks; // Return number of milliseconds since boot
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}
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static void timer_fn(void *arg) {
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gpio_toggle(LED); // Blink LED
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struct mg_tcpip_if *ifp = arg; // And show
|
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const char *names[] = {"down", "up", "req", "ready"}; // network stats
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MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
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||||||
names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
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||||||
ifp->ndrop, ifp->nerr));
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}
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||||||
static void ethernet_init(void) {
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|
||||||
// Initialise Ethernet. Enable MAC GPIO pins, see
|
|
||||||
// https://www.ti.com/lit/pdf/spms433
|
|
||||||
// Assign LED3 and LED4 to the EPHY, "activity" and "link", respectively.
|
|
||||||
// (20.4.2.4)
|
|
||||||
gpio_init(LED3, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 5); // EN0LED1
|
|
||||||
gpio_init(LED4, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 5); // EN0LED0
|
|
||||||
NVIC_EnableIRQ(EMAC0_IRQn); // Setup Ethernet IRQ handler
|
|
||||||
// Initialize Ethernet clocks, see datasheet section 5
|
|
||||||
// Turn Flash Prefetch off (silicon errata ETH#02)
|
|
||||||
uint32_t val = FLASH_CTRL->CONF;
|
|
||||||
val &= ~BIT(17);
|
|
||||||
val |= BIT(16);
|
|
||||||
FLASH_CTRL->CONF = val;
|
|
||||||
SYSCTL->RCGCEMAC |= BIT(0); // Enable EMAC clock
|
|
||||||
SYSCTL->SREMAC |= BIT(0); // Reset EMAC
|
|
||||||
SYSCTL->SREMAC &= ~BIT(0);
|
|
||||||
SYSCTL->RCGCEPHY |= BIT(0); // Enable EPHY clock
|
|
||||||
SYSCTL->SREPHY |= BIT(0); // Reset EPHY
|
|
||||||
SYSCTL->SREPHY &= ~BIT(0);
|
|
||||||
while (!(SYSCTL->PREMAC & BIT(0)) || !(SYSCTL->PREPHY & BIT(0)))
|
|
||||||
spin(1); // Wait for reset to complete
|
|
||||||
}
|
|
||||||
|
|
||||||
int main(void) {
|
|
||||||
gpio_output(LED); // Setup leftmost LED
|
|
||||||
uart_init(UART_DEBUG, 115200); // Initialise debug printf
|
|
||||||
ethernet_init(); // Initialise ethernet pins
|
|
||||||
MG_INFO(("Starting, CPU freq %g MHz", (double) SystemCoreClock / 1000000));
|
|
||||||
|
|
||||||
struct mg_mgr mgr; // Initialise
|
|
||||||
mg_mgr_init(&mgr); // Mongoose event manager
|
|
||||||
mg_log_set(MG_LL_DEBUG); // Set log level
|
|
||||||
|
|
||||||
// Initialise Mongoose network stack
|
|
||||||
struct mg_tcpip_driver_tm4c_data driver_data = {.mdc_cr =
|
|
||||||
1}; // See driver_tm4c.h
|
|
||||||
struct mg_tcpip_if mif = {
|
|
||||||
.mac = READ_PREFLASHED_MAC(),
|
|
||||||
// Uncomment below for static configuration:
|
|
||||||
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
|
|
||||||
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
|
|
||||||
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
|
|
||||||
.driver = &mg_tcpip_driver_tm4c,
|
|
||||||
.driver_data = &driver_data,
|
|
||||||
};
|
|
||||||
mg_tcpip_init(&mgr, &mif);
|
|
||||||
uint32_t val = FLASH_CTRL->CONF; // Turn Flash Prefetch on again
|
|
||||||
val &= ~BIT(16);
|
|
||||||
val |= BIT(17);
|
|
||||||
FLASH_CTRL->CONF = val;
|
|
||||||
mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
|
|
||||||
|
|
||||||
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
|
|
||||||
while (mif.state != MG_TCPIP_STATE_READY) {
|
|
||||||
mg_mgr_poll(&mgr, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
MG_INFO(("Initialising application..."));
|
|
||||||
web_init(&mgr);
|
|
||||||
|
|
||||||
MG_INFO(("Starting event loop"));
|
|
||||||
for (;;) {
|
|
||||||
mg_mgr_poll(&mgr, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../../mongoose.c
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../../mongoose.h
|
|
||||||
@ -1,11 +0,0 @@
|
|||||||
#pragma once
|
|
||||||
|
|
||||||
// See https://mongoose.ws/documentation/#build-options
|
|
||||||
#define MG_ARCH MG_ARCH_NEWLIB
|
|
||||||
|
|
||||||
#define MG_ENABLE_TCPIP 1
|
|
||||||
#define MG_ENABLE_CUSTOM_MILLIS 1
|
|
||||||
#define MG_IO_SIZE 256
|
|
||||||
#define MG_ENABLE_PACKED_FS 1
|
|
||||||
#define MG_ENABLE_DRIVER_TM4C 1
|
|
||||||
#define MG_ENABLE_LINES 1
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/net.c
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/net.h
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/packed_fs.c
|
|
||||||
@ -1,168 +0,0 @@
|
|||||||
// Copyright (c) 2022 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
|
|
||||||
// Startup code
|
|
||||||
__attribute__((naked, noreturn)) void Reset_Handler(void) {
|
|
||||||
// Initialise memory
|
|
||||||
extern long _sbss, _ebss, _sdata, _edata, _sidata;
|
|
||||||
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
|
|
||||||
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
|
|
||||||
|
|
||||||
// Call the clock system initialization function
|
|
||||||
extern void SystemInit(void);
|
|
||||||
SystemInit();
|
|
||||||
// Call static constructors
|
|
||||||
extern void __libc_init_array(void);
|
|
||||||
__libc_init_array();
|
|
||||||
// Call the application entry point
|
|
||||||
extern void main(void);
|
|
||||||
main();
|
|
||||||
for (;;) (void) 0; // Infinite loop
|
|
||||||
}
|
|
||||||
|
|
||||||
void __attribute__((weak)) DefaultIRQHandler(void) {
|
|
||||||
for (;;) (void) 0;
|
|
||||||
}
|
|
||||||
#define WEAK_ALIAS __attribute__((weak, alias("DefaultIRQHandler")))
|
|
||||||
|
|
||||||
WEAK_ALIAS void NMI_Handler(void);
|
|
||||||
WEAK_ALIAS void HardFault_Handler(void);
|
|
||||||
WEAK_ALIAS void MemManage_Handler(void);
|
|
||||||
WEAK_ALIAS void BusFault_Handler(void);
|
|
||||||
WEAK_ALIAS void UsageFault_Handler(void);
|
|
||||||
WEAK_ALIAS void SVC_Handler(void);
|
|
||||||
WEAK_ALIAS void DebugMon_Handler(void);
|
|
||||||
WEAK_ALIAS void PendSV_Handler(void);
|
|
||||||
WEAK_ALIAS void SysTick_Handler(void);
|
|
||||||
|
|
||||||
WEAK_ALIAS void GPIOA_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOB_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOC_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOD_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOE_Handler(void);
|
|
||||||
WEAK_ALIAS void UART0_Handler(void);
|
|
||||||
WEAK_ALIAS void UART1_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI0_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C0_Handler(void);
|
|
||||||
WEAK_ALIAS void PMW0_FAULT_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_0_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_1_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_2_Handler(void);
|
|
||||||
WEAK_ALIAS void QEI0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS1_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS2_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS3_Handler(void);
|
|
||||||
WEAK_ALIAS void WDT0_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER0A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER0B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER1A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER1B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER2A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER2B_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP0_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP1_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP2_Handler(void);
|
|
||||||
WEAK_ALIAS void SYSCTL_Handler(void);
|
|
||||||
WEAK_ALIAS void FLASH_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOF_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOG_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOH_Handler(void);
|
|
||||||
WEAK_ALIAS void UART2_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI1_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER3A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER3B_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C1_Handler(void);
|
|
||||||
WEAK_ALIAS void CAN0_Handler(void);
|
|
||||||
WEAK_ALIAS void CAN1_Handler(void);
|
|
||||||
WEAK_ALIAS void EMAC0_IRQHandler(void);
|
|
||||||
WEAK_ALIAS void HIB_Handler(void);
|
|
||||||
WEAK_ALIAS void USB0_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_3_Handler(void);
|
|
||||||
WEAK_ALIAS void UDMA_Handler(void);
|
|
||||||
WEAK_ALIAS void UDMAERR_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS1_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS2_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS3_Handler(void);
|
|
||||||
WEAK_ALIAS void EPI0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOJ_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOK_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOL_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI2_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI3_Handler(void);
|
|
||||||
WEAK_ALIAS void UART3_Handler(void);
|
|
||||||
WEAK_ALIAS void UART4_Handler(void);
|
|
||||||
WEAK_ALIAS void UART5_Handler(void);
|
|
||||||
WEAK_ALIAS void UART6_Handler(void);
|
|
||||||
WEAK_ALIAS void UART7_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C2_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C3_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER4A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER4B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER5A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER5B_Handler(void);
|
|
||||||
WEAK_ALIAS void FPU_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C4_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOM_Handler(void);
|
|
||||||
WEAK_ALIAS void GPION_Handler(void);
|
|
||||||
WEAK_ALIAS void TAMPER_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP1_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP2_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP3_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP4_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP6_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP7_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ1_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ2_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ3_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ4_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ6_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ7_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER6A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER6B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER7A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER7B_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C6_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C7_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C8_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C9_Handler(void);
|
|
||||||
|
|
||||||
extern void _estack();
|
|
||||||
|
|
||||||
// IRQ table
|
|
||||||
__attribute__((section(".vectors"))) void (*tab[16 + 114])(void) = {
|
|
||||||
// Cortex interrupts
|
|
||||||
_estack, Reset_Handler, NMI_Handler, HardFault_Handler, MemManage_Handler,
|
|
||||||
BusFault_Handler, UsageFault_Handler, 0, 0, 0, 0, SVC_Handler,
|
|
||||||
DebugMon_Handler, 0, PendSV_Handler, SysTick_Handler,
|
|
||||||
|
|
||||||
// Interrupts from peripherals
|
|
||||||
GPIOA_Handler, GPIOB_Handler, GPIOC_Handler, GPIOD_Handler, GPIOE_Handler,
|
|
||||||
UART0_Handler, UART1_Handler, SSI0_Handler, I2C0_Handler,
|
|
||||||
PMW0_FAULT_Handler, PWM0_0_Handler, PWM0_1_Handler, PWM0_2_Handler,
|
|
||||||
QEI0_Handler, ADC0SS0_Handler, ADC0SS1_Handler, ADC0SS2_Handler,
|
|
||||||
ADC0SS3_Handler, WDT0_Handler, TIMER0A_Handler, TIMER0B_Handler,
|
|
||||||
TIMER1A_Handler, TIMER1B_Handler, TIMER2A_Handler, TIMER2B_Handler,
|
|
||||||
COMP0_Handler, COMP1_Handler, COMP2_Handler, SYSCTL_Handler, FLASH_Handler,
|
|
||||||
GPIOF_Handler, GPIOG_Handler, GPIOH_Handler, UART2_Handler, SSI1_Handler,
|
|
||||||
TIMER3A_Handler, TIMER3B_Handler, I2C1_Handler, CAN0_Handler, CAN1_Handler,
|
|
||||||
EMAC0_IRQHandler, HIB_Handler, USB0_Handler, PWM0_3_Handler, UDMA_Handler,
|
|
||||||
UDMAERR_Handler, ADC1SS0_Handler, ADC1SS1_Handler, ADC1SS2_Handler,
|
|
||||||
ADC1SS3_Handler, EPI0_Handler, GPIOJ_Handler, GPIOK_Handler, GPIOL_Handler,
|
|
||||||
SSI2_Handler, SSI3_Handler, UART3_Handler, UART4_Handler, UART5_Handler,
|
|
||||||
UART6_Handler, UART7_Handler, I2C2_Handler, I2C3_Handler, TIMER4A_Handler,
|
|
||||||
TIMER4B_Handler, TIMER5A_Handler, TIMER5B_Handler, FPU_Handler, 0, 0,
|
|
||||||
I2C4_Handler, I2C5_Handler, GPIOM_Handler, GPION_Handler, 0, TAMPER_Handler,
|
|
||||||
GPIOP0_Handler, GPIOP1_Handler, GPIOP2_Handler, GPIOP3_Handler,
|
|
||||||
GPIOP4_Handler, GPIOP5_Handler, GPIOP6_Handler, GPIOP7_Handler,
|
|
||||||
GPIOQ0_Handler, GPIOQ1_Handler, GPIOQ2_Handler, GPIOQ3_Handler,
|
|
||||||
GPIOQ4_Handler, GPIOQ5_Handler, GPIOQ6_Handler, GPIOQ7_Handler, 0, 0, 0, 0,
|
|
||||||
0, 0, TIMER6A_Handler, TIMER6B_Handler, TIMER7A_Handler, TIMER7B_Handler,
|
|
||||||
I2C6_Handler, I2C7_Handler, 0, 0, 0, 0, 0, I2C8_Handler, I2C9_Handler, 0, 0,
|
|
||||||
0};
|
|
||||||
@ -1,88 +0,0 @@
|
|||||||
#include <sys/stat.h>
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
|
|
||||||
int _fstat(int fd, struct stat *st) {
|
|
||||||
if (fd < 0) return -1;
|
|
||||||
st->st_mode = S_IFCHR;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void *_sbrk(int incr) {
|
|
||||||
extern char _end;
|
|
||||||
static unsigned char *heap = NULL;
|
|
||||||
unsigned char *prev_heap;
|
|
||||||
unsigned char x = 0, *heap_end = (unsigned char *)((size_t) &x - 512);
|
|
||||||
(void) x;
|
|
||||||
if (heap == NULL) heap = (unsigned char *) &_end;
|
|
||||||
prev_heap = heap;
|
|
||||||
if (heap + incr > heap_end) return (void *) -1;
|
|
||||||
heap += incr;
|
|
||||||
return prev_heap;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _open(const char *path) {
|
|
||||||
(void) path;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _close(int fd) {
|
|
||||||
(void) fd;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _isatty(int fd) {
|
|
||||||
(void) fd;
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _lseek(int fd, int ptr, int dir) {
|
|
||||||
(void) fd, (void) ptr, (void) dir;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void _exit(int status) {
|
|
||||||
(void) status;
|
|
||||||
for (;;) asm volatile("BKPT #0");
|
|
||||||
}
|
|
||||||
|
|
||||||
void _kill(int pid, int sig) {
|
|
||||||
(void) pid, (void) sig;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _getpid(void) {
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _write(int fd, char *ptr, int len) {
|
|
||||||
(void) fd, (void) ptr, (void) len;
|
|
||||||
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _read(int fd, char *ptr, int len) {
|
|
||||||
(void) fd, (void) ptr, (void) len;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _link(const char *a, const char *b) {
|
|
||||||
(void) a, (void) b;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _unlink(const char *a) {
|
|
||||||
(void) a;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _stat(const char *path, struct stat *st) {
|
|
||||||
(void) path, (void) st;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int mkdir(const char *path, mode_t mode) {
|
|
||||||
(void) path, (void) mode;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
void _init(void) {}
|
|
||||||
@ -1,36 +0,0 @@
|
|||||||
// Copyright (c) 2023 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
//
|
|
||||||
// This file contains essentials required by the CMSIS:
|
|
||||||
// uint32_t SystemCoreClock - holds the system core clock value
|
|
||||||
// SystemInit() - initialises the system, e.g. sets up clocks
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
|
|
||||||
uint32_t SystemCoreClock = SYS_FREQUENCY;
|
|
||||||
|
|
||||||
void SystemInit(void) { // Called automatically by startup code
|
|
||||||
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU
|
|
||||||
asm("DSB");
|
|
||||||
asm("ISB");
|
|
||||||
SETBITS(SYSCTL->MOSCCTL, BIT(3) | BIT(2),
|
|
||||||
BIT(4)); // Enable MOSC circuit (clear NOXTAL and PWRDN, set >10MHz
|
|
||||||
// range)
|
|
||||||
SETBITS(SYSCTL->MEMTIM0,
|
|
||||||
BIT(21) | BIT(5) | 0x1F << 21 | 0xF << 16 | 0x1F << 5 | 0xF << 0,
|
|
||||||
FLASH_CLKHIGH << 22 | FLASH_WAITST << 16 | FLASH_CLKHIGH << 5 |
|
|
||||||
FLASH_WAITST << 0); // Configure flash timing (not yet applied)
|
|
||||||
SETBITS(SYSCTL->RSCLKCFG, 0xF << 24 | (BIT(9) - 1),
|
|
||||||
3 << 24); // Clear PLL divider, set MOSC as PLL source
|
|
||||||
SYSCTL->PLLFREQ1 = (PLL_Q - 1) << 8 | (PLL_N - 1)
|
|
||||||
<< 0; // Set PLL_Q and PLL_N
|
|
||||||
SYSCTL->PLLFREQ0 =
|
|
||||||
BIT(23) | PLL_M << 0; // Set PLL_Q, power up PLL (if it were on, we'd
|
|
||||||
// need to set NEWFREQ in RSCLKCFG instead)
|
|
||||||
while ((SYSCTL->PLLSTAT & BIT(0)) == 0) spin(1); // Wait for lock
|
|
||||||
SYSCTL->RSCLKCFG |=
|
|
||||||
BIT(31) | BIT(28) |
|
|
||||||
(PSYSDIV - 1) << 0; // Update memory timing, use PLL, set clock divisor
|
|
||||||
|
|
||||||
SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
|
|
||||||
}
|
|
||||||
@ -1,37 +0,0 @@
|
|||||||
#pragma once
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
|
|
||||||
#define configUSE_PREEMPTION 1
|
|
||||||
#define configCPU_CLOCK_HZ SYS_FREQUENCY
|
|
||||||
#define configTICK_RATE_HZ 1000
|
|
||||||
#define configMAX_PRIORITIES 5
|
|
||||||
#define configUSE_16_BIT_TICKS 0
|
|
||||||
#define configUSE_TICK_HOOK 0
|
|
||||||
#define configUSE_IDLE_HOOK 0
|
|
||||||
#define configUSE_TIMERS 0
|
|
||||||
#define configUSE_CO_ROUTINES 0
|
|
||||||
#define configUSE_MALLOC_FAILED_HOOK 0
|
|
||||||
#define configMINIMAL_STACK_SIZE 128
|
|
||||||
#define configTOTAL_HEAP_SIZE (1024 * 128)
|
|
||||||
#define INCLUDE_vTaskDelay 1
|
|
||||||
|
|
||||||
#ifdef __NVIC_PRIO_BITS
|
|
||||||
#define configPRIO_BITS __NVIC_PRIO_BITS
|
|
||||||
#else
|
|
||||||
#define configPRIO_BITS 3
|
|
||||||
#endif
|
|
||||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
|
|
||||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
|
|
||||||
#define configKERNEL_INTERRUPT_PRIORITY \
|
|
||||||
(configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
|
|
||||||
|
|
||||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY \
|
|
||||||
(configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS))
|
|
||||||
|
|
||||||
#define configASSERT(expr) \
|
|
||||||
if (!(expr)) printf("FAILURE %s:%d: %s\n", __FILE__, __LINE__, #expr)
|
|
||||||
|
|
||||||
#define vPortSVCHandler SVC_Handler
|
|
||||||
#define xPortPendSVHandler PendSV_Handler
|
|
||||||
#define xPortSysTickHandler SysTick_Handler
|
|
||||||
@ -1,59 +1,29 @@
|
|||||||
CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion
|
BOARD = tm4c129
|
||||||
CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion
|
IDE = GCC+make
|
||||||
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections
|
RTOS = FreeRTOS
|
||||||
CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_tm4c/Device/TI/TM4C/Include
|
WIZARD_URL ?= http://mongoose.ws/wizard
|
||||||
CFLAGS += -mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 $(CFLAGS_EXTRA)
|
|
||||||
LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map
|
|
||||||
|
|
||||||
SOURCES = main.c syscalls.c sysinit.c
|
|
||||||
SOURCES += startup.c # startup file. Compiler-dependent!
|
|
||||||
|
|
||||||
# FreeRTOS
|
|
||||||
SOURCES += FreeRTOS-Kernel/portable/MemMang/heap_4.c
|
|
||||||
SOURCES += FreeRTOS-Kernel/portable/GCC/ARM_CM4F/port.c
|
|
||||||
CFLAGS += -IFreeRTOS-Kernel/include
|
|
||||||
CFLAGS += -IFreeRTOS-Kernel/portable/GCC/ARM_CM4F -Wno-conversion
|
|
||||||
|
|
||||||
# Mongoose options are defined in mongoose_config.h
|
|
||||||
SOURCES += mongoose.c net.c packed_fs.c
|
|
||||||
|
|
||||||
# Example specific build options. See README.md
|
|
||||||
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\"
|
|
||||||
|
|
||||||
ifeq ($(OS),Windows_NT)
|
|
||||||
RM = cmd /C del /Q /F /S
|
|
||||||
else
|
|
||||||
RM = rm -rf
|
|
||||||
endif
|
|
||||||
|
|
||||||
all build example: firmware.bin
|
all build example: firmware.bin
|
||||||
|
|
||||||
firmware.bin: firmware.elf
|
firmware.bin: wizard
|
||||||
arm-none-eabi-objcopy -O binary $< $@
|
make -C wizard CFLAGS_EXTRA=$(CFLAGS_EXTRA) && mv wizard/firmware.bin ./
|
||||||
|
|
||||||
firmware.elf: FreeRTOS-Kernel cmsis_core cmsis_tm4c $(SOURCES) hal.h link.ld
|
wizard:
|
||||||
arm-none-eabi-gcc $(SOURCES) $(wildcard FreeRTOS-Kernel/*.c) $(CFLAGS) $(LDFLAGS) -o $@
|
hash=$$(curl -s -X POST -H "Content-Type: application/json" -d '{"build":{"board":"$(BOARD)","ide":"$(IDE)","rtos":"$(RTOS)"}}' $(WIZARD_URL)/api/hash | jq -r '.hash') \
|
||||||
|
&& curl -s $(WIZARD_URL)/api/zip/$(BOARD)/$(IDE)/$(RTOS)/$$hash -o wizard.zip
|
||||||
|
unzip wizard.zip
|
||||||
|
cd wizard ; rm mongoose.[ch] ; ln -s ../../../../mongoose.c ; ln -s ../../../../mongoose.h
|
||||||
|
|
||||||
flash: firmware.bin
|
|
||||||
@echo "This requires Uniflash"
|
|
||||||
|
|
||||||
cmsis_core: # ARM CMSIS core headers
|
|
||||||
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@
|
|
||||||
cmsis_tm4c: # CMSIS headers for TM4C series
|
|
||||||
git clone --depth 1 --no-checkout https://github.com/speters/CMSIS $@ && cd $@ && git sparse-checkout set Device/TI/TM4C && git checkout
|
|
||||||
FreeRTOS-Kernel: # FreeRTOS sources
|
|
||||||
git clone --depth 1 -b V10.5.0 https://github.com/FreeRTOS/FreeRTOS-Kernel $@
|
|
||||||
|
|
||||||
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/
|
||||||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/1
|
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/1
|
||||||
update: firmware.bin
|
update: firmware.bin
|
||||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$<
|
||||||
|
|
||||||
test update: CFLAGS += -DUART_DEBUG=UART0
|
test update: CFLAGS_EXTRA ="-DUART_DEBUG=UART0"
|
||||||
test: update
|
test: update
|
||||||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt
|
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=15 | tee /tmp/output.txt
|
||||||
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
grep 'READY, IP:' /tmp/output.txt # Check for network init
|
||||||
# grep 'MQTT connected' /tmp/output.txt # Check for MQTT connection success
|
|
||||||
|
|
||||||
clean:
|
clean:
|
||||||
$(RM) firmware.* *.su cmsis_core cmsis_tm4c FreeRTOS-Kernel
|
rm -rf firmware.* wizard*
|
||||||
|
|||||||
@ -1 +1 @@
|
|||||||
See detailed tutorial at https://mongoose.ws/tutorials/ti/ek-tm4c1294xl-freertos/
|
See [Wizard](https://mongoose.ws/wizard/#/output?board=tm4c129&ide=GCC+make&rtos=baremetal&file=README.md)
|
||||||
|
|||||||
@ -1,185 +0,0 @@
|
|||||||
// Copyright (c) 2022 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
// https://www.ti.com/lit/pdf/spms433
|
|
||||||
|
|
||||||
#pragma once
|
|
||||||
|
|
||||||
#include "TM4C1294NCPDT.h"
|
|
||||||
|
|
||||||
#include <stdbool.h>
|
|
||||||
#include <stdint.h>
|
|
||||||
#include <stdio.h>
|
|
||||||
#include <string.h>
|
|
||||||
|
|
||||||
#define BIT(x) (1UL << (x))
|
|
||||||
#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
|
|
||||||
#define PIN(bank, num) ((bank << 8) | (num))
|
|
||||||
#define PINNO(pin) (pin & 255)
|
|
||||||
#define PINBANK(pin) pinbank(pin >> 8)
|
|
||||||
// This MCU doesn't have GPIOI nor GPIOO
|
|
||||||
static inline unsigned int pinbank(unsigned int bank) {
|
|
||||||
bank = bank > 'O' ? bank - 2 : bank > 'I' ? bank - 1 : bank;
|
|
||||||
return bank - 'A';
|
|
||||||
}
|
|
||||||
|
|
||||||
// 5.5, Table 5-12: configure flash (and EEPROM) timing in accordance to clock
|
|
||||||
// freq
|
|
||||||
enum {
|
|
||||||
PLL_CLK = 25,
|
|
||||||
PLL_M = 96,
|
|
||||||
PLL_N = 5,
|
|
||||||
PLL_Q = 1,
|
|
||||||
PSYSDIV = 4
|
|
||||||
}; // Run at 120 Mhz
|
|
||||||
#define PLL_FREQ (PLL_CLK * PLL_M / PLL_N / PLL_Q / PSYSDIV)
|
|
||||||
#define FLASH_CLKHIGH 6
|
|
||||||
#define FLASH_WAITST 5
|
|
||||||
#define SYS_FREQUENCY (PLL_FREQ * 1000000)
|
|
||||||
|
|
||||||
static inline void spin(volatile uint32_t count) {
|
|
||||||
while (count--) (void) 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
|
|
||||||
enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
|
|
||||||
enum { GPIO_SPEED_LOW, GPIO_SPEED_HIGH };
|
|
||||||
enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
|
|
||||||
#define GPIO(bank) ((GPIOA_AHB_Type *) (GPIOA_AHB_BASE + 0x1000U * (bank)))
|
|
||||||
|
|
||||||
// CMSIS header forces 0xFF mask when writing to DATA (see 10.6 in datasheet)
|
|
||||||
// and does not seem to support that feature for writing by defining RESERVED0
|
|
||||||
// to read-only
|
|
||||||
static inline void gpio_toggle(uint16_t pin) {
|
|
||||||
GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
|
|
||||||
volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
|
|
||||||
uint8_t mask = BIT(PINNO(pin));
|
|
||||||
GPIODATA[mask] ^= mask;
|
|
||||||
}
|
|
||||||
static inline int gpio_read(uint16_t pin) {
|
|
||||||
GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
|
|
||||||
volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
|
|
||||||
uint8_t mask = BIT(PINNO(pin));
|
|
||||||
return GPIODATA[mask] ? 1 : 0;
|
|
||||||
}
|
|
||||||
static inline void gpio_write(uint16_t pin, bool val) {
|
|
||||||
GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
|
|
||||||
volatile uint32_t *GPIODATA = (volatile uint32_t *) gpio->RESERVED0;
|
|
||||||
uint8_t mask = BIT(PINNO(pin));
|
|
||||||
GPIODATA[mask] = val ? mask : 0;
|
|
||||||
}
|
|
||||||
static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
|
|
||||||
uint8_t speed, uint8_t pull, uint8_t af) {
|
|
||||||
GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
|
|
||||||
uint8_t n = (uint8_t) (PINNO(pin));
|
|
||||||
SYSCTL->RCGCGPIO |= BIT(PINBANK(pin)); // Enable GPIO clock
|
|
||||||
if (mode == GPIO_MODE_ANALOG) {
|
|
||||||
gpio->AMSEL |= BIT(PINNO(pin));
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
if (mode == GPIO_MODE_INPUT) {
|
|
||||||
gpio->DIR &= ~BIT(PINNO(pin));
|
|
||||||
} else if (mode == GPIO_MODE_OUTPUT) {
|
|
||||||
gpio->DIR |= BIT(PINNO(pin));
|
|
||||||
} else { // GPIO_MODE_AF
|
|
||||||
SETBITS(gpio->PCTL, 15UL << ((n & 7) * 4),
|
|
||||||
((uint32_t) af) << ((n & 7) * 4));
|
|
||||||
gpio->AFSEL |= BIT(PINNO(pin));
|
|
||||||
}
|
|
||||||
gpio->DEN |= BIT(PINNO(pin)); // Enable pin as digital function
|
|
||||||
if (type == GPIO_OTYPE_OPEN_DRAIN)
|
|
||||||
gpio->ODR |= BIT(PINNO(pin));
|
|
||||||
else // GPIO_OTYPE_PUSH_PULL
|
|
||||||
gpio->ODR &= ~BIT(PINNO(pin));
|
|
||||||
if (speed == GPIO_SPEED_LOW)
|
|
||||||
gpio->SLR |= BIT(PINNO(pin));
|
|
||||||
else // GPIO_SPEED_HIGH
|
|
||||||
gpio->SLR &= ~BIT(PINNO(pin));
|
|
||||||
if (pull == GPIO_PULL_UP) {
|
|
||||||
gpio->PUR |= BIT(PINNO(pin)); // setting one...
|
|
||||||
} else if (pull == GPIO_PULL_DOWN) {
|
|
||||||
gpio->PDR |= BIT(PINNO(pin)); // ...just clears the other
|
|
||||||
} else {
|
|
||||||
gpio->PUR &= ~BIT(PINNO(pin));
|
|
||||||
gpio->PDR &= ~BIT(PINNO(pin));
|
|
||||||
}
|
|
||||||
}
|
|
||||||
static inline void gpio_input(uint16_t pin) {
|
|
||||||
gpio_init(pin, GPIO_MODE_INPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 0);
|
|
||||||
}
|
|
||||||
static inline void gpio_output(uint16_t pin) {
|
|
||||||
gpio_init(pin, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void gpio_irq_attach(uint16_t pin) {
|
|
||||||
uint8_t irqvecs[] = {16, 17, 18, 19, 20, 30, 31, 32,
|
|
||||||
51, 52, 53, 72, 73, 76, 84};
|
|
||||||
GPIOA_AHB_Type *gpio = GPIO(PINBANK(pin));
|
|
||||||
gpio->IS &= ~BIT(PINNO(pin)); // edge sensitive
|
|
||||||
gpio->IBE |= BIT(PINNO(pin)); // both edges
|
|
||||||
gpio->IM |= BIT(PINNO(pin)); // enable pin irq
|
|
||||||
int irqvec = irqvecs[PINBANK(pin)]; // IRQ vector index, 2.5.2
|
|
||||||
NVIC_SetPriority(irqvec, 3);
|
|
||||||
NVIC_EnableIRQ(irqvec);
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifndef UART_DEBUG
|
|
||||||
#define UART_DEBUG UART0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define UART_OFFSET 0x1000
|
|
||||||
#define UART(N) ((UART0_Type *) (UART0_BASE + UART_OFFSET * (N)))
|
|
||||||
#define UARTNO(u) ((uint8_t) (((unsigned int) (u) -UART0_BASE) / UART_OFFSET))
|
|
||||||
|
|
||||||
static inline void uart_init(UART0_Type *uart, unsigned long baud) {
|
|
||||||
struct uarthw {
|
|
||||||
uint16_t rx, tx; // pins
|
|
||||||
uint8_t af; // Alternate function
|
|
||||||
};
|
|
||||||
// rx, tx, af for UART0,1,2
|
|
||||||
struct uarthw uarthw[3] = {{PIN('A', 0), PIN('A', 1), 1},
|
|
||||||
{PIN('B', 0), PIN('B', 1), 1},
|
|
||||||
{PIN('A', 6), PIN('A', 7), 1}}; // or PD4, PD5...
|
|
||||||
|
|
||||||
uint8_t uartno = UARTNO(uart);
|
|
||||||
SYSCTL->RCGCUART |= BIT(uartno); // Enable peripheral clock
|
|
||||||
|
|
||||||
gpio_init(uarthw[uartno].tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL,
|
|
||||||
GPIO_SPEED_HIGH, 0, uarthw[uartno].af);
|
|
||||||
gpio_init(uarthw[uartno].rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL,
|
|
||||||
GPIO_SPEED_HIGH, 0, uarthw[uartno].af);
|
|
||||||
// (16.3.2) ClkDiv = 16 (HSE=0)
|
|
||||||
// BRD = BRDI + BRDF = UARTSysClk / (ClkDiv * Baud Rate)
|
|
||||||
// UARTFBRD[DIVFRAC] = integer(BRDF * 64 + 0.5)
|
|
||||||
// must write in this order
|
|
||||||
uart->CTL = 0; // Disable this UART, clear HSE
|
|
||||||
uart->IBRD = SYS_FREQUENCY / (16 * baud); // Baud rate, integer part
|
|
||||||
uart->FBRD = ((SYS_FREQUENCY % (16 * baud)) >> 26) &
|
|
||||||
0x3F; // Baud rate, fractional part
|
|
||||||
uart->LCRH = (3 << 5); // 8N1, no FIFOs;
|
|
||||||
uart->CTL |= BIT(0) | BIT(9) | BIT(8); // Set UARTEN, RXE, TXE
|
|
||||||
}
|
|
||||||
static inline void uart_write_byte(UART0_Type *uart, uint8_t byte) {
|
|
||||||
uart->DR = byte;
|
|
||||||
while ((uart->FR & BIT(7)) == 0) spin(1);
|
|
||||||
}
|
|
||||||
static inline void uart_write_buf(UART0_Type *uart, char *buf, size_t len) {
|
|
||||||
while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
|
|
||||||
}
|
|
||||||
static inline int uart_read_ready(UART0_Type *uart) {
|
|
||||||
return uart->FR & BIT(6); // If RXFF bit is set, data is ready
|
|
||||||
}
|
|
||||||
static inline uint8_t uart_read_byte(UART0_Type *uart) {
|
|
||||||
return (uint8_t) (uart->DR & 0xFF);
|
|
||||||
}
|
|
||||||
|
|
||||||
// Helper macro for reading pre-flashed MAC from user registers
|
|
||||||
#define READ_PREFLASHED_MAC() \
|
|
||||||
{ \
|
|
||||||
(FLASH_CTRL->USERREG0 >> 0) & 0xFF, (FLASH_CTRL->USERREG0 >> 8) & 0xFF, \
|
|
||||||
(FLASH_CTRL->USERREG0 >> 16) & 0xFF, \
|
|
||||||
(FLASH_CTRL->USERREG1 >> 0) & 0xFF, \
|
|
||||||
(FLASH_CTRL->USERREG1 >> 8) & 0xFF, \
|
|
||||||
(FLASH_CTRL->USERREG1 >> 16) & 0xFF \
|
|
||||||
}
|
|
||||||
@ -1,29 +0,0 @@
|
|||||||
ENTRY(Reset_Handler);
|
|
||||||
MEMORY {
|
|
||||||
flash(rx) : ORIGIN = 0x00000000, LENGTH = 1024k
|
|
||||||
sram(rwx) : ORIGIN = 0x20000000, LENGTH = 256k
|
|
||||||
}
|
|
||||||
_estack = ORIGIN(sram) + LENGTH(sram); /* stack points to end of SRAM */
|
|
||||||
|
|
||||||
SECTIONS {
|
|
||||||
.vectors : { KEEP(*(.vectors)) } > flash
|
|
||||||
.text : { *(.text* .text.*) } > flash
|
|
||||||
.rodata : { *(.rodata*) } > flash
|
|
||||||
|
|
||||||
.data : {
|
|
||||||
_sdata = .; /* for init_ram() */
|
|
||||||
*(.first_data)
|
|
||||||
*(.data SORT(.data.*))
|
|
||||||
_edata = .; /* for init_ram() */
|
|
||||||
} > sram AT > flash
|
|
||||||
_sidata = LOADADDR(.data);
|
|
||||||
|
|
||||||
.bss : {
|
|
||||||
_sbss = .; /* for init_ram() */
|
|
||||||
*(.bss SORT(.bss.*) COMMON)
|
|
||||||
_ebss = .; /* for init_ram() */
|
|
||||||
} > sram
|
|
||||||
|
|
||||||
. = ALIGN(8);
|
|
||||||
_end = .; /* for cmsis_gcc.h and init_ram() */
|
|
||||||
}
|
|
||||||
@ -1,106 +0,0 @@
|
|||||||
// Copyright (c) 2022-2023 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
#include "mongoose.h"
|
|
||||||
#include "net.h"
|
|
||||||
|
|
||||||
#define LED1 PIN('N', 1) // On-board LED pin
|
|
||||||
#define LED2 PIN('N', 0) // On-board LED pin
|
|
||||||
#define LED3 PIN('F', 4) // On-board LED pin
|
|
||||||
#define LED4 PIN('F', 0) // On-board LED pin
|
|
||||||
|
|
||||||
#define LED LED1 // Use this LED for blinking
|
|
||||||
#define BLINK_PERIOD_MS 1000 // LED blinking period in millis
|
|
||||||
|
|
||||||
static void timer_fn(void *arg) {
|
|
||||||
struct mg_tcpip_if *ifp = arg; // And show
|
|
||||||
const char *names[] = {"down", "up", "req", "ready"}; // network stats
|
|
||||||
MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u",
|
|
||||||
names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent,
|
|
||||||
ifp->ndrop, ifp->nerr));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ethernet_init(void) {
|
|
||||||
// Initialise Ethernet. Enable MAC GPIO pins, see
|
|
||||||
// https://www.ti.com/lit/pdf/spms433
|
|
||||||
// Assign LED3 and LED4 to the EPHY, "activity" and "link", respectively.
|
|
||||||
// (20.4.2.4)
|
|
||||||
gpio_init(LED3, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 5); // EN0LED1
|
|
||||||
gpio_init(LED4, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 5); // EN0LED0
|
|
||||||
NVIC_EnableIRQ(EMAC0_IRQn); // Setup Ethernet IRQ handler
|
|
||||||
// Initialize Ethernet clocks, see datasheet section 5
|
|
||||||
// Turn Flash Prefetch off (silicon errata ETH#02)
|
|
||||||
uint32_t val = FLASH_CTRL->CONF;
|
|
||||||
val &= ~BIT(17);
|
|
||||||
val |= BIT(16);
|
|
||||||
FLASH_CTRL->CONF = val;
|
|
||||||
SYSCTL->RCGCEMAC |= BIT(0); // Enable EMAC clock
|
|
||||||
SYSCTL->SREMAC |= BIT(0); // Reset EMAC
|
|
||||||
SYSCTL->SREMAC &= ~BIT(0);
|
|
||||||
SYSCTL->RCGCEPHY |= BIT(0); // Enable EPHY clock
|
|
||||||
SYSCTL->SREPHY |= BIT(0); // Reset EPHY
|
|
||||||
SYSCTL->SREPHY &= ~BIT(0);
|
|
||||||
while (!(SYSCTL->PREMAC & BIT(0)) || !(SYSCTL->PREPHY & BIT(0)))
|
|
||||||
spin(1); // Wait for reset to complete
|
|
||||||
}
|
|
||||||
|
|
||||||
static void server(void *args) {
|
|
||||||
struct mg_mgr mgr; // Initialise Mongoose event manager
|
|
||||||
mg_mgr_init(&mgr); // and attach it to the interface
|
|
||||||
mg_log_set(MG_LL_DEBUG); // Set log level
|
|
||||||
|
|
||||||
// Initialise Mongoose network stack
|
|
||||||
ethernet_init();
|
|
||||||
struct mg_tcpip_driver_tm4c_data driver_data = {.mdc_cr = 1};
|
|
||||||
struct mg_tcpip_if mif = {
|
|
||||||
.mac = READ_PREFLASHED_MAC(),
|
|
||||||
// Uncomment below for static configuration:
|
|
||||||
// .ip = mg_htonl(MG_U32(192, 168, 0, 223)),
|
|
||||||
// .mask = mg_htonl(MG_U32(255, 255, 255, 0)),
|
|
||||||
// .gw = mg_htonl(MG_U32(192, 168, 0, 1)),
|
|
||||||
.driver = &mg_tcpip_driver_tm4c,
|
|
||||||
.driver_data = &driver_data,
|
|
||||||
};
|
|
||||||
mg_tcpip_init(&mgr, &mif);
|
|
||||||
uint32_t val = FLASH_CTRL->CONF; // Turn Flash Prefetch on again
|
|
||||||
val &= ~BIT(16);
|
|
||||||
val |= BIT(17);
|
|
||||||
FLASH_CTRL->CONF = val;
|
|
||||||
mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif);
|
|
||||||
|
|
||||||
MG_INFO(("MAC: %M. Waiting for IP...", mg_print_mac, mif.mac));
|
|
||||||
while (mif.state != MG_TCPIP_STATE_READY) {
|
|
||||||
mg_mgr_poll(&mgr, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
MG_INFO(("Initialising application..."));
|
|
||||||
web_init(&mgr);
|
|
||||||
|
|
||||||
MG_INFO(("Starting event loop"));
|
|
||||||
for (;;) mg_mgr_poll(&mgr, 1); // Infinite event loop
|
|
||||||
(void) args;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void blinker(void *args) {
|
|
||||||
gpio_init(LED, GPIO_MODE_OUTPUT, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH,
|
|
||||||
GPIO_PULL_NONE, 0);
|
|
||||||
for (;;) {
|
|
||||||
gpio_toggle(LED);
|
|
||||||
vTaskDelay(pdMS_TO_TICKS(BLINK_PERIOD_MS));
|
|
||||||
}
|
|
||||||
(void) args;
|
|
||||||
}
|
|
||||||
|
|
||||||
int main(void) {
|
|
||||||
uart_init(UART_DEBUG, 115200); // Initialise UART
|
|
||||||
|
|
||||||
// Start tasks. NOTE: stack sizes are in 32-bit words
|
|
||||||
xTaskCreate(blinker, "blinker", 128, ":)", configMAX_PRIORITIES - 1, NULL);
|
|
||||||
xTaskCreate(server, "server", 2048, 0, configMAX_PRIORITIES - 1, NULL);
|
|
||||||
|
|
||||||
vTaskStartScheduler(); // This blocks
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../../mongoose.c
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../../mongoose.h
|
|
||||||
@ -1,10 +0,0 @@
|
|||||||
#pragma once
|
|
||||||
|
|
||||||
// See https://mongoose.ws/documentation/#build-options
|
|
||||||
#define MG_ARCH MG_ARCH_FREERTOS
|
|
||||||
|
|
||||||
#define MG_ENABLE_TCPIP 1
|
|
||||||
#define MG_ENABLE_DRIVER_TM4C 1
|
|
||||||
#define MG_IO_SIZE 256
|
|
||||||
#define MG_ENABLE_PACKED_FS 1
|
|
||||||
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/net.c
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/net.h
|
|
||||||
@ -1 +0,0 @@
|
|||||||
../../device-dashboard/packed_fs.c
|
|
||||||
@ -1,168 +0,0 @@
|
|||||||
// Copyright (c) 2022 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
|
|
||||||
// Startup code
|
|
||||||
__attribute__((naked, noreturn)) void Reset_Handler(void) {
|
|
||||||
// Initialise memory
|
|
||||||
extern long _sbss, _ebss, _sdata, _edata, _sidata;
|
|
||||||
for (long *src = &_sbss; src < &_ebss; src++) *src = 0;
|
|
||||||
for (long *src = &_sdata, *dst = &_sidata; src < &_edata;) *src++ = *dst++;
|
|
||||||
|
|
||||||
// Call the clock system initialization function
|
|
||||||
extern void SystemInit(void);
|
|
||||||
SystemInit();
|
|
||||||
// Call static constructors
|
|
||||||
extern void __libc_init_array(void);
|
|
||||||
__libc_init_array();
|
|
||||||
// Call the application entry point
|
|
||||||
extern void main(void);
|
|
||||||
main();
|
|
||||||
for (;;) (void) 0; // Infinite loop
|
|
||||||
}
|
|
||||||
|
|
||||||
void __attribute__((weak)) DefaultIRQHandler(void) {
|
|
||||||
for (;;) (void) 0;
|
|
||||||
}
|
|
||||||
#define WEAK_ALIAS __attribute__((weak, alias("DefaultIRQHandler")))
|
|
||||||
|
|
||||||
WEAK_ALIAS void NMI_Handler(void);
|
|
||||||
WEAK_ALIAS void HardFault_Handler(void);
|
|
||||||
WEAK_ALIAS void MemManage_Handler(void);
|
|
||||||
WEAK_ALIAS void BusFault_Handler(void);
|
|
||||||
WEAK_ALIAS void UsageFault_Handler(void);
|
|
||||||
WEAK_ALIAS void SVC_Handler(void);
|
|
||||||
WEAK_ALIAS void DebugMon_Handler(void);
|
|
||||||
WEAK_ALIAS void PendSV_Handler(void);
|
|
||||||
WEAK_ALIAS void SysTick_Handler(void);
|
|
||||||
|
|
||||||
WEAK_ALIAS void GPIOA_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOB_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOC_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOD_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOE_Handler(void);
|
|
||||||
WEAK_ALIAS void UART0_Handler(void);
|
|
||||||
WEAK_ALIAS void UART1_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI0_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C0_Handler(void);
|
|
||||||
WEAK_ALIAS void PMW0_FAULT_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_0_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_1_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_2_Handler(void);
|
|
||||||
WEAK_ALIAS void QEI0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS1_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS2_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC0SS3_Handler(void);
|
|
||||||
WEAK_ALIAS void WDT0_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER0A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER0B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER1A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER1B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER2A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER2B_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP0_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP1_Handler(void);
|
|
||||||
WEAK_ALIAS void COMP2_Handler(void);
|
|
||||||
WEAK_ALIAS void SYSCTL_Handler(void);
|
|
||||||
WEAK_ALIAS void FLASH_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOF_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOG_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOH_Handler(void);
|
|
||||||
WEAK_ALIAS void UART2_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI1_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER3A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER3B_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C1_Handler(void);
|
|
||||||
WEAK_ALIAS void CAN0_Handler(void);
|
|
||||||
WEAK_ALIAS void CAN1_Handler(void);
|
|
||||||
WEAK_ALIAS void EMAC0_IRQHandler(void);
|
|
||||||
WEAK_ALIAS void HIB_Handler(void);
|
|
||||||
WEAK_ALIAS void USB0_Handler(void);
|
|
||||||
WEAK_ALIAS void PWM0_3_Handler(void);
|
|
||||||
WEAK_ALIAS void UDMA_Handler(void);
|
|
||||||
WEAK_ALIAS void UDMAERR_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS0_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS1_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS2_Handler(void);
|
|
||||||
WEAK_ALIAS void ADC1SS3_Handler(void);
|
|
||||||
WEAK_ALIAS void EPI0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOJ_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOK_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOL_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI2_Handler(void);
|
|
||||||
WEAK_ALIAS void SSI3_Handler(void);
|
|
||||||
WEAK_ALIAS void UART3_Handler(void);
|
|
||||||
WEAK_ALIAS void UART4_Handler(void);
|
|
||||||
WEAK_ALIAS void UART5_Handler(void);
|
|
||||||
WEAK_ALIAS void UART6_Handler(void);
|
|
||||||
WEAK_ALIAS void UART7_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C2_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C3_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER4A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER4B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER5A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER5B_Handler(void);
|
|
||||||
WEAK_ALIAS void FPU_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C4_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOM_Handler(void);
|
|
||||||
WEAK_ALIAS void GPION_Handler(void);
|
|
||||||
WEAK_ALIAS void TAMPER_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP1_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP2_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP3_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP4_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP6_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOP7_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ0_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ1_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ2_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ3_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ4_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ5_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ6_Handler(void);
|
|
||||||
WEAK_ALIAS void GPIOQ7_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER6A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER6B_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER7A_Handler(void);
|
|
||||||
WEAK_ALIAS void TIMER7B_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C6_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C7_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C8_Handler(void);
|
|
||||||
WEAK_ALIAS void I2C9_Handler(void);
|
|
||||||
|
|
||||||
extern void _estack();
|
|
||||||
|
|
||||||
// IRQ table
|
|
||||||
__attribute__((section(".vectors"))) void (*tab[16 + 114])(void) = {
|
|
||||||
// Cortex interrupts
|
|
||||||
_estack, Reset_Handler, NMI_Handler, HardFault_Handler, MemManage_Handler,
|
|
||||||
BusFault_Handler, UsageFault_Handler, 0, 0, 0, 0, SVC_Handler,
|
|
||||||
DebugMon_Handler, 0, PendSV_Handler, SysTick_Handler,
|
|
||||||
|
|
||||||
// Interrupts from peripherals
|
|
||||||
GPIOA_Handler, GPIOB_Handler, GPIOC_Handler, GPIOD_Handler, GPIOE_Handler,
|
|
||||||
UART0_Handler, UART1_Handler, SSI0_Handler, I2C0_Handler,
|
|
||||||
PMW0_FAULT_Handler, PWM0_0_Handler, PWM0_1_Handler, PWM0_2_Handler,
|
|
||||||
QEI0_Handler, ADC0SS0_Handler, ADC0SS1_Handler, ADC0SS2_Handler,
|
|
||||||
ADC0SS3_Handler, WDT0_Handler, TIMER0A_Handler, TIMER0B_Handler,
|
|
||||||
TIMER1A_Handler, TIMER1B_Handler, TIMER2A_Handler, TIMER2B_Handler,
|
|
||||||
COMP0_Handler, COMP1_Handler, COMP2_Handler, SYSCTL_Handler, FLASH_Handler,
|
|
||||||
GPIOF_Handler, GPIOG_Handler, GPIOH_Handler, UART2_Handler, SSI1_Handler,
|
|
||||||
TIMER3A_Handler, TIMER3B_Handler, I2C1_Handler, CAN0_Handler, CAN1_Handler,
|
|
||||||
EMAC0_IRQHandler, HIB_Handler, USB0_Handler, PWM0_3_Handler, UDMA_Handler,
|
|
||||||
UDMAERR_Handler, ADC1SS0_Handler, ADC1SS1_Handler, ADC1SS2_Handler,
|
|
||||||
ADC1SS3_Handler, EPI0_Handler, GPIOJ_Handler, GPIOK_Handler, GPIOL_Handler,
|
|
||||||
SSI2_Handler, SSI3_Handler, UART3_Handler, UART4_Handler, UART5_Handler,
|
|
||||||
UART6_Handler, UART7_Handler, I2C2_Handler, I2C3_Handler, TIMER4A_Handler,
|
|
||||||
TIMER4B_Handler, TIMER5A_Handler, TIMER5B_Handler, FPU_Handler, 0, 0,
|
|
||||||
I2C4_Handler, I2C5_Handler, GPIOM_Handler, GPION_Handler, 0, TAMPER_Handler,
|
|
||||||
GPIOP0_Handler, GPIOP1_Handler, GPIOP2_Handler, GPIOP3_Handler,
|
|
||||||
GPIOP4_Handler, GPIOP5_Handler, GPIOP6_Handler, GPIOP7_Handler,
|
|
||||||
GPIOQ0_Handler, GPIOQ1_Handler, GPIOQ2_Handler, GPIOQ3_Handler,
|
|
||||||
GPIOQ4_Handler, GPIOQ5_Handler, GPIOQ6_Handler, GPIOQ7_Handler, 0, 0, 0, 0,
|
|
||||||
0, 0, TIMER6A_Handler, TIMER6B_Handler, TIMER7A_Handler, TIMER7B_Handler,
|
|
||||||
I2C6_Handler, I2C7_Handler, 0, 0, 0, 0, 0, I2C8_Handler, I2C9_Handler, 0, 0,
|
|
||||||
0};
|
|
||||||
@ -1,85 +0,0 @@
|
|||||||
#include <sys/stat.h>
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
|
|
||||||
int _fstat(int fd, struct stat *st) {
|
|
||||||
if (fd < 0) return -1;
|
|
||||||
st->st_mode = S_IFCHR;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void *_sbrk(int incr) {
|
|
||||||
extern char _end;
|
|
||||||
static unsigned char *heap = NULL;
|
|
||||||
unsigned char *prev_heap;
|
|
||||||
if (heap == NULL) heap = (unsigned char *) &_end;
|
|
||||||
prev_heap = heap;
|
|
||||||
heap += incr;
|
|
||||||
return prev_heap;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _open(const char *path) {
|
|
||||||
(void) path;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _close(int fd) {
|
|
||||||
(void) fd;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _isatty(int fd) {
|
|
||||||
(void) fd;
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _lseek(int fd, int ptr, int dir) {
|
|
||||||
(void) fd, (void) ptr, (void) dir;
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
void _exit(int status) {
|
|
||||||
(void) status;
|
|
||||||
for (;;) asm volatile("BKPT #0");
|
|
||||||
}
|
|
||||||
|
|
||||||
void _kill(int pid, int sig) {
|
|
||||||
(void) pid, (void) sig;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _getpid(void) {
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _write(int fd, char *ptr, int len) {
|
|
||||||
(void) fd, (void) ptr, (void) len;
|
|
||||||
if (fd == 1) uart_write_buf(UART_DEBUG, ptr, (size_t) len);
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _read(int fd, char *ptr, int len) {
|
|
||||||
(void) fd, (void) ptr, (void) len;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _link(const char *a, const char *b) {
|
|
||||||
(void) a, (void) b;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _unlink(const char *a) {
|
|
||||||
(void) a;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int _stat(const char *path, struct stat *st) {
|
|
||||||
(void) path, (void) st;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
int mkdir(const char *path, mode_t mode) {
|
|
||||||
(void) path, (void) mode;
|
|
||||||
return -1;
|
|
||||||
}
|
|
||||||
|
|
||||||
void _init(void) {}
|
|
||||||
@ -1,36 +0,0 @@
|
|||||||
// Copyright (c) 2023 Cesanta Software Limited
|
|
||||||
// All rights reserved
|
|
||||||
//
|
|
||||||
// This file contains essentials required by the CMSIS:
|
|
||||||
// uint32_t SystemCoreClock - holds the system core clock value
|
|
||||||
// SystemInit() - initialises the system, e.g. sets up clocks
|
|
||||||
|
|
||||||
#include "hal.h"
|
|
||||||
|
|
||||||
uint32_t SystemCoreClock = SYS_FREQUENCY;
|
|
||||||
|
|
||||||
void SystemInit(void) { // Called automatically by startup code
|
|
||||||
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU
|
|
||||||
asm("DSB");
|
|
||||||
asm("ISB");
|
|
||||||
SETBITS(SYSCTL->MOSCCTL, BIT(3) | BIT(2),
|
|
||||||
BIT(4)); // Enable MOSC circuit (clear NOXTAL and PWRDN, set >10MHz
|
|
||||||
// range)
|
|
||||||
SETBITS(SYSCTL->MEMTIM0,
|
|
||||||
BIT(21) | BIT(5) | 0x1F << 21 | 0xF << 16 | 0x1F << 5 | 0xF << 0,
|
|
||||||
FLASH_CLKHIGH << 22 | FLASH_WAITST << 16 | FLASH_CLKHIGH << 5 |
|
|
||||||
FLASH_WAITST << 0); // Configure flash timing (not yet applied)
|
|
||||||
SETBITS(SYSCTL->RSCLKCFG, 0xF << 24 | (BIT(9) - 1),
|
|
||||||
3 << 24); // Clear PLL divider, set MOSC as PLL source
|
|
||||||
SYSCTL->PLLFREQ1 = (PLL_Q - 1) << 8 | (PLL_N - 1)
|
|
||||||
<< 0; // Set PLL_Q and PLL_N
|
|
||||||
SYSCTL->PLLFREQ0 =
|
|
||||||
BIT(23) | PLL_M << 0; // Set PLL_Q, power up PLL (if it were on, we'd
|
|
||||||
// need to set NEWFREQ in RSCLKCFG instead)
|
|
||||||
while ((SYSCTL->PLLSTAT & BIT(0)) == 0) spin(1); // Wait for lock
|
|
||||||
SYSCTL->RSCLKCFG |=
|
|
||||||
BIT(31) | BIT(28) |
|
|
||||||
(PSYSDIV - 1) << 0; // Update memory timing, use PLL, set clock divisor
|
|
||||||
|
|
||||||
SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
|
|
||||||
}
|
|
||||||
Loading…
Reference in New Issue
Block a user