add RT1060 Xpresso example

This commit is contained in:
Sergio R. Caprile 2024-01-05 18:24:47 -03:00
parent 9bebe7cf68
commit cba0d1b2f9
154 changed files with 99643 additions and 0 deletions

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<name>rt1060-evk-xpresso-baremetal-builtin</name>
<comment></comment>
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eclipse.preferences.version=1
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/******************************************************************************
* @file cachel1_armv7.h
* @brief CMSIS Level 1 Cache API for Armv7-M and later
* @version V1.0.1
* @date 19. April 2021
******************************************************************************/
/*
* Copyright (c) 2020-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_CACHEL1_ARMV7_H
#define ARM_CACHEL1_ARMV7_H
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_CacheFunctions Cache Functions
\brief Functions that configure Instruction and Data cache.
@{
*/
/* Cache Size ID Register Macros */
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
#ifndef __SCB_DCACHE_LINE_SIZE
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
#ifndef __SCB_ICACHE_LINE_SIZE
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
/**
\brief Enable I-Cache
\details Turns on I-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
__DSB();
__ISB();
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable I-Cache
\details Turns off I-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate I-Cache
\details Invalidates I-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->ICIALLU = 0UL;
__DSB();
__ISB();
#endif
}
/**
\brief I-Cache Invalidate by address
\details Invalidates I-Cache for the given address.
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
I-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] isize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if ( isize > 0 ) {
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_ICACHE_LINE_SIZE;
op_size -= __SCB_ICACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief Enable D-Cache
\details Turns on D-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable D-Cache
\details Turns off D-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
__DSB();
/*
* For the endless loop issue with GCC O0.
* More details, see https://github.com/ARM-software/CMSIS_5/issues/620
*
* The issue only happens when local variables are in stack (GCC O0). If
* local variables are saved in general purpose register, then the function
* is OK.
*
* When local variables are in stack, after disabling the cache, flush the
* local variables cache line for data consistency.
*/
/* Clean and invalidate the local variable cache. */
SCB->DCCIMVAC = (uint32_t)(&sets);
SCB->DCCIMVAC = (uint32_t)(&ways);
SCB->DCCIMVAC = (uint32_t)(&ccsidr);
__DSB();
__ISB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate D-Cache
\details Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean D-Cache
\details Cleans D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean & Invalidate D-Cache
\details Cleans and Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief D-Cache Invalidate by address
\details Invalidates D-Cache for the given address.
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean by address
\details Cleans D-Cache for the given address
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean and Invalidate by address
\details Cleans and invalidates D_Cache for the given address
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
\param[in] addr address (aligned to 32-byte boundary)
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/*@} end of CMSIS_Core_CacheFunctions */
#endif /* ARM_CACHEL1_ARMV7_H */

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/**************************************************************************//**
* @file cmsis_compiler.h
* @brief CMSIS compiler generic header file
* @version V5.1.0
* @date 09. October 2018
******************************************************************************/
/*
* Copyright (c) 2009-2018 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef __CMSIS_COMPILER_H
#define __CMSIS_COMPILER_H
#include <stdint.h>
/*
* Arm Compiler 4/5
*/
#if defined ( __CC_ARM )
#include "cmsis_armcc.h"
/*
* Arm Compiler 6.6 LTM (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
#include "cmsis_armclang_ltm.h"
/*
* Arm Compiler above 6.10.1 (armclang)
*/
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
#include "cmsis_armclang.h"
/*
* GNU Compiler
*/
#elif defined ( __GNUC__ )
#include "cmsis_gcc.h"
/*
* IAR Compiler
*/
#elif defined ( __ICCARM__ )
#include <cmsis_iccarm.h>
/*
* TI Arm Compiler
*/
#elif defined ( __TI_ARM__ )
#include <cmsis_ccs.h>
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __attribute__((packed))
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __attribute__((packed))
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __attribute__((packed))
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __attribute__((packed)) T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __attribute__((aligned(x)))
#endif
#ifndef __RESTRICT
#define __RESTRICT __restrict
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* TASKING Compiler
*/
#elif defined ( __TASKING__ )
/*
* The CMSIS functions have been implemented as intrinsics in the compiler.
* Please use "carm -?i" to get an up to date list of all intrinsics,
* Including the CMSIS ones.
*/
#ifndef __ASM
#define __ASM __asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((noreturn))
#endif
#ifndef __USED
#define __USED __attribute__((used))
#endif
#ifndef __WEAK
#define __WEAK __attribute__((weak))
#endif
#ifndef __PACKED
#define __PACKED __packed__
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT struct __packed__
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION union __packed__
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
struct __packed__ T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#define __ALIGNED(x) __align(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
/*
* COSMIC Compiler
*/
#elif defined ( __CSMC__ )
#include <cmsis_csm.h>
#ifndef __ASM
#define __ASM _asm
#endif
#ifndef __INLINE
#define __INLINE inline
#endif
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __STATIC_INLINE
#endif
#ifndef __NO_RETURN
// NO RETURN is automatically detected hence no warning here
#define __NO_RETURN
#endif
#ifndef __USED
#warning No compiler specific solution for __USED. __USED is ignored.
#define __USED
#endif
#ifndef __WEAK
#define __WEAK __weak
#endif
#ifndef __PACKED
#define __PACKED @packed
#endif
#ifndef __PACKED_STRUCT
#define __PACKED_STRUCT @packed struct
#endif
#ifndef __PACKED_UNION
#define __PACKED_UNION @packed union
#endif
#ifndef __UNALIGNED_UINT32 /* deprecated */
@packed struct T_UINT32 { uint32_t v; };
#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
#endif
#ifndef __UNALIGNED_UINT16_WRITE
__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT16_READ
__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(addr))->v)
#endif
#ifndef __UNALIGNED_UINT32_WRITE
__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
#endif
#ifndef __UNALIGNED_UINT32_READ
__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(addr))->v)
#endif
#ifndef __ALIGNED
#warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
#define __ALIGNED(x)
#endif
#ifndef __RESTRICT
#warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
#define __RESTRICT
#endif
#ifndef __COMPILER_BARRIER
#warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
#define __COMPILER_BARRIER() (void)0
#endif
#else
#error Unknown compiler.
#endif
#endif /* __CMSIS_COMPILER_H */

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/**************************************************************************//**
* @file cmsis_version.h
* @brief CMSIS Core(M) Version definitions
* @version V5.0.4
* @date 23. July 2019
******************************************************************************/
/*
* Copyright (c) 2009-2019 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef __CMSIS_VERSION_H
#define __CMSIS_VERSION_H
/* CMSIS Version definitions */
#define __CM_CMSIS_VERSION_MAIN ( 5U) /*!< [31:16] CMSIS Core(M) main version */
#define __CM_CMSIS_VERSION_SUB ( 4U) /*!< [15:0] CMSIS Core(M) sub version */
#define __CM_CMSIS_VERSION ((__CM_CMSIS_VERSION_MAIN << 16U) | \
__CM_CMSIS_VERSION_SUB ) /*!< CMSIS Core(M) version number */
#endif

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/******************************************************************************
* @file mpu_armv7.h
* @brief CMSIS MPU API for Armv7-M MPU
* @version V5.1.2
* @date 25. May 2020
******************************************************************************/
/*
* Copyright (c) 2017-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H
#define ARM_MPU_REGION_SIZE_32B ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
#define ARM_MPU_REGION_SIZE_64B ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
#define ARM_MPU_REGION_SIZE_128B ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
#define ARM_MPU_REGION_SIZE_256B ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
#define ARM_MPU_REGION_SIZE_512B ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
#define ARM_MPU_REGION_SIZE_1KB ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
#define ARM_MPU_REGION_SIZE_2KB ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
#define ARM_MPU_REGION_SIZE_4KB ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
#define ARM_MPU_REGION_SIZE_8KB ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
#define ARM_MPU_REGION_SIZE_16KB ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
#define ARM_MPU_REGION_SIZE_32KB ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
#define ARM_MPU_REGION_SIZE_64KB ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
#define ARM_MPU_REGION_SIZE_128KB ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
#define ARM_MPU_REGION_SIZE_256KB ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
#define ARM_MPU_REGION_SIZE_512KB ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
#define ARM_MPU_REGION_SIZE_1MB ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
#define ARM_MPU_REGION_SIZE_2MB ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
#define ARM_MPU_REGION_SIZE_4MB ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
#define ARM_MPU_REGION_SIZE_8MB ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
#define ARM_MPU_REGION_SIZE_16MB ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
#define ARM_MPU_REGION_SIZE_32MB ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
#define ARM_MPU_REGION_SIZE_64MB ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
#define ARM_MPU_REGION_SIZE_128MB ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
#define ARM_MPU_REGION_SIZE_256MB ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
#define ARM_MPU_REGION_SIZE_512MB ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
#define ARM_MPU_REGION_SIZE_1GB ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
#define ARM_MPU_REGION_SIZE_2GB ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
#define ARM_MPU_REGION_SIZE_4GB ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
#define ARM_MPU_AP_URO 2U ///!< MPU Access Permission unprivileged access read-only
#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
#define ARM_MPU_AP_PRO 5U ///!< MPU Access Permission privileged access read-only
#define ARM_MPU_AP_RO 6U ///!< MPU Access Permission read-only access
/** MPU Region Base Address Register Value
*
* \param Region The region to be configured, number 0 to 15.
* \param BaseAddress The base address for the region.
*/
#define ARM_MPU_RBAR(Region, BaseAddress) \
(((BaseAddress) & MPU_RBAR_ADDR_Msk) | \
((Region) & MPU_RBAR_REGION_Msk) | \
(MPU_RBAR_VALID_Msk))
/**
* MPU Memory Access Attributes
*
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
(((IsCacheable) << MPU_RASR_C_Pos) & MPU_RASR_C_Msk) | \
(((IsBufferable) << MPU_RASR_B_Pos) & MPU_RASR_B_Msk))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size) \
((((DisableExec) << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) | \
(((AccessPermission) << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | \
(((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
(((SubRegionDisable) << MPU_RASR_SRD_Pos) & MPU_RASR_SRD_Msk) | \
(((Size) << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk) | \
(((MPU_RASR_ENABLE_Msk))))
/**
* MPU Region Attribute and Size Register Value
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
/**
* MPU Memory Access Attribute for strongly ordered memory.
* - TEX: 000b
* - Shareable
* - Non-cacheable
* - Non-bufferable
*/
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/**
* MPU Memory Access Attribute for device memory.
* - TEX: 000b (if shareable) or 010b (if non-shareable)
* - Shareable or non-shareable
* - Non-cacheable
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
*
* \param IsShareable Configures the device memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/**
* MPU Memory Access Attribute for normal memory.
* - TEX: 1BBb (reflecting outer cacheability rules)
* - Shareable or non-shareable
* - Cacheable or non-cacheable (reflecting inner cacheability rules)
* - Bufferable or non-bufferable (reflecting inner cacheability rules)
*
* \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
*/
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
/**
* MPU Memory Access Attribute non-cacheable policy.
*/
#define ARM_MPU_CACHEP_NOCACHE 0U
/**
* MPU Memory Access Attribute write-back, write and read allocate policy.
*/
#define ARM_MPU_CACHEP_WB_WRA 1U
/**
* MPU Memory Access Attribute write-through, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WT_NWA 2U
/**
* MPU Memory Access Attribute write-back, no write allocate policy.
*/
#define ARM_MPU_CACHEP_WB_NWA 3U
/**
* Struct for a single MPU Region
*/
typedef struct {
uint32_t RBAR; //!< The region base address register value (RBAR)
uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
} ARM_MPU_Region_t;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
{
__DMB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
}
/** Disable the MPU.
*/
__STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
/** Clear and disable the given MPU region.
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
{
MPU->RNR = rnr;
MPU->RASR = 0U;
}
/** Configure an MPU region.
* \param rbar Value for RBAR register.
* \param rasr Value for RASR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
{
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Configure the given MPU region.
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rasr Value for RASR register.
*/
__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
{
MPU->RNR = rnr;
MPU->RBAR = rbar;
MPU->RASR = rasr;
}
/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load().
* \param dst Destination data is copied to.
* \param src Source data is copied from.
* \param len Amount of data words to be copied.
*/
__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
{
uint32_t i;
for (i = 0U; i < len; ++i)
{
dst[i] = src[i];
}
}
/** Load the given number of MPU regions from a table.
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt)
{
const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
while (cnt > MPU_TYPE_RALIASES) {
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
table += MPU_TYPE_RALIASES;
cnt -= MPU_TYPE_RALIASES;
}
ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
}
#endif

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:191:22:ARM_MPU_Enable 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:204:22:ARM_MPU_Disable 4 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1434:24:CLOCK_GetMux 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1485:24:CLOCK_GetDiv 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
../board/board.c:24:10:BOARD_DebugConsoleSrcFreq 24 static
../board/board.c:43:6:BOARD_InitDebugConsole 16 static
../board/board.c:248:6:BOARD_ConfigMPU 48 static

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1408:20:CLOCK_SetMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1460:20:CLOCK_SetDiv 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1663:20:CLOCK_SetXtalFreq 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1673:20:CLOCK_SetRtcXtalFreq 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1730:20:CLOCK_SetPllBypass 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1363:20:IOMUXC_SetSaiMClkClockSource 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1423:20:IOMUXC_MQSConfig 24 static
../board/clock_config.c:40:6:BOARD_InitBootClocks 8 static
../board/clock_config.c:178:6:BOARD_BootClockRUN 16 static
../board/clock_config.c:625:6:BOARD_BootClockRUN_528M 16 static

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../board/peripherals.c:186:13:TRNG_init 8 static
../board/peripherals.c:194:6:BOARD_InitPeripherals 8 static
../board/peripherals.c:203:6:BOARD_InitBootPeripherals 8 static

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1288:20:IOMUXC_SetPinMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1320:20:IOMUXC_SetPinConfig 24 static
../board/pin_mux.c:221:6:BOARD_InitBootPins 8 static
../board/pin_mux.c:241:6:BOARD_InitPins 4 static
../board/pin_mux.c:263:6:BOARD_InitDEBUG_UART 16 static
../board/pin_mux.c:326:6:BOARD_InitSDRAM 16 static
../board/pin_mux.c:402:6:BOARD_InitCSI 16 static
../board/pin_mux.c:464:6:BOARD_InitLCD 16 static
../board/pin_mux.c:532:6:BOARD_InitCAN 16 static
../board/pin_mux.c:564:6:BOARD_InitENET 16 static
../board/pin_mux.c:600:6:BOARD_InitUSDHC 16 static
../board/pin_mux.c:638:6:BOARD_InitHyperFlash 16 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../board/board.c \
../board/clock_config.c \
../board/dcd.c \
../board/peripherals.c \
../board/pin_mux.c
C_DEPS += \
./board/board.d \
./board/clock_config.d \
./board/dcd.d \
./board/peripherals.d \
./board/pin_mux.d
OBJS += \
./board/board.o \
./board/clock_config.o \
./board/dcd.o \
./board/peripherals.o \
./board/pin_mux.o
# Each subdirectory must supply rules for building sources it contributes
board/%.o: ../board/%.c board/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-board
clean-board:
-$(RM) ./board/board.d ./board/board.o ./board/clock_config.d ./board/clock_config.o ./board/dcd.d ./board/dcd.o ./board/peripherals.d ./board/peripherals.o ./board/pin_mux.d ./board/pin_mux.o
.PHONY: clean-board

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../component/lists/fsl_component_generic_list.c:32:22:LIST_Error_Check 24 static
../component/lists/fsl_component_generic_list.c:80:6:LIST_Init 16 static
../component/lists/fsl_component_generic_list.c:103:15:LIST_GetList 16 static
../component/lists/fsl_component_generic_list.c:124:15:LIST_AddTail 24 static
../component/lists/fsl_component_generic_list.c:170:15:LIST_AddHead 24 static
../component/lists/fsl_component_generic_list.c:216:23:LIST_RemoveHead 24 static
../component/lists/fsl_component_generic_list.c:264:23:LIST_GetHead 16 static
../component/lists/fsl_component_generic_list.c:284:23:LIST_GetNext 16 static
../component/lists/fsl_component_generic_list.c:304:23:LIST_GetPrev 16 static
../component/lists/fsl_component_generic_list.c:328:15:LIST_RemoveElement 32 static
../component/lists/fsl_component_generic_list.c:399:15:LIST_AddPrevElement 32 static
../component/lists/fsl_component_generic_list.c:471:10:LIST_GetSize 16 static
../component/lists/fsl_component_generic_list.c:490:10:LIST_GetAvailableSize 16 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/lists/fsl_component_generic_list.c
C_DEPS += \
./component/lists/fsl_component_generic_list.d
OBJS += \
./component/lists/fsl_component_generic_list.o
# Each subdirectory must supply rules for building sources it contributes
component/lists/%.o: ../component/lists/%.c component/lists/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-lists
clean-component-2f-lists:
-$(RM) ./component/lists/fsl_component_generic_list.d ./component/lists/fsl_component_generic_list.o
.PHONY: clean-component-2f-lists

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../component/serial_manager/fsl_component_serial_manager.c:422:32:SerialManager_StartWriting 32 static
../component/serial_manager/fsl_component_serial_manager.c:484:32:SerialManager_StartReading 32 static
../component/serial_manager/fsl_component_serial_manager.c:1233:32:SerialManager_Write 32 static
../component/serial_manager/fsl_component_serial_manager.c:1250:32:SerialManager_Read 32 static
../component/serial_manager/fsl_component_serial_manager.c:1268:25:SerialManager_Init 24 static
../component/serial_manager/fsl_component_serial_manager.c:1473:25:SerialManager_Deinit 24 static
../component/serial_manager/fsl_component_serial_manager.c:1552:25:SerialManager_OpenWriteHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1589:25:SerialManager_CloseWriteHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1620:25:SerialManager_OpenReadHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1660:25:SerialManager_CloseReadHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1689:25:SerialManager_WriteBlocking 24 static
../component/serial_manager/fsl_component_serial_manager.c:1698:25:SerialManager_ReadBlocking 24 static
../component/serial_manager/fsl_component_serial_manager.c:1945:25:SerialManager_EnterLowpower 24 static
../component/serial_manager/fsl_component_serial_manager.c:2001:25:SerialManager_ExitLowpower 24 static
../component/serial_manager/fsl_component_serial_manager.c:2065:6:SerialManager_SetLowpowerCriticalCb 16 static

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../component/serial_manager/fsl_component_serial_port_uart.c:171:25:Serial_UartInit 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:211:25:Serial_UartDeinit 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:285:25:Serial_UartWrite 32 static
../component/serial_manager/fsl_component_serial_port_uart.c:299:25:Serial_UartRead 32 static
../component/serial_manager/fsl_component_serial_port_uart.c:396:25:Serial_UartEnterLowpower 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:412:25:Serial_UartExitLowpower 32 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/serial_manager/fsl_component_serial_manager.c \
../component/serial_manager/fsl_component_serial_port_uart.c
C_DEPS += \
./component/serial_manager/fsl_component_serial_manager.d \
./component/serial_manager/fsl_component_serial_port_uart.d
OBJS += \
./component/serial_manager/fsl_component_serial_manager.o \
./component/serial_manager/fsl_component_serial_port_uart.o
# Each subdirectory must supply rules for building sources it contributes
component/serial_manager/%.o: ../component/serial_manager/%.c component/serial_manager/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-serial_manager
clean-component-2f-serial_manager:
-$(RM) ./component/serial_manager/fsl_component_serial_manager.d ./component/serial_manager/fsl_component_serial_manager.o ./component/serial_manager/fsl_component_serial_port_uart.d ./component/serial_manager/fsl_component_serial_port_uart.o
.PHONY: clean-component-2f-serial_manager

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../component/uart/fsl_adapter_lpuart.c:262:26:HAL_UartGetStatus 24 static
../component/uart/fsl_adapter_lpuart.c:642:26:HAL_UartInitCommon 48 static
../component/uart/fsl_adapter_lpuart.c:694:19:HAL_UartInit 24 static
../component/uart/fsl_adapter_lpuart.c:753:19:HAL_UartDeinit 24 static
../component/uart/fsl_adapter_lpuart.c:774:19:HAL_UartReceiveBlocking 32 static
../component/uart/fsl_adapter_lpuart.c:789:19:HAL_UartSendBlocking 32 static
../component/uart/fsl_adapter_lpuart.c:804:19:HAL_UartEnterLowpower 16 static
../component/uart/fsl_adapter_lpuart.c:811:19:HAL_UartExitLowpower 16 static

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@ -0,0 +1,31 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/uart/fsl_adapter_lpuart.c
C_DEPS += \
./component/uart/fsl_adapter_lpuart.d
OBJS += \
./component/uart/fsl_adapter_lpuart.o
# Each subdirectory must supply rules for building sources it contributes
component/uart/%.o: ../component/uart/%.c component/uart/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-uart
clean-component-2f-uart:
-$(RM) ./component/uart/fsl_adapter_lpuart.d ./component/uart/fsl_adapter_lpuart.o
.PHONY: clean-component-2f-uart

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@ -0,0 +1,31 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../device/system_MIMXRT1062.c
C_DEPS += \
./device/system_MIMXRT1062.d
OBJS += \
./device/system_MIMXRT1062.o
# Each subdirectory must supply rules for building sources it contributes
device/%.o: ../device/%.c device/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-device
clean-device:
-$(RM) ./device/system_MIMXRT1062.d ./device/system_MIMXRT1062.o
.PHONY: clean-device

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../device/system_MIMXRT1062.c:81:6:SystemInit 8 static
../device/system_MIMXRT1062.c:139:6:SystemCoreClockUpdate 48 static
../device/system_MIMXRT1062.c:244:29:SystemInitHook 4 static

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@ -0,0 +1,51 @@
../drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
../drivers/fsl_clock.h:1653:24:CLOCK_GetRtcFreq 4 static
../drivers/fsl_clock.h:1751:20:CLOCK_IsPllBypassed 16 static
../drivers/fsl_clock.h:1765:20:CLOCK_IsPllEnabled 16 static
../drivers/fsl_clock.h:1791:24:CLOCK_GetPllBypassRefClk 16 static
../drivers/fsl_clock.c:86:17:CLOCK_GetPeriphClkFreq 16 static
../drivers/fsl_clock.c:152:17:CLOCK_GetPllUsb1SWFreq 16 static
../drivers/fsl_clock.c:190:6:CLOCK_InitExternalClk 16 static
../drivers/fsl_clock.c:214:6:CLOCK_DeinitExternalClk 4 static
../drivers/fsl_clock.c:226:6:CLOCK_SwitchOsc 16 static
../drivers/fsl_clock.c:241:6:CLOCK_InitRcOsc24M 4 static
../drivers/fsl_clock.c:249:6:CLOCK_DeinitRcOsc24M 4 static
../drivers/fsl_clock.c:259:10:CLOCK_GetAhbFreq 8 static
../drivers/fsl_clock.c:269:10:CLOCK_GetSemcFreq 16 static
../drivers/fsl_clock.c:303:10:CLOCK_GetIpgFreq 8 static
../drivers/fsl_clock.c:313:10:CLOCK_GetPerClkFreq 16 static
../drivers/fsl_clock.c:342:10:CLOCK_GetFreq 24 static
../drivers/fsl_clock.c:448:10:CLOCK_GetClockRootFreq 40 static
../drivers/fsl_clock.c:492:6:CLOCK_EnableUsbhs0Clock 24 static
../drivers/fsl_clock.c:519:6:CLOCK_EnableUsbhs1Clock 24 static
../drivers/fsl_clock.c:544:6:CLOCK_EnableUsbhs0PhyPllClock 16 static
../drivers/fsl_clock.c:568:6:CLOCK_DisableUsbhs0PhyPllClock 4 static
../drivers/fsl_clock.c:581:6:CLOCK_InitArmPll 16 static
../drivers/fsl_clock.c:602:6:CLOCK_DeinitArmPll 4 static
../drivers/fsl_clock.c:614:6:CLOCK_InitSysPll 16 static
../drivers/fsl_clock.c:644:6:CLOCK_DeinitSysPll 4 static
../drivers/fsl_clock.c:656:6:CLOCK_InitUsb1Pll 16 static
../drivers/fsl_clock.c:677:6:CLOCK_DeinitUsb1Pll 4 static
../drivers/fsl_clock.c:689:6:CLOCK_InitUsb2Pll 16 static
../drivers/fsl_clock.c:710:6:CLOCK_DeinitUsb2Pll 4 static
../drivers/fsl_clock.c:722:6:CLOCK_InitAudioPll 24 static
../drivers/fsl_clock.c:797:6:CLOCK_DeinitAudioPll 4 static
../drivers/fsl_clock.c:809:6:CLOCK_InitVideoPll 24 static
../drivers/fsl_clock.c:883:6:CLOCK_DeinitVideoPll 4 static
../drivers/fsl_clock.c:895:6:CLOCK_InitEnetPll 24 static
../drivers/fsl_clock.c:937:6:CLOCK_DeinitEnetPll 4 static
../drivers/fsl_clock.c:950:10:CLOCK_GetPllFreq 128 static
../drivers/fsl_clock.c:1174:6:CLOCK_InitSysPfd 24 static
../drivers/fsl_clock.c:1197:6:CLOCK_DeinitSysPfd 16 static
../drivers/fsl_clock.c:1210:6:CLOCK_IsSysPfdEnabled 16 static
../drivers/fsl_clock.c:1225:6:CLOCK_InitUsb1Pfd 24 static
../drivers/fsl_clock.c:1248:6:CLOCK_DeinitUsb1Pfd 16 static
../drivers/fsl_clock.c:1261:6:CLOCK_IsUsb1PfdEnabled 16 static
../drivers/fsl_clock.c:1274:10:CLOCK_GetSysPfdFreq 24 static
../drivers/fsl_clock.c:1313:10:CLOCK_GetUsb1PfdFreq 24 static
../drivers/fsl_clock.c:1353:6:CLOCK_EnableUsbhs1PhyPllClock 16 static
../drivers/fsl_clock.c:1371:6:CLOCK_DisableUsbhs1PhyPllClock 4 static
../drivers/fsl_clock.c:1383:6:CLOCK_SetClockOutput1 24 static
../drivers/fsl_clock.c:1407:6:CLOCK_SetClockOutput2 24 static
../drivers/fsl_clock.c:1431:10:CLOCK_GetClockOutCLKO1Freq 16 static
../drivers/fsl_clock.c:1492:10:CLOCK_GetClockOutClkO2Freq 16 static

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../drivers/fsl_common.c:25:7:SDK_Malloc 32 static
../drivers/fsl_common.c:66:6:SDK_Free 24 static

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@ -0,0 +1,4 @@
../drivers/fsl_common_arm.c:121:6:MSDK_EnableCpuCycleCounter 8 static
../drivers/fsl_common_arm.c:139:10:MSDK_GetCpuCycleCount 4 static
../drivers/fsl_common_arm.c:175:13:DelayLoop 16 static
../drivers/fsl_common_arm.c:205:6:SDK_DelayAtLeastUs 48 static

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@ -0,0 +1,8 @@
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_gpio.h:242:20:GPIO_SetPinInterruptConfig 24 static
../drivers/fsl_gpio.c:47:17:GPIO_GetInstance 24 static
../drivers/fsl_gpio.c:75:6:GPIO_PinInit 32 static
../drivers/fsl_gpio.c:115:6:GPIO_PinWrite 24 static
../drivers/fsl_gpio.c:144:6:GPIO_PinSetInterruptConfig 32 static

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@ -0,0 +1,50 @@
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:1911:22:__NVIC_EnableIRQ 16 static
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
../drivers/fsl_common_arm.h:514:24:EnableIRQ 24 static
../drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
../drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../drivers/fsl_lpuart.h:355:20:LPUART_SoftwareReset 16 static
../drivers/fsl_lpuart.c:159:10:LPUART_GetInstance 24 static
../drivers/fsl_lpuart.c:194:8:LPUART_TransferGetRxRingBufferLength 32 static
../drivers/fsl_lpuart.c:215:13:LPUART_TransferIsRxRingBufferFull 24 static
../drivers/fsl_lpuart.c:232:13:LPUART_WriteNonBlocking 32 static
../drivers/fsl_lpuart.c:246:13:LPUART_ReadNonBlocking 40 static
../drivers/fsl_lpuart.c:300:10:LPUART_Init 56 static
../drivers/fsl_lpuart.c:524:6:LPUART_Deinit 24 static
../drivers/fsl_lpuart.c:588:6:LPUART_GetDefaultConfig 16 static
../drivers/fsl_lpuart.c:633:10:LPUART_SetBaudRate 56 static
../drivers/fsl_lpuart.c:733:6:LPUART_Enable9bitMode 24 static
../drivers/fsl_lpuart.c:767:6:LPUART_SendAddress 24 static
../drivers/fsl_lpuart.c:789:6:LPUART_EnableInterrupts 24 static
../drivers/fsl_lpuart.c:831:6:LPUART_DisableInterrupts 24 static
../drivers/fsl_lpuart.c:879:10:LPUART_GetEnabledInterrupts 24 static
../drivers/fsl_lpuart.c:917:10:LPUART_GetStatusFlags 24 static
../drivers/fsl_lpuart.c:950:10:LPUART_ClearStatusFlags 24 static
../drivers/fsl_lpuart.c:1000:10:LPUART_WriteBlocking 32 static
../drivers/fsl_lpuart.c:1065:10:LPUART_ReadBlocking 48 static
../drivers/fsl_lpuart.c:1200:6:LPUART_TransferCreateHandle 40 static
../drivers/fsl_lpuart.c:1265:6:LPUART_TransferStartRingBuffer 32 static
../drivers/fsl_lpuart.c:1294:6:LPUART_TransferStopRingBuffer 24 static
../drivers/fsl_lpuart.c:1332:10:LPUART_TransferSendNonBlocking 32 static
../drivers/fsl_lpuart.c:1375:6:LPUART_TransferAbortSend 24 static
../drivers/fsl_lpuart.c:1400:10:LPUART_TransferGetSendCount 32 static
../drivers/fsl_lpuart.c:1458:10:LPUART_TransferReceiveNonBlocking 56 static
../drivers/fsl_lpuart.c:1597:6:LPUART_TransferAbortReceive 24 static
../drivers/fsl_lpuart.c:1628:10:LPUART_TransferGetReceiveCount 32 static
../drivers/fsl_lpuart.c:1648:13:LPUART_TransferHandleIDLEReady 32 static
../drivers/fsl_lpuart.c:1701:13:LPUART_TransferHandleReceiveDataFull 40 static
../drivers/fsl_lpuart.c:1814:13:LPUART_TransferHandleSendDataEmpty 24 static
../drivers/fsl_lpuart.c:1854:13:LPUART_TransferHandleTransmissionComplete 32 static
../drivers/fsl_lpuart.c:1882:6:LPUART_TransferHandleIRQ 40 static
../drivers/fsl_lpuart.c:1940:6:LPUART_TransferHandleErrorIRQ 16 static
../drivers/fsl_lpuart.c:2035:6:LPUART1_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2060:6:LPUART2_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2084:6:LPUART3_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2108:6:LPUART4_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2132:6:LPUART5_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2156:6:LPUART6_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2180:6:LPUART7_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2204:6:LPUART8_DriverIRQHandler 8 static

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../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
../drivers/fsl_trng.c:1287:17:trng_GetInstance 24 static
../drivers/fsl_trng.c:1349:10:TRNG_GetDefaultConfig 24 static
../drivers/fsl_trng.c:1414:17:trng_SetRetryCount 24 static
../drivers/fsl_trng.c:1436:17:trng_SetMonobitLimit 32 static
../drivers/fsl_trng.c:1461:17:trng_SetRunBit1Limit 32 static
../drivers/fsl_trng.c:1485:17:trng_SetRunBit2Limit 32 static
../drivers/fsl_trng.c:1509:17:trng_SetRunBit3Limit 32 static
../drivers/fsl_trng.c:1532:17:trng_SetRunBit4Limit 32 static
../drivers/fsl_trng.c:1557:17:trng_SetRunBit5Limit 32 static
../drivers/fsl_trng.c:1582:17:trng_SetRunBit6Limit 32 static
../drivers/fsl_trng.c:1607:17:trng_SetPokerMaxLimit 32 static
../drivers/fsl_trng.c:1632:17:trng_SetFrequencyCountMaxLimit 32 static
../drivers/fsl_trng.c:1657:17:trng_SetStatisticalCheckLimit 32 static
../drivers/fsl_trng.c:1730:17:trng_ApplyUserConfig 24 static
../drivers/fsl_trng.c:1821:17:trng_ReadEntropy 24 static
../drivers/fsl_trng.c:1851:10:TRNG_Init 24 static
../drivers/fsl_trng.c:1912:6:TRNG_Deinit 16 static
../drivers/fsl_trng.c:1947:10:TRNG_GetRandomData 64 static

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@ -0,0 +1,46 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../drivers/fsl_clock.c \
../drivers/fsl_common.c \
../drivers/fsl_common_arm.c \
../drivers/fsl_gpio.c \
../drivers/fsl_lpuart.c \
../drivers/fsl_trng.c
C_DEPS += \
./drivers/fsl_clock.d \
./drivers/fsl_common.d \
./drivers/fsl_common_arm.d \
./drivers/fsl_gpio.d \
./drivers/fsl_lpuart.d \
./drivers/fsl_trng.d
OBJS += \
./drivers/fsl_clock.o \
./drivers/fsl_common.o \
./drivers/fsl_common_arm.o \
./drivers/fsl_gpio.o \
./drivers/fsl_lpuart.o \
./drivers/fsl_trng.o
# Each subdirectory must supply rules for building sources it contributes
drivers/%.o: ../drivers/%.c drivers/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-drivers
clean-drivers:
-$(RM) ./drivers/fsl_clock.d ./drivers/fsl_clock.o ./drivers/fsl_common.d ./drivers/fsl_common.o ./drivers/fsl_common_arm.d ./drivers/fsl_common_arm.o ./drivers/fsl_gpio.d ./drivers/fsl_gpio.o ./drivers/fsl_lpuart.d ./drivers/fsl_lpuart.o ./drivers/fsl_trng.d ./drivers/fsl_trng.o
.PHONY: clean-drivers

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@ -0,0 +1,69 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include xip/subdir.mk
-include utilities/subdir.mk
-include startup/subdir.mk
-include source/subdir.mk
-include drivers/subdir.mk
-include device/subdir.mk
-include component/uart/subdir.mk
-include component/serial_manager/subdir.mk
-include component/lists/subdir.mk
-include board/subdir.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
OPTIONAL_TOOL_DEPS := \
$(wildcard ../makefile.defs) \
$(wildcard ../makefile.init) \
$(wildcard ../makefile.targets) \
BUILD_ARTIFACT_NAME := rt1060-evk-xpresso-baremetal-builtin
BUILD_ARTIFACT_EXTENSION := axf
BUILD_ARTIFACT_PREFIX :=
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),)
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all:
+@$(MAKE) --no-print-directory main-build && $(MAKE) --no-print-directory post-build
# Main-build Target
main-build: rt1060-evk-xpresso-baremetal-builtin.axf
# Tool invocations
rt1060-evk-xpresso-baremetal-builtin.axf: $(OBJS) $(USER_OBJS) makefile $(OPTIONAL_TOOL_DEPS)
@echo 'Building target: $@'
@echo 'Invoking: MCU Linker'
arm-none-eabi-gcc -nostdlib -Xlinker -Map="rt1060-evk-xpresso-baremetal-builtin.map" -Xlinker --gc-sections -Xlinker -print-memory-usage -Xlinker --sort-section=alignment -Xlinker --cref -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -T rt1060-evk-xpresso-baremetal-builtin_Debug.ld -o "rt1060-evk-xpresso-baremetal-builtin.axf" $(OBJS) $(USER_OBJS) $(LIBS)
@echo 'Finished building target: $@'
@echo ' '
# Other Targets
clean:
-$(RM) rt1060-evk-xpresso-baremetal-builtin.axf
-@echo ' '
post-build:
-@echo 'Performing post-build steps'
-arm-none-eabi-size "rt1060-evk-xpresso-baremetal-builtin.axf" ; arm-none-eabi-objcopy -v -O binary "rt1060-evk-xpresso-baremetal-builtin.axf" "rt1060-evk-xpresso-baremetal-builtin.bin" ; # checksum -p MIMXRT1062xxxxB -d "rt1060-evk-xpresso-baremetal-builtin.bin"
-@echo ' '
.PHONY: all clean dependents main-build post-build
-include ../makefile.targets

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@ -0,0 +1,422 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 9:19:07 PM
*/
INCLUDE "rt1060-evk-xpresso-baremetal-builtin_Debug_library.ld"
INCLUDE "rt1060-evk-xpresso-baremetal-builtin_Debug_memory.ld"
ENTRY(ResetISR)
SECTIONS
{
/* Image Vector Table and Boot Data for booting from external flash */
.boot_hdr : ALIGN(4)
{
FILL(0xff)
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} >BOARD_FLASH
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4));
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5));
LONG( SIZEOF(.data_RAM5));
LONG(LOADADDR(.data_RAM6));
LONG( ADDR(.data_RAM6));
LONG( SIZEOF(.data_RAM6));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
LONG( ADDR(.bss_RAM6));
LONG( SIZEOF(.bss_RAM6));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > BOARD_FLASH
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > BOARD_FLASH
.ARM.exidx : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > BOARD_FLASH
_etext = .;
/* DATA section for SRAM_ITC */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
PROVIDE(__start_data_SRAM_ITC = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$SRAM_ITC)
*(.data.$RAM2)
*(.data.$SRAM_ITC)
*(.data.$RAM2.*)
*(.data.$SRAM_ITC.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
PROVIDE(__end_data_SRAM_ITC = .) ;
} > SRAM_ITC AT>BOARD_FLASH
/* DATA section for SRAM_OC2 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
PROVIDE(__start_data_SRAM_OC2 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$SRAM_OC2)
*(.data.$RAM3)
*(.data.$SRAM_OC2)
*(.data.$RAM3.*)
*(.data.$SRAM_OC2.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
PROVIDE(__end_data_SRAM_OC2 = .) ;
} > SRAM_OC2 AT>BOARD_FLASH
/* DATA section for SRAM_OC */
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM4 = .) ;
PROVIDE(__start_data_SRAM_OC = .) ;
*(.ramfunc.$RAM4)
*(.ramfunc.$SRAM_OC)
*(.data.$RAM4)
*(.data.$SRAM_OC)
*(.data.$RAM4.*)
*(.data.$SRAM_OC.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM4 = .) ;
PROVIDE(__end_data_SRAM_OC = .) ;
} > SRAM_OC AT>BOARD_FLASH
/* DATA section for BOARD_SDRAM */
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM5 = .) ;
PROVIDE(__start_data_BOARD_SDRAM = .) ;
*(.ramfunc.$RAM5)
*(.ramfunc.$BOARD_SDRAM)
*(.data.$RAM5)
*(.data.$BOARD_SDRAM)
*(.data.$RAM5.*)
*(.data.$BOARD_SDRAM.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM5 = .) ;
PROVIDE(__end_data_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT>BOARD_FLASH
/* DATA section for NCACHE_REGION */
.data_RAM6 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM6 = .) ;
PROVIDE(__start_data_NCACHE_REGION = .) ;
*(.ramfunc.$RAM6)
*(.ramfunc.$NCACHE_REGION)
*(.data.$RAM6)
*(.data.$NCACHE_REGION)
*(.data.$RAM6.*)
*(.data.$NCACHE_REGION.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM6 = .) ;
PROVIDE(__end_data_NCACHE_REGION = .) ;
} > NCACHE_REGION AT>BOARD_FLASH
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) : ALIGN(4)
{
_start_uninit_RESERVED = .;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > SRAM_DTC AT> SRAM_DTC
/* Main DATA section (SRAM_DTC) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
PROVIDE(__start_data_RAM = .) ;
PROVIDE(__start_data_SRAM_DTC = .) ;
*(vtable)
*(.ramfunc*)
KEEP(*(CodeQuickAccess))
KEEP(*(DataQuickAccess))
*(RamFunction)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
PROVIDE(__end_data_RAM = .) ;
PROVIDE(__end_data_SRAM_DTC = .) ;
} > SRAM_DTC AT>BOARD_FLASH
/* BSS section for SRAM_ITC */
.bss_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
PROVIDE(__start_bss_SRAM_ITC = .) ;
*(.bss.$RAM2)
*(.bss.$SRAM_ITC)
*(.bss.$RAM2.*)
*(.bss.$SRAM_ITC.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
PROVIDE(__end_bss_SRAM_ITC = .) ;
} > SRAM_ITC AT> SRAM_ITC
/* BSS section for SRAM_OC2 */
.bss_RAM3 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM3 = .) ;
PROVIDE(__start_bss_SRAM_OC2 = .) ;
*(.bss.$RAM3)
*(.bss.$SRAM_OC2)
*(.bss.$RAM3.*)
*(.bss.$SRAM_OC2.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
PROVIDE(__end_bss_SRAM_OC2 = .) ;
} > SRAM_OC2 AT> SRAM_OC2
/* BSS section for SRAM_OC */
.bss_RAM4 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM4 = .) ;
PROVIDE(__start_bss_SRAM_OC = .) ;
*(.bss.$RAM4)
*(.bss.$SRAM_OC)
*(.bss.$RAM4.*)
*(.bss.$SRAM_OC.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM4 = .) ;
PROVIDE(__end_bss_SRAM_OC = .) ;
} > SRAM_OC AT> SRAM_OC
/* BSS section for BOARD_SDRAM */
.bss_RAM5 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM5 = .) ;
PROVIDE(__start_bss_BOARD_SDRAM = .) ;
*(.bss.$RAM5)
*(.bss.$BOARD_SDRAM)
*(.bss.$RAM5.*)
*(.bss.$BOARD_SDRAM.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM5 = .) ;
PROVIDE(__end_bss_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT> BOARD_SDRAM
/* BSS section for NCACHE_REGION */
.bss_RAM6 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM6 = .) ;
PROVIDE(__start_bss_NCACHE_REGION = .) ;
*(.bss.$RAM6)
*(.bss.$NCACHE_REGION)
*(.bss.$RAM6.*)
*(.bss.$NCACHE_REGION.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM6 = .) ;
PROVIDE(__end_bss_NCACHE_REGION = .) ;
} > NCACHE_REGION AT> NCACHE_REGION
/* MAIN BSS SECTION */
.bss (NOLOAD) : ALIGN(4)
{
_bss = .;
PROVIDE(__start_bss_RAM = .) ;
PROVIDE(__start_bss_SRAM_DTC = .) ;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(__end_bss_RAM = .) ;
PROVIDE(__end_bss_SRAM_DTC = .) ;
PROVIDE(end = .);
} > SRAM_DTC AT> SRAM_DTC
/* NOINIT section for SRAM_ITC */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM2 = .) ;
PROVIDE(__start_noinit_SRAM_ITC = .) ;
*(.noinit.$RAM2)
*(.noinit.$SRAM_ITC)
*(.noinit.$RAM2.*)
*(.noinit.$SRAM_ITC.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM2 = .) ;
PROVIDE(__end_noinit_SRAM_ITC = .) ;
} > SRAM_ITC AT> SRAM_ITC
/* NOINIT section for SRAM_OC2 */
.noinit_RAM3 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM3 = .) ;
PROVIDE(__start_noinit_SRAM_OC2 = .) ;
*(.noinit.$RAM3)
*(.noinit.$SRAM_OC2)
*(.noinit.$RAM3.*)
*(.noinit.$SRAM_OC2.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM3 = .) ;
PROVIDE(__end_noinit_SRAM_OC2 = .) ;
} > SRAM_OC2 AT> SRAM_OC2
/* NOINIT section for SRAM_OC */
.noinit_RAM4 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM4 = .) ;
PROVIDE(__start_noinit_SRAM_OC = .) ;
*(.noinit.$RAM4)
*(.noinit.$SRAM_OC)
*(.noinit.$RAM4.*)
*(.noinit.$SRAM_OC.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM4 = .) ;
PROVIDE(__end_noinit_SRAM_OC = .) ;
} > SRAM_OC AT> SRAM_OC
/* NOINIT section for BOARD_SDRAM */
.noinit_RAM5 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM5 = .) ;
PROVIDE(__start_noinit_BOARD_SDRAM = .) ;
*(.noinit.$RAM5)
*(.noinit.$BOARD_SDRAM)
*(.noinit.$RAM5.*)
*(.noinit.$BOARD_SDRAM.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM5 = .) ;
PROVIDE(__end_noinit_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT> BOARD_SDRAM
/* NOINIT section for NCACHE_REGION */
.noinit_RAM6 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM6 = .) ;
PROVIDE(__start_noinit_NCACHE_REGION = .) ;
*(.noinit.$RAM6)
*(.noinit.$NCACHE_REGION)
*(.noinit.$RAM6.*)
*(.noinit.$NCACHE_REGION.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM6 = .) ;
PROVIDE(__end_noinit_NCACHE_REGION = .) ;
} > NCACHE_REGION AT> NCACHE_REGION
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
PROVIDE(__start_noinit_RAM = .) ;
PROVIDE(__start_noinit_SRAM_DTC = .) ;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
PROVIDE(__end_noinit_RAM = .) ;
PROVIDE(__end_noinit_SRAM_DTC = .) ;
} > SRAM_DTC AT> SRAM_DTC
/* Reserve and place Heap within memory map */
_HeapSize = 0x1000;
.heap (NOLOAD) : ALIGN(4)
{
_pvHeapStart = .;
. += _HeapSize;
. = ALIGN(4);
_pvHeapLimit = .;
} > SRAM_DTC
_StackSize = 0x1000;
/* Reserve space in memory for Stack */
.heap2stackfill (NOLOAD) :
{
. += _StackSize;
} > SRAM_DTC
/* Locate actual Stack in memory map */
.stack ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - _StackSize - 0 (NOLOAD) : ALIGN(4)
{
_vStackBase = .;
. = ALIGN(4);
_vStackTop = . + _StackSize;
} > SRAM_DTC
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

@ -0,0 +1,16 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from library.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 9:19:07 PM
*/
GROUP (
"libgcc.a"
"libc_nano.a"
"libm.a"
"libcr_newlib_nohost.a"
)

View File

@ -0,0 +1,51 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from memory.ldt by FMCreateLinkMemory
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 9:19:07 PM
*/
MEMORY
{
/* Define each memory region */
BOARD_FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 0x800000 /* 8M bytes (alias Flash) */
SRAM_DTC (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */
SRAM_ITC (rwx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias RAM2) */
SRAM_OC2 (rwx) : ORIGIN = 0x20200000, LENGTH = 0x80000 /* 512K bytes (alias RAM3) */
SRAM_OC (rwx) : ORIGIN = 0x20280000, LENGTH = 0x40000 /* 256K bytes (alias RAM4) */
BOARD_SDRAM (rwx) : ORIGIN = 0x80000000, LENGTH = 0x1e00000 /* 30M bytes (alias RAM5) */
NCACHE_REGION (rwx) : ORIGIN = 0x81e00000, LENGTH = 0x200000 /* 2M bytes (alias RAM6) */
}
/* Define a symbol for the top of each memory region */
__base_BOARD_FLASH = 0x60000000 ; /* BOARD_FLASH */
__base_Flash = 0x60000000 ; /* Flash */
__top_BOARD_FLASH = 0x60000000 + 0x800000 ; /* 8M bytes */
__top_Flash = 0x60000000 + 0x800000 ; /* 8M bytes */
__base_SRAM_DTC = 0x20000000 ; /* SRAM_DTC */
__base_RAM = 0x20000000 ; /* RAM */
__top_SRAM_DTC = 0x20000000 + 0x20000 ; /* 128K bytes */
__top_RAM = 0x20000000 + 0x20000 ; /* 128K bytes */
__base_SRAM_ITC = 0x0 ; /* SRAM_ITC */
__base_RAM2 = 0x0 ; /* RAM2 */
__top_SRAM_ITC = 0x0 + 0x20000 ; /* 128K bytes */
__top_RAM2 = 0x0 + 0x20000 ; /* 128K bytes */
__base_SRAM_OC2 = 0x20200000 ; /* SRAM_OC2 */
__base_RAM3 = 0x20200000 ; /* RAM3 */
__top_SRAM_OC2 = 0x20200000 + 0x80000 ; /* 512K bytes */
__top_RAM3 = 0x20200000 + 0x80000 ; /* 512K bytes */
__base_SRAM_OC = 0x20280000 ; /* SRAM_OC */
__base_RAM4 = 0x20280000 ; /* RAM4 */
__top_SRAM_OC = 0x20280000 + 0x40000 ; /* 256K bytes */
__top_RAM4 = 0x20280000 + 0x40000 ; /* 256K bytes */
__base_BOARD_SDRAM = 0x80000000 ; /* BOARD_SDRAM */
__base_RAM5 = 0x80000000 ; /* RAM5 */
__top_BOARD_SDRAM = 0x80000000 + 0x1e00000 ; /* 30M bytes */
__top_RAM5 = 0x80000000 + 0x1e00000 ; /* 30M bytes */
__base_NCACHE_REGION = 0x81e00000 ; /* NCACHE_REGION */
__base_RAM6 = 0x81e00000 ; /* RAM6 */
__top_NCACHE_REGION = 0x81e00000 + 0x200000 ; /* 2M bytes */
__top_RAM6 = 0x81e00000 + 0x200000 ; /* 2M bytes */

View File

@ -0,0 +1,16 @@
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:1911:22:__NVIC_EnableIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:2041:22:__NVIC_SetPriority 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:2259:26:SysTick_Config 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_gpio.h:176:24:GPIO_PinRead 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1288:20:IOMUXC_SetPinMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1320:20:IOMUXC_SetPinConfig 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1340:20:IOMUXC_EnableMode 24 static
../source/hal.h:16:20:ethernet_init 24 static
../source/main.c:28:6:SysTick_Handler 4 static
../source/main.c:32:10:mg_millis 4 static
../source/main.c:36:6:mg_random 16 static
../source/main.c:40:13:timer_fn 64 static
../source/main.c:52:5:main 224 static

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@ -0,0 +1,368 @@
../source/mongoose.c:5626:14:mg_ota_boot 4 static
../source/mongoose.c:27:12:mg_base64_encode_single 16 static
../source/mongoose.c:39:12:mg_base64_decode_single 16 static
../source/mongoose.c:57:8:mg_base64_update 32 static
../source/mongoose.c:73:8:mg_base64_final 24 static
../source/mongoose.c:84:8:mg_base64_encode 32 static
../source/mongoose.c:93:8:mg_base64_decode 48 static
../source/mongoose.c:207:7:mg_flash_start 4 static
../source/mongoose.c:210:8:mg_flash_size 4 static
../source/mongoose.c:213:8:mg_flash_sector_size 4 static
../source/mongoose.c:216:8:mg_flash_write_align 4 static
../source/mongoose.c:219:5:mg_flash_bank 4 static
../source/mongoose.c:222:6:mg_flash_erase 16 static
../source/mongoose.c:226:6:mg_flash_swap_bank 4 static
../source/mongoose.c:229:6:mg_flash_write 24 static
../source/mongoose.c:233:6:mg_device_reset 4 static
../source/mongoose.c:402:6:mg_flash_save 24 static
../source/mongoose.c:406:6:mg_flash_load 24 static
../source/mongoose.c:737:13:mg_dns_free 24 static
../source/mongoose.c:742:6:mg_resolve_cancel 32 static
../source/mongoose.c:751:15:mg_dns_parse_name_depth 56 static
../source/mongoose.c:788:15:mg_dns_parse_name 40 static
../source/mongoose.c:793:8:mg_dns_parse_rr 40 static
../source/mongoose.c:817:6:mg_dns_parse 56 static
../source/mongoose.c:855:13:dns_cb 344 static
../source/mongoose.c:913:13:mg_dns_send 312 static
../source/mongoose.c:940:13:mg_sendnsreq 56 static
../source/mongoose.c:972:6:mg_resolve 40 static
../source/mongoose.c:994:6:mg_call 32 static
../source/mongoose.c:1013:6:mg_error 92 static
../source/mongoose.c:1031:13:is_digit 16 static
../source/mongoose.c:1035:12:addexp 32 static
../source/mongoose.c:1047:12:xisinf 24 static
../source/mongoose.c:1056:12:xisnan 24 static
../source/mongoose.c:1066:15:mg_dtoa 136 static
../source/mongoose.c:1125:15:mg_lld 64 static
../source/mongoose.c:1147:15:scpy 32 static
../source/mongoose.c:1154:8:mg_xprintf 24 static
../source/mongoose.c:1163:8:mg_vxprintf 176 static
../source/mongoose.c:1257:15:mg_fs_open 32 static
../source/mongoose.c:1270:6:mg_fs_close 16 static
../source/mongoose.c:1277:7:mg_file_read 40 static
../source/mongoose.c:1298:6:mg_file_write 144 static
../source/mongoose.c:1317:6:mg_file_printf 32 static
../source/mongoose.c:1487:15:mg_unpacked 24 static
../source/mongoose.c:1493:12:is_dir_prefix 24 static
../source/mongoose.c:1499:12:packed_stat 40 static
../source/mongoose.c:1510:13:packed_list 256 static
../source/mongoose.c:1531:14:packed_open 32 static
../source/mongoose.c:1544:13:packed_close 16 static
../source/mongoose.c:1548:15:packed_read 32 static
../source/mongoose.c:1556:15:packed_write 24 static
../source/mongoose.c:1561:15:packed_seek 24 static
../source/mongoose.c:1568:13:packed_rename 16 static
../source/mongoose.c:1573:13:packed_remove 16 static
../source/mongoose.c:1578:13:packed_mkdir 16 static
../source/mongoose.c:1602:12:p_stat 112 static
../source/mongoose.c:1743:13:p_list 24 static
../source/mongoose.c:1759:14:p_open 24 static
../source/mongoose.c:1772:13:p_close 16 static
../source/mongoose.c:1776:15:p_read 24 static
../source/mongoose.c:1780:15:p_write 24 static
../source/mongoose.c:1784:15:p_seek 16 static
../source/mongoose.c:1795:13:p_rename 16 static
../source/mongoose.c:1799:13:p_remove 16 static
../source/mongoose.c:1803:13:p_mkdir 16 static
../source/mongoose.c:1870:6:mg_to_size_t 48 static
../source/mongoose.c:1904:8:mg_http_next_multipart 112 static
../source/mongoose.c:1944:6:mg_http_bauth 56 static
../source/mongoose.c:1970:15:mg_http_var 48 static
../source/mongoose.c:1981:5:mg_http_get_var 56 static
../source/mongoose.c:2001:13:isx 16 static
../source/mongoose.c:2006:5:mg_url_decode 32 static
../source/mongoose.c:2028:13:isok 16 static
../source/mongoose.c:2032:5:mg_http_get_request_len 24 static
../source/mongoose.c:2042:16:mg_http_get_header 40 static
../source/mongoose.c:2052:13:vcb 16 static
../source/mongoose.c:2057:15:clen 32 static
../source/mongoose.c:2069:20:skiptorn 24 static
../source/mongoose.c:2078:13:mg_http_parse_headers 48 static
../source/mongoose.c:2100:5:mg_http_parse 48 static
../source/mongoose.c:2173:13:mg_http_vprintf_chunk 32 static
../source/mongoose.c:2186:6:mg_http_printf_chunk 28 static
../source/mongoose.c:2193:6:mg_http_write_chunk 24 static
../source/mongoose.c:2201:20:mg_http_status_code_str 16 static
../source/mongoose.c:2271:6:mg_http_reply 52 static
../source/mongoose.c:2290:13:restore_http_cb 16 static
../source/mongoose.c:2298:7:mg_http_etag 48 static
../source/mongoose.c:2303:13:static_cb 48 static
../source/mongoose.c:2362:22:guess_content_type 64 static
../source/mongoose.c:2384:12:getrange 48 static
../source/mongoose.c:2400:6:mg_http_serve_file 480 static
../source/mongoose.c:2606:12:uri_to_path2 56 static
../source/mongoose.c:2665:12:uri_to_path 112 static
../source/mongoose.c:2679:6:mg_http_serve_dir 152 static
../source/mongoose.c:2700:13:mg_is_url_safe 16 static
../source/mongoose.c:2705:8:mg_url_encode 40 static
../source/mongoose.c:2723:6:mg_http_creds 328 static
../source/mongoose.c:2745:22:stripquotes 24 static
../source/mongoose.c:2751:15:mg_http_get_header_var 56 static
../source/mongoose.c:2768:6:mg_http_match_uri 32 static
../source/mongoose.c:2772:6:mg_http_upload 72 static
../source/mongoose.c:2808:5:mg_http_status 16 static
../source/mongoose.c:2812:13:is_hex_digit 16 static
../source/mongoose.c:2817:12:skip_chunk 32 static
../source/mongoose.c:2831:13:http_cb 616 static
../source/mongoose.c:2896:13:mg_hfn 40 static
../source/mongoose.c:2915:6:mg_hello 96 static
../source/mongoose.c:2924:23:mg_http_connect 32 static
../source/mongoose.c:2931:23:mg_http_listen 32 static
../source/mongoose.c:2946:15:roundup 16 static
../source/mongoose.c:2950:5:mg_iobuf_resize 56 static
../source/mongoose.c:2977:5:mg_iobuf_init 24 static
../source/mongoose.c:2984:8:mg_iobuf_add 32 static
../source/mongoose.c:2996:8:mg_iobuf_del 24 static
../source/mongoose.c:3005:6:mg_iobuf_free 16 static
../source/mongoose.c:3016:20:escapeseq 16 static
../source/mongoose.c:3020:13:json_esc 32 static
../source/mongoose.c:3028:12:mg_pass_string 24 static
../source/mongoose.c:3042:15:mg_atod 72 static
../source/mongoose.c:3089:8:mg_json_next 64 static
../source/mongoose.c:3137:5:mg_json_get 120 static
../source/mongoose.c:3280:6:mg_json_get_num 48 static
../source/mongoose.c:3290:6:mg_json_get_bool 40 static
../source/mongoose.c:3299:6:mg_json_unescape 48 static
../source/mongoose.c:3324:7:mg_json_get_str 48 static
../source/mongoose.c:3338:7:mg_json_get_b64 48 static
../source/mongoose.c:3350:7:mg_json_get_hex 48 static
../source/mongoose.c:3362:6:mg_json_get_long 48 static
../source/mongoose.c:3381:6:mg_log_set_fn 16 static
../source/mongoose.c:3386:13:logc 16 static
../source/mongoose.c:3390:13:logs 24 static
../source/mongoose.c:3398:6:mg_log_prefix 112 static
../source/mongoose.c:3410:6:mg_log 16 static
../source/mongoose.c:3419:22:nibble 16 static
../source/mongoose.c:3424:6:mg_hexdump 48 static
../source/mongoose.c:3467:13:mg_byte_reverse 24 static
../source/mongoose.c:3492:6:mg_md5_init 16 static
../source/mongoose.c:3502:13:mg_md5_transform 32 static
../source/mongoose.c:3584:6:mg_md5_update 32 static
../source/mongoose.c:3619:6:mg_md5_final 32 static
../source/mongoose.c:3701:6:mg_mqtt_send_header 40 static
../source/mongoose.c:3714:13:mg_send_u16 16 static
../source/mongoose.c:3718:13:mg_send_u32 16 static
../source/mongoose.c:3722:16:varint_size 24 static
../source/mongoose.c:3731:15:encode_varint 24 static
../source/mongoose.c:3744:15:decode_varint 40 static
../source/mongoose.c:3759:12:mqtt_prop_type_by_id 24 static
../source/mongoose.c:3769:15:get_properties_length 24 static
../source/mongoose.c:3806:15:get_props_size 24 static
../source/mongoose.c:3812:13:mg_send_mqtt_properties 48 static
../source/mongoose.c:3854:8:mg_mqtt_next_prop 40 static
../source/mongoose.c:3908:6:mg_mqtt_login 72 static
../source/mongoose.c:3974:6:mg_mqtt_pub 40 static
../source/mongoose.c:3996:6:mg_mqtt_sub 32 static
../source/mongoose.c:4011:5:mg_mqtt_parse 48 static
../source/mongoose.c:4081:13:mqtt_cb 112 static
../source/mongoose.c:4153:6:mg_mqtt_ping 16 static
../source/mongoose.c:4157:6:mg_mqtt_pong 16 static
../source/mongoose.c:4161:6:mg_mqtt_disconnect 24 static
../source/mongoose.c:4174:23:mg_mqtt_connect 96 static
../source/mongoose.c:4187:23:mg_mqtt_listen 32 static
../source/mongoose.c:4206:8:mg_vprintf 32 static
../source/mongoose.c:4212:8:mg_printf 28 static
../source/mongoose.c:4221:13:mg_atonl 32 static
../source/mongoose.c:4229:13:mg_atone 24 static
../source/mongoose.c:4236:13:mg_aton4 40 static
../source/mongoose.c:4257:13:mg_v4mapped 40 static
../source/mongoose.c:4275:13:mg_aton6 48 static
../source/mongoose.c:4320:6:mg_aton 24 static
../source/mongoose.c:4326:23:mg_alloc_conn 24 static
../source/mongoose.c:4338:6:mg_close_conn 24 static
../source/mongoose.c:4358:23:mg_connect 32 static
../source/mongoose.c:4379:23:mg_listen 32 static
../source/mongoose.c:4402:23:mg_wrapfd 32 static
../source/mongoose.c:4416:18:mg_timer_add 48 static
../source/mongoose.c:4426:6:mg_io_recv 24 static
../source/mongoose.c:4434:6:mg_mgr_free 32 static
../source/mongoose.c:4451:6:mg_mgr_init 16 static
../source/mongoose.c:4619:13:mkpay 32 static
../source/mongoose.c:4624:17:csumup 32 static
../source/mongoose.c:4630:17:csumfin 16 static
../source/mongoose.c:4635:17:ipcsum 24 static
../source/mongoose.c:4640:13:settmout 56 static
../source/mongoose.c:4653:15:ether_output 24 static
../source/mongoose.c:4659:13:arp_ask 24 static
../source/mongoose.c:4673:13:onstatechange 16 static
../source/mongoose.c:4687:19:tx_ip 32 static
../source/mongoose.c:4707:13:tx_udp 48 static
../source/mongoose.c:4729:13:tx_dhcp 320 static
../source/mongoose.c:4746:13:tx_dhcp_request_sel 80 static
../source/mongoose.c:4763:13:tx_dhcp_request_re 48 static
../source/mongoose.c:4773:13:tx_dhcp_discover 40 static
../source/mongoose.c:4783:30:getpeer 32 static
../source/mongoose.c:4798:13:rx_arp 48 static
../source/mongoose.c:4837:13:rx_icmp 48 static
../source/mongoose.c:4853:13:rx_dhcp_client 88 static
../source/mongoose.c:4902:13:rx_dhcp_server 368 static
../source/mongoose.c:4941:13:rx_udp 24 static
../source/mongoose.c:4963:15:tx_tcp 88 static
../source/mongoose.c:4993:15:tx_tcp_pkt 72 static
../source/mongoose.c:5002:30:accept_conn 32 static
../source/mongoose.c:5029:15:trim_len 48 static
../source/mongoose.c:5056:6:mg_io_send 80 static
../source/mongoose.c:5079:13:read_conn 96 static
../source/mongoose.c:5170:13:rx_tcp 48 static
../source/mongoose.c:5219:13:rx_ip 56 static
../source/mongoose.c:5262:13:rx_ip6 16 static
../source/mongoose.c:5278:13:mg_tcpip_rx 88 static
../source/mongoose.c:5322:13:mg_tcpip_poll 104 static
../source/mongoose.c:5409:6:mg_tcpip_qwrite 32 static
../source/mongoose.c:5420:6:mg_tcpip_init 24 static
../source/mongoose.c:5451:6:mg_tcpip_free 16 static
../source/mongoose.c:5456:13:send_syn 64 static
../source/mongoose.c:5466:6:mg_connect_resolved 48 static
../source/mongoose.c:5506:6:mg_open_listener 16 static
../source/mongoose.c:5511:13:write_conn 24 static
../source/mongoose.c:5522:13:init_closure 80 static
../source/mongoose.c:5536:13:close_conn 24 static
../source/mongoose.c:5542:13:can_write 16 static
../source/mongoose.c:5547:6:mg_mgr_poll 64 static
../source/mongoose.c:5567:6:mg_send 64 static
../source/mongoose.c:5593:6:mg_ota_begin 16 static
../source/mongoose.c:5597:6:mg_ota_write 16 static
../source/mongoose.c:5601:6:mg_ota_end 4 static
../source/mongoose.c:5604:6:mg_ota_commit 4 static
../source/mongoose.c:5607:6:mg_ota_rollback 4 static
../source/mongoose.c:5610:5:mg_ota_status 16 static
../source/mongoose.c:5614:10:mg_ota_crc32 16 static
../source/mongoose.c:5618:10:mg_ota_timestamp 16 static
../source/mongoose.c:5622:8:mg_ota_size 16 static
../source/mongoose.c:5840:8:mg_queue_vprintf 32 static
../source/mongoose.c:5852:8:mg_queue_printf 28 static
../source/mongoose.c:5861:13:mg_pfn_iobuf_private 24 static
../source/mongoose.c:5872:13:mg_putchar_iobuf_static 16 static
../source/mongoose.c:5876:6:mg_pfn_iobuf 16 static
../source/mongoose.c:5880:8:mg_vsnprintf 48 static
../source/mongoose.c:5887:8:mg_snprintf 24 static
../source/mongoose.c:5896:7:mg_vmprintf 32 static
../source/mongoose.c:5902:7:mg_mprintf 16 static
../source/mongoose.c:5911:6:mg_pfn_stdout 16 static
../source/mongoose.c:5916:15:print_ip4 40 static
../source/mongoose.c:5920:15:print_ip6 80 static
../source/mongoose.c:5927:8:mg_print_ip4 32 static
../source/mongoose.c:5932:8:mg_print_ip6 32 static
../source/mongoose.c:5937:8:mg_print_ip 32 static
../source/mongoose.c:5943:8:mg_print_ip_port 40 static
../source/mongoose.c:5948:8:mg_print_mac 64 static
../source/mongoose.c:5954:13:mg_esc 32 static
../source/mongoose.c:5962:13:mg_escape 16 static
../source/mongoose.c:5966:15:qcpy 40 static
../source/mongoose.c:5980:15:bcpy 48 static
../source/mongoose.c:5997:8:mg_print_hex 40 static
../source/mongoose.c:6008:8:mg_print_base64 32 static
../source/mongoose.c:6014:8:mg_print_esc 32 static
../source/mongoose.c:6050:6:mg_queue_init 24 static
../source/mongoose.c:6056:15:mg_queue_read_len 24 static
../source/mongoose.c:6064:13:mg_queue_write_len 24 static
../source/mongoose.c:6070:8:mg_queue_book 32 static
../source/mongoose.c:6083:8:mg_queue_next 24 static
../source/mongoose.c:6097:6:mg_queue_add 16 static
../source/mongoose.c:6104:6:mg_queue_del 16 static
../source/mongoose.c:6115:6:mg_rpc_add 48 static
../source/mongoose.c:6124:6:mg_rpc_del 24 static
../source/mongoose.c:6137:13:mg_rpc_call 40 static
../source/mongoose.c:6148:6:mg_rpc_process 48 static
../source/mongoose.c:6162:6:mg_rpc_vok 72 static
../source/mongoose.c:6172:6:mg_rpc_ok 28 static
../source/mongoose.c:6179:6:mg_rpc_verr 80 static
../source/mongoose.c:6192:6:mg_rpc_err 24 static
../source/mongoose.c:6199:15:print_methods 56 static
../source/mongoose.c:6210:6:mg_rpc_list 16 static
../source/mongoose.c:6229:17:blk0 16 static
../source/mongoose.c:6266:13:mg_sha1_transform 112 static
../source/mongoose.c:6373:6:mg_sha1_init 16 static
../source/mongoose.c:6382:6:mg_sha1_update 32 static
../source/mongoose.c:6402:6:mg_sha1_final 32 static
../source/mongoose.c:6452:6:mg_sha256_init 16 static
../source/mongoose.c:6465:13:mg_sha256_chunk 320 static
../source/mongoose.c:6507:6:mg_sha256_update 40 static
../source/mongoose.c:6521:6:mg_sha256_final 40 static
../source/mongoose.c:6560:6:mg_hmac_sha256 344 static
../source/mongoose.c:6602:16:gettimestamp 56 static
../source/mongoose.c:6608:9:mg_sntp_parse 144 static
../source/mongoose.c:6633:13:sntp_cb 40 static
../source/mongoose.c:6651:6:mg_sntp_request 96 static
../source/mongoose.c:6666:23:mg_sntp_connect 32 static
../source/mongoose.c:7490:6:mg_http_serve_ssi 24 static
../source/mongoose.c:7502:15:mg_str_s 24 static
../source/mongoose.c:7507:15:mg_str_n 32 static
../source/mongoose.c:7512:5:mg_lower 24 static
../source/mongoose.c:7518:5:mg_ncasecmp 40 static
../source/mongoose.c:7526:5:mg_casecmp 16 static
../source/mongoose.c:7530:5:mg_vcmp 32 static
../source/mongoose.c:7537:5:mg_vcasecmp 32 static
../source/mongoose.c:7544:15:mg_strdup 40 static
../source/mongoose.c:7558:5:mg_strcmp 40 static
../source/mongoose.c:7572:13:mg_strstr 40 static
../source/mongoose.c:7585:13:is_space 16 static
../source/mongoose.c:7589:15:mg_strstrip 24 static
../source/mongoose.c:7595:6:mg_match 40 static
../source/mongoose.c:7627:6:mg_globmatch 48 static
../source/mongoose.c:7631:15:mg_nce 32 static
../source/mongoose.c:7644:6:mg_split 80 static
../source/mongoose.c:7654:6:mg_commalist 24 static
../source/mongoose.c:7658:7:mg_hex 40 static
../source/mongoose.c:7670:22:mg_unhex_nimble 16 static
../source/mongoose.c:7676:15:mg_unhexn 24 static
../source/mongoose.c:7682:6:mg_unhex 32 static
../source/mongoose.c:7689:6:mg_path_is_sane 24 static
../source/mongoose.c:7707:6:mg_timer_init 24 static
../source/mongoose.c:7714:6:mg_timer_free 16 static
../source/mongoose.c:7720:6:mg_timer_expired 56 static
../source/mongoose.c:7728:6:mg_timer_poll 56 static
../source/mongoose.c:9642:6:mg_tls_init 16 static
../source/mongoose.c:9646:6:mg_tls_handshake 16 static
../source/mongoose.c:9649:6:mg_tls_free 16 static
../source/mongoose.c:9652:6:mg_tls_recv 24 static
../source/mongoose.c:9655:6:mg_tls_send 24 static
../source/mongoose.c:9658:8:mg_tls_pending 16 static
../source/mongoose.c:9662:6:mg_tls_ctx_init 16 static
../source/mongoose.c:9665:6:mg_tls_ctx_free 16 static
../source/mongoose.c:13331:5:mg_url_is_ssl 16 static
../source/mongoose.c:13337:19:urlparse 56 static
../source/mongoose.c:13365:15:mg_url_host 56 static
../source/mongoose.c:13374:13:mg_url_uri 48 static
../source/mongoose.c:13379:16:mg_url_port 48 static
../source/mongoose.c:13391:15:mg_url_user 64 static
../source/mongoose.c:13401:15:mg_url_pass 64 static
../source/mongoose.c:13418:6:mg_bzero 16 static
../source/mongoose.c:13445:7:mg_random_str 24 static
../source/mongoose.c:13458:10:mg_ntohl 24 static
../source/mongoose.c:13465:10:mg_ntohs 24 static
../source/mongoose.c:13471:10:mg_crc32 32 static
../source/mongoose.c:13486:12:isbyte 16 static
../source/mongoose.c:13490:12:parse_net 72 static
../source/mongoose.c:13504:5:mg_check_ip_acl 56 static
../source/mongoose.c:13591:8:mg_ws_vprintf 32 static
../source/mongoose.c:13599:8:mg_ws_printf 24 static
../source/mongoose.c:13608:13:ws_handshake 176 static
../source/mongoose.c:13634:17:be32 16 static
../source/mongoose.c:13639:15:ws_process 56 static
../source/mongoose.c:13669:15:mkhdr 48 static
../source/mongoose.c:13697:13:mg_ws_mask 32 static
../source/mongoose.c:13705:8:mg_ws_send 48 static
../source/mongoose.c:13716:13:mg_ws_client_handshake 560 static
../source/mongoose.c:13739:13:mg_ws_cb 72 static
../source/mongoose.c:13810:23:mg_ws_connect 112 static
../source/mongoose.c:13840:6:mg_ws_upgrade 40 static
../source/mongoose.c:13860:8:mg_ws_wrap 48 static
../source/mongoose.c:14047:17:enet_phy_read 16 static
../source/mongoose.c:14054:13:enet_phy_write 16 static
../source/mongoose.c:14061:17:enet_phy_id 24 static
../source/mongoose.c:14070:13:mg_tcpip_driver_imxrt_init 40 static
../source/mongoose.c:14138:15:mg_tcpip_driver_imxrt_tx 24 static
../source/mongoose.c:14161:13:mg_tcpip_driver_imxrt_up 48 static
../source/mongoose.c:14196:6:ENET_IRQHandler 24 static
../source/mongoose.c:15221:13:w5500_txn 32 static
../source/mongoose.c:15236:14:w5500_wn 32 static
../source/mongoose.c:15237:14:w5500_w1 24 static
../source/mongoose.c:15238:14:w5500_w2 40 static
../source/mongoose.c:15239:14:w5500_rn 32 static
../source/mongoose.c:15240:17:w5500_r1 32 static
../source/mongoose.c:15241:18:w5500_r2 32 static
../source/mongoose.c:15244:15:w5500_rx 48 static
../source/mongoose.c:15263:15:w5500_tx 48 static
../source/mongoose.c:15282:13:w5500_init 24 static
../source/mongoose.c:15296:13:w5500_up 24 static

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@ -0,0 +1,23 @@
../source/net.c:32:10:mg_now 16 static
../source/net.c:36:5:ui_event_next 24 static
../source/net.c:54:13:sfn 56 static
../source/net.c:68:13:timer_sntp_fn 16 static
../source/net.c:73:21:authenticate 160 static
../source/net.c:100:13:handle_login 296 static
../source/net.c:109:13:handle_logout 272 static
../source/net.c:119:13:handle_debug 32 static
../source/net.c:125:15:print_int_arr 48 static
../source/net.c:134:13:handle_stats_get 136 static
../source/net.c:143:15:print_events 144 static
../source/net.c:162:13:handle_events_get 64 static
../source/net.c:169:13:handle_settings_set 96 static
../source/net.c:190:13:handle_settings_get 96 static
../source/net.c:199:13:handle_firmware_upload 168 static
../source/net.c:228:13:handle_firmware_commit 32 static
../source/net.c:233:13:handle_firmware_rollback 32 static
../source/net.c:238:15:print_status 120 static
../source/net.c:246:13:handle_firmware_status 32 static
../source/net.c:251:13:handle_device_reset 32 static
../source/net.c:256:13:handle_device_eraselast 32 static
../source/net.c:265:13:fn 120 static
../source/net.c:322:6:web_init 32 static

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@ -0,0 +1,3 @@
../source/packed_fs.c:2681:12:scmp 16 static
../source/packed_fs.c:2685:13:mg_unlist 16 static
../source/packed_fs.c:2688:13:mg_unpack 32 static

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@ -0,0 +1,43 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../source/main.c \
../source/mongoose.c \
../source/net.c \
../source/packed_fs.c \
../source/syscalls.c
C_DEPS += \
./source/main.d \
./source/mongoose.d \
./source/net.d \
./source/packed_fs.d \
./source/syscalls.d
OBJS += \
./source/main.o \
./source/mongoose.o \
./source/net.o \
./source/packed_fs.o \
./source/syscalls.o
# Each subdirectory must supply rules for building sources it contributes
source/%.o: ../source/%.c source/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-source
clean-source:
-$(RM) ./source/main.d ./source/main.o ./source/mongoose.d ./source/mongoose.o ./source/net.d ./source/net.o ./source/packed_fs.d ./source/packed_fs.o ./source/syscalls.d ./source/syscalls.o
.PHONY: clean-source

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@ -0,0 +1,17 @@
../source/syscalls.c:5:5:_fstat 16 static
../source/syscalls.c:11:7:_sbrk 32 static
../source/syscalls.c:24:5:_open 16 static
../source/syscalls.c:29:5:_close 16 static
../source/syscalls.c:34:5:_isatty 16 static
../source/syscalls.c:39:5:_lseek 24 static
../source/syscalls.c:44:6:_exit 16 static
../source/syscalls.c:49:6:_kill 16 static
../source/syscalls.c:53:5:_getpid 4 static
../source/syscalls.c:65:5:_write 24 static
../source/syscalls.c:73:5:_read 24 static
../source/syscalls.c:78:5:_link 16 static
../source/syscalls.c:83:5:_unlink 16 static
../source/syscalls.c:88:5:_stat 16 static
/usr/local/mcuxpressoide-11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.linux_11.8.1.202308071233/tools/arm-none-eabi/include/sys/stat.h:140:5:mkdir 16 static
../source/syscalls.c:98:6:_init 4 static
../source/syscalls.c:102:5:_gettimeofday 24 static

View File

@ -0,0 +1,27 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
ASM_SRCS :=
C_SRCS :=
OBJ_SRCS :=
O_SRCS :=
S_SRCS :=
S_UPPER_SRCS :=
C_DEPS :=
EXECUTABLES :=
OBJS :=
# Every subdirectory with source files must be described here
SUBDIRS := \
board \
component/lists \
component/serial_manager \
component/uart \
device \
drivers \
source \
startup \
utilities \
xip \

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@ -0,0 +1,171 @@
../startup/startup_mimxrt1062.c:618:6:data_init 4 static
../startup/startup_mimxrt1062.c:627:6:bss_init 0 static
../startup/startup_mimxrt1062.c:652:6:ResetISR 0 static
../startup/startup_mimxrt1062.c:743:14:NMI_Handler 0 static
../startup/startup_mimxrt1062.c:747:14:HardFault_Handler 0 static
../startup/startup_mimxrt1062.c:751:14:MemManage_Handler 0 static
../startup/startup_mimxrt1062.c:755:14:BusFault_Handler 0 static
../startup/startup_mimxrt1062.c:759:14:UsageFault_Handler 0 static
../startup/startup_mimxrt1062.c:763:14:SVC_Handler 0 static
../startup/startup_mimxrt1062.c:767:14:DebugMon_Handler 0 static
../startup/startup_mimxrt1062.c:771:14:PendSV_Handler 0 static
../startup/startup_mimxrt1062.c:775:14:SysTick_Handler 0 static
../startup/startup_mimxrt1062.c:783:14:IntDefaultHandler 0 static
../startup/startup_mimxrt1062.c:793:11:DMA0_DMA16_IRQHandler 8 static
../startup/startup_mimxrt1062.c:797:11:DMA1_DMA17_IRQHandler 8 static
../startup/startup_mimxrt1062.c:801:11:DMA2_DMA18_IRQHandler 8 static
../startup/startup_mimxrt1062.c:805:11:DMA3_DMA19_IRQHandler 8 static
../startup/startup_mimxrt1062.c:809:11:DMA4_DMA20_IRQHandler 8 static
../startup/startup_mimxrt1062.c:813:11:DMA5_DMA21_IRQHandler 8 static
../startup/startup_mimxrt1062.c:817:11:DMA6_DMA22_IRQHandler 8 static
../startup/startup_mimxrt1062.c:821:11:DMA7_DMA23_IRQHandler 8 static
../startup/startup_mimxrt1062.c:825:11:DMA8_DMA24_IRQHandler 8 static
../startup/startup_mimxrt1062.c:829:11:DMA9_DMA25_IRQHandler 8 static
../startup/startup_mimxrt1062.c:833:11:DMA10_DMA26_IRQHandler 8 static
../startup/startup_mimxrt1062.c:837:11:DMA11_DMA27_IRQHandler 8 static
../startup/startup_mimxrt1062.c:841:11:DMA12_DMA28_IRQHandler 8 static
../startup/startup_mimxrt1062.c:845:11:DMA13_DMA29_IRQHandler 8 static
../startup/startup_mimxrt1062.c:849:11:DMA14_DMA30_IRQHandler 8 static
../startup/startup_mimxrt1062.c:853:11:DMA15_DMA31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:857:11:DMA_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:861:11:CTI0_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:865:11:CTI1_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:869:11:CORE_IRQHandler 8 static
../startup/startup_mimxrt1062.c:873:11:LPUART1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:877:11:LPUART2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:881:11:LPUART3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:885:11:LPUART4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:889:11:LPUART5_IRQHandler 8 static
../startup/startup_mimxrt1062.c:893:11:LPUART6_IRQHandler 8 static
../startup/startup_mimxrt1062.c:897:11:LPUART7_IRQHandler 8 static
../startup/startup_mimxrt1062.c:901:11:LPUART8_IRQHandler 8 static
../startup/startup_mimxrt1062.c:905:11:LPI2C1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:909:11:LPI2C2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:913:11:LPI2C3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:917:11:LPI2C4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:921:11:LPSPI1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:925:11:LPSPI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:929:11:LPSPI3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:933:11:LPSPI4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:937:11:CAN1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:941:11:CAN2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:945:11:FLEXRAM_IRQHandler 8 static
../startup/startup_mimxrt1062.c:949:11:KPP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:953:11:TSC_DIG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:957:11:GPR_IRQ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:961:11:LCDIF_IRQHandler 8 static
../startup/startup_mimxrt1062.c:965:11:CSI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:969:11:PXP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:973:11:WDOG2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:977:11:SNVS_HP_WRAPPER_IRQHandler 8 static
../startup/startup_mimxrt1062.c:981:11:SNVS_HP_WRAPPER_TZ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:985:11:SNVS_LP_WRAPPER_IRQHandler 8 static
../startup/startup_mimxrt1062.c:989:11:CSU_IRQHandler 8 static
../startup/startup_mimxrt1062.c:993:11:DCP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:997:11:DCP_VMI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1001:11:Reserved68_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1005:11:TRNG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1009:11:SJC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1013:11:BEE_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1017:11:SAI1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1021:11:SAI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1025:11:SAI3_RX_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1029:11:SAI3_TX_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1033:11:SPDIF_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1037:11:PMU_EVENT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1041:11:Reserved78_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1045:11:TEMP_LOW_HIGH_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1049:11:TEMP_PANIC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1053:11:USB_PHY1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1057:11:USB_PHY2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1061:11:ADC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1065:11:ADC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1069:11:DCDC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1073:11:Reserved86_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1077:11:GPIO10_Combined_0_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1081:11:GPIO1_INT0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1085:11:GPIO1_INT1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1089:11:GPIO1_INT2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1093:11:GPIO1_INT3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1097:11:GPIO1_INT4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1101:11:GPIO1_INT5_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1105:11:GPIO1_INT6_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1109:11:GPIO1_INT7_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1113:11:GPIO1_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1117:11:GPIO1_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1121:11:GPIO2_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1125:11:GPIO2_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1129:11:GPIO3_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1133:11:GPIO3_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1137:11:GPIO4_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1141:11:GPIO4_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1145:11:GPIO5_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1149:11:GPIO5_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1153:11:FLEXIO1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1157:11:FLEXIO2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1161:11:WDOG1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1165:11:RTWDOG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1169:11:EWM_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1173:11:CCM_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1177:11:CCM_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1181:11:GPC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1185:11:SRC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1189:11:Reserved115_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1193:11:GPT1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1197:11:GPT2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1201:11:PWM1_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1205:11:PWM1_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1209:11:PWM1_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1213:11:PWM1_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1217:11:PWM1_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1221:11:FLEXSPI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1225:11:FLEXSPI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1229:11:SEMC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1233:11:USDHC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1237:11:USDHC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1241:11:USB_OTG2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1245:11:USB_OTG1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1249:11:ENET_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1253:11:ENET_1588_Timer_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1257:11:XBAR1_IRQ_0_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1261:11:XBAR1_IRQ_2_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1265:11:ADC_ETC_IRQ0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1269:11:ADC_ETC_IRQ1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1273:11:ADC_ETC_IRQ2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1277:11:ADC_ETC_ERROR_IRQ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1281:11:PIT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1285:11:ACMP1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1289:11:ACMP2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1293:11:ACMP3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1297:11:ACMP4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1301:11:Reserved143_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1305:11:Reserved144_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1309:11:ENC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1313:11:ENC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1317:11:ENC3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1321:11:ENC4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1325:11:TMR1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1329:11:TMR2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1333:11:TMR3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1337:11:TMR4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1341:11:PWM2_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1345:11:PWM2_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1349:11:PWM2_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1353:11:PWM2_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1357:11:PWM2_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1361:11:PWM3_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1365:11:PWM3_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1369:11:PWM3_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1373:11:PWM3_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1377:11:PWM3_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1381:11:PWM4_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1385:11:PWM4_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1389:11:PWM4_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1393:11:PWM4_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1397:11:PWM4_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1401:11:ENET2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1405:11:ENET2_1588_Timer_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1409:11:CAN3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1413:11:Reserved171_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1417:11:FLEXIO3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1421:11:GPIO6_7_8_9_IRQHandler 8 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../startup/startup_mimxrt1062.c
C_DEPS += \
./startup/startup_mimxrt1062.d
OBJS += \
./startup/startup_mimxrt1062.o
# Each subdirectory must supply rules for building sources it contributes
startup/%.o: ../startup/%.c startup/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-startup
clean-startup:
-$(RM) ./startup/startup_mimxrt1062.d ./startup/startup_mimxrt1062.o
.PHONY: clean-startup

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/usr/local/mcuxpressoide-11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.linux_11.8.1.202308071233/tools/arm-none-eabi/include/assert.h:41:6:__assert_func 32 static

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../utilities/fsl_debug_console.c:424:10:DbgConsole_ReadOneCharacter 24 static
../utilities/fsl_debug_console.c:495:5:DbgConsole_SendData 24 static
../utilities/fsl_debug_console.c:548:5:DbgConsole_SendDataReliable 24 static
../utilities/fsl_debug_console.c:629:5:DbgConsole_ReadLine 24 static
../utilities/fsl_debug_console.c:695:5:DbgConsole_ReadCharacter 24 static
../utilities/fsl_debug_console.c:732:13:DbgConsole_PrintCallback 32 static
../utilities/fsl_debug_console.c:772:10:DbgConsole_Init 64 static
../utilities/fsl_debug_console.c:943:10:DbgConsole_EnterLowpower 16 static
../utilities/fsl_debug_console.c:954:10:DbgConsole_ExitLowpower 16 static
../utilities/fsl_debug_console.c:965:10:DbgConsole_Deinit 8 static
../utilities/fsl_debug_console.c:1008:40:DbgConsole_Flush 4 static
../utilities/fsl_debug_console.c:1047:5:DbgConsole_Printf 16 static
../utilities/fsl_debug_console.c:1060:5:DbgConsole_Vprintf 152 static
../utilities/fsl_debug_console.c:1076:5:DbgConsole_Putchar 16 static
../utilities/fsl_debug_console.c:1083:5:DbgConsole_Scanf 40 static
../utilities/fsl_debug_console.c:1102:5:DbgConsole_BlockingPrintf 16 static
../utilities/fsl_debug_console.c:1115:5:DbgConsole_BlockingVprintf 160 static
../utilities/fsl_debug_console.c:1184:5:DbgConsole_Getchar 16 static

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@ -0,0 +1,20 @@
../utilities/fsl_str.c:102:17:PrintGetWidth 24 static
../utilities/fsl_str.c:131:17:PrintGetPrecision 40 static
../utilities/fsl_str.c:188:17:PrintIsobpu 24 static
../utilities/fsl_str.c:198:17:PrintIsdi 24 static
../utilities/fsl_str.c:208:13:PrintOutputdifFobpu 32 static
../utilities/fsl_str.c:261:13:PrintOutputxX 32 static
../utilities/fsl_str.c:322:17:PrintIsfF 24 static
../utilities/fsl_str.c:332:17:PrintIsxX 24 static
../utilities/fsl_str.c:441:13:PrintFilterLengthFlag 24 static
../utilities/fsl_str.c:455:16:PrintGetRadixFromobpu 24 static
../utilities/fsl_str.c:478:17:ScanIsWhiteSpace 24 static
../utilities/fsl_str.c:488:17:ScanIgnoreWhiteSpace 24 static
../utilities/fsl_str.c:503:16:ConvertRadixNumToString 64 static
../utilities/fsl_str.c:768:5:StrFormatPrintf 144 static
../utilities/fsl_str.c:1060:16:StrFormatScanIsFormatStarting 24 static
../utilities/fsl_str.c:1079:16:StrFormatScanGetBase 16 static
../utilities/fsl_str.c:1102:16:StrFormatScanCheckSymbol 24 static
../utilities/fsl_str.c:1123:16:StrFormatScanFillInteger 24 static
../utilities/fsl_str.c:1224:16:StrFormatScanfStringHandling 40 static
../utilities/fsl_str.c:1393:5:StrFormatScanf 88 static

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@ -0,0 +1,37 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../utilities/fsl_assert.c \
../utilities/fsl_debug_console.c \
../utilities/fsl_str.c
C_DEPS += \
./utilities/fsl_assert.d \
./utilities/fsl_debug_console.d \
./utilities/fsl_str.d
OBJS += \
./utilities/fsl_assert.o \
./utilities/fsl_debug_console.o \
./utilities/fsl_str.o
# Each subdirectory must supply rules for building sources it contributes
utilities/%.o: ../utilities/%.c utilities/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-utilities
clean-utilities:
-$(RM) ./utilities/fsl_assert.d ./utilities/fsl_assert.o ./utilities/fsl_debug_console.d ./utilities/fsl_debug_console.o ./utilities/fsl_str.d ./utilities/fsl_str.o
.PHONY: clean-utilities

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@ -0,0 +1,34 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../xip/evkbmimxrt1060_flexspi_nor_config.c \
../xip/fsl_flexspi_nor_boot.c
C_DEPS += \
./xip/evkbmimxrt1060_flexspi_nor_config.d \
./xip/fsl_flexspi_nor_boot.d
OBJS += \
./xip/evkbmimxrt1060_flexspi_nor_config.o \
./xip/fsl_flexspi_nor_boot.o
# Each subdirectory must supply rules for building sources it contributes
xip/%.o: ../xip/%.c xip/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-xip
clean-xip:
-$(RM) ./xip/evkbmimxrt1060_flexspi_nor_config.d ./xip/evkbmimxrt1060_flexspi_nor_config.o ./xip/fsl_flexspi_nor_boot.d ./xip/fsl_flexspi_nor_boot.o
.PHONY: clean-xip

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:191:22:ARM_MPU_Enable 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/mpu_armv7.h:204:22:ARM_MPU_Disable 4 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1434:24:CLOCK_GetMux 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1485:24:CLOCK_GetDiv 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
../board/board.c:24:10:BOARD_DebugConsoleSrcFreq 24 static
../board/board.c:43:6:BOARD_InitDebugConsole 16 static
../board/board.c:248:6:BOARD_ConfigMPU 48 static

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@ -0,0 +1,13 @@
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1408:20:CLOCK_SetMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1460:20:CLOCK_SetDiv 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1663:20:CLOCK_SetXtalFreq 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1673:20:CLOCK_SetRtcXtalFreq 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1730:20:CLOCK_SetPllBypass 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1363:20:IOMUXC_SetSaiMClkClockSource 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1423:20:IOMUXC_MQSConfig 24 static
../board/clock_config.c:40:6:BOARD_InitBootClocks 8 static
../board/clock_config.c:178:6:BOARD_BootClockRUN 16 static
../board/clock_config.c:625:6:BOARD_BootClockRUN_528M 16 static

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../board/peripherals.c:186:13:TRNG_init 8 static
../board/peripherals.c:194:6:BOARD_InitPeripherals 8 static
../board/peripherals.c:203:6:BOARD_InitBootPeripherals 8 static

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1288:20:IOMUXC_SetPinMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1320:20:IOMUXC_SetPinConfig 24 static
../board/pin_mux.c:221:6:BOARD_InitBootPins 8 static
../board/pin_mux.c:241:6:BOARD_InitPins 4 static
../board/pin_mux.c:263:6:BOARD_InitDEBUG_UART 16 static
../board/pin_mux.c:326:6:BOARD_InitSDRAM 16 static
../board/pin_mux.c:402:6:BOARD_InitCSI 16 static
../board/pin_mux.c:464:6:BOARD_InitLCD 16 static
../board/pin_mux.c:532:6:BOARD_InitCAN 16 static
../board/pin_mux.c:564:6:BOARD_InitENET 16 static
../board/pin_mux.c:600:6:BOARD_InitUSDHC 16 static
../board/pin_mux.c:638:6:BOARD_InitHyperFlash 16 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../board/board.c \
../board/clock_config.c \
../board/dcd.c \
../board/peripherals.c \
../board/pin_mux.c
C_DEPS += \
./board/board.d \
./board/clock_config.d \
./board/dcd.d \
./board/peripherals.d \
./board/pin_mux.d
OBJS += \
./board/board.o \
./board/clock_config.o \
./board/dcd.o \
./board/peripherals.o \
./board/pin_mux.o
# Each subdirectory must supply rules for building sources it contributes
board/%.o: ../board/%.c board/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-board
clean-board:
-$(RM) ./board/board.d ./board/board.o ./board/clock_config.d ./board/clock_config.o ./board/dcd.d ./board/dcd.o ./board/peripherals.d ./board/peripherals.o ./board/pin_mux.d ./board/pin_mux.o
.PHONY: clean-board

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../component/lists/fsl_component_generic_list.c:32:22:LIST_Error_Check 24 static
../component/lists/fsl_component_generic_list.c:80:6:LIST_Init 16 static
../component/lists/fsl_component_generic_list.c:103:15:LIST_GetList 16 static
../component/lists/fsl_component_generic_list.c:124:15:LIST_AddTail 24 static
../component/lists/fsl_component_generic_list.c:170:15:LIST_AddHead 24 static
../component/lists/fsl_component_generic_list.c:216:23:LIST_RemoveHead 24 static
../component/lists/fsl_component_generic_list.c:264:23:LIST_GetHead 16 static
../component/lists/fsl_component_generic_list.c:284:23:LIST_GetNext 16 static
../component/lists/fsl_component_generic_list.c:304:23:LIST_GetPrev 16 static
../component/lists/fsl_component_generic_list.c:328:15:LIST_RemoveElement 32 static
../component/lists/fsl_component_generic_list.c:399:15:LIST_AddPrevElement 32 static
../component/lists/fsl_component_generic_list.c:471:10:LIST_GetSize 16 static
../component/lists/fsl_component_generic_list.c:490:10:LIST_GetAvailableSize 16 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/lists/fsl_component_generic_list.c
C_DEPS += \
./component/lists/fsl_component_generic_list.d
OBJS += \
./component/lists/fsl_component_generic_list.o
# Each subdirectory must supply rules for building sources it contributes
component/lists/%.o: ../component/lists/%.c component/lists/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-lists
clean-component-2f-lists:
-$(RM) ./component/lists/fsl_component_generic_list.d ./component/lists/fsl_component_generic_list.o
.PHONY: clean-component-2f-lists

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/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../component/serial_manager/fsl_component_serial_manager.c:422:32:SerialManager_StartWriting 32 static
../component/serial_manager/fsl_component_serial_manager.c:484:32:SerialManager_StartReading 32 static
../component/serial_manager/fsl_component_serial_manager.c:1233:32:SerialManager_Write 32 static
../component/serial_manager/fsl_component_serial_manager.c:1250:32:SerialManager_Read 32 static
../component/serial_manager/fsl_component_serial_manager.c:1268:25:SerialManager_Init 24 static
../component/serial_manager/fsl_component_serial_manager.c:1473:25:SerialManager_Deinit 24 static
../component/serial_manager/fsl_component_serial_manager.c:1552:25:SerialManager_OpenWriteHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1589:25:SerialManager_CloseWriteHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1620:25:SerialManager_OpenReadHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1660:25:SerialManager_CloseReadHandle 32 static
../component/serial_manager/fsl_component_serial_manager.c:1689:25:SerialManager_WriteBlocking 24 static
../component/serial_manager/fsl_component_serial_manager.c:1698:25:SerialManager_ReadBlocking 24 static
../component/serial_manager/fsl_component_serial_manager.c:1945:25:SerialManager_EnterLowpower 24 static
../component/serial_manager/fsl_component_serial_manager.c:2001:25:SerialManager_ExitLowpower 24 static
../component/serial_manager/fsl_component_serial_manager.c:2065:6:SerialManager_SetLowpowerCriticalCb 16 static

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../component/serial_manager/fsl_component_serial_port_uart.c:171:25:Serial_UartInit 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:211:25:Serial_UartDeinit 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:285:25:Serial_UartWrite 32 static
../component/serial_manager/fsl_component_serial_port_uart.c:299:25:Serial_UartRead 32 static
../component/serial_manager/fsl_component_serial_port_uart.c:396:25:Serial_UartEnterLowpower 24 static
../component/serial_manager/fsl_component_serial_port_uart.c:412:25:Serial_UartExitLowpower 32 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/serial_manager/fsl_component_serial_manager.c \
../component/serial_manager/fsl_component_serial_port_uart.c
C_DEPS += \
./component/serial_manager/fsl_component_serial_manager.d \
./component/serial_manager/fsl_component_serial_port_uart.d
OBJS += \
./component/serial_manager/fsl_component_serial_manager.o \
./component/serial_manager/fsl_component_serial_port_uart.o
# Each subdirectory must supply rules for building sources it contributes
component/serial_manager/%.o: ../component/serial_manager/%.c component/serial_manager/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-serial_manager
clean-component-2f-serial_manager:
-$(RM) ./component/serial_manager/fsl_component_serial_manager.d ./component/serial_manager/fsl_component_serial_manager.o ./component/serial_manager/fsl_component_serial_port_uart.d ./component/serial_manager/fsl_component_serial_port_uart.o
.PHONY: clean-component-2f-serial_manager

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../component/uart/fsl_adapter_lpuart.c:262:26:HAL_UartGetStatus 24 static
../component/uart/fsl_adapter_lpuart.c:642:26:HAL_UartInitCommon 48 static
../component/uart/fsl_adapter_lpuart.c:694:19:HAL_UartInit 24 static
../component/uart/fsl_adapter_lpuart.c:753:19:HAL_UartDeinit 24 static
../component/uart/fsl_adapter_lpuart.c:774:19:HAL_UartReceiveBlocking 32 static
../component/uart/fsl_adapter_lpuart.c:789:19:HAL_UartSendBlocking 32 static
../component/uart/fsl_adapter_lpuart.c:804:19:HAL_UartEnterLowpower 16 static
../component/uart/fsl_adapter_lpuart.c:811:19:HAL_UartExitLowpower 16 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../component/uart/fsl_adapter_lpuart.c
C_DEPS += \
./component/uart/fsl_adapter_lpuart.d
OBJS += \
./component/uart/fsl_adapter_lpuart.o
# Each subdirectory must supply rules for building sources it contributes
component/uart/%.o: ../component/uart/%.c component/uart/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-component-2f-uart
clean-component-2f-uart:
-$(RM) ./component/uart/fsl_adapter_lpuart.d ./component/uart/fsl_adapter_lpuart.o
.PHONY: clean-component-2f-uart

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@ -0,0 +1,31 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../device/system_MIMXRT1062.c
C_DEPS += \
./device/system_MIMXRT1062.d
OBJS += \
./device/system_MIMXRT1062.o
# Each subdirectory must supply rules for building sources it contributes
device/%.o: ../device/%.c device/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-device
clean-device:
-$(RM) ./device/system_MIMXRT1062.d ./device/system_MIMXRT1062.o
.PHONY: clean-device

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../device/system_MIMXRT1062.c:81:6:SystemInit 8 static
../device/system_MIMXRT1062.c:139:6:SystemCoreClockUpdate 48 static
../device/system_MIMXRT1062.c:244:29:SystemInitHook 4 static

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@ -0,0 +1,51 @@
../drivers/fsl_clock.h:1546:24:CLOCK_GetOscFreq 4 static
../drivers/fsl_clock.h:1653:24:CLOCK_GetRtcFreq 4 static
../drivers/fsl_clock.h:1751:20:CLOCK_IsPllBypassed 16 static
../drivers/fsl_clock.h:1765:20:CLOCK_IsPllEnabled 16 static
../drivers/fsl_clock.h:1791:24:CLOCK_GetPllBypassRefClk 16 static
../drivers/fsl_clock.c:86:17:CLOCK_GetPeriphClkFreq 16 static
../drivers/fsl_clock.c:152:17:CLOCK_GetPllUsb1SWFreq 16 static
../drivers/fsl_clock.c:190:6:CLOCK_InitExternalClk 16 static
../drivers/fsl_clock.c:214:6:CLOCK_DeinitExternalClk 4 static
../drivers/fsl_clock.c:226:6:CLOCK_SwitchOsc 16 static
../drivers/fsl_clock.c:241:6:CLOCK_InitRcOsc24M 4 static
../drivers/fsl_clock.c:249:6:CLOCK_DeinitRcOsc24M 4 static
../drivers/fsl_clock.c:259:10:CLOCK_GetAhbFreq 8 static
../drivers/fsl_clock.c:269:10:CLOCK_GetSemcFreq 16 static
../drivers/fsl_clock.c:303:10:CLOCK_GetIpgFreq 8 static
../drivers/fsl_clock.c:313:10:CLOCK_GetPerClkFreq 16 static
../drivers/fsl_clock.c:342:10:CLOCK_GetFreq 24 static
../drivers/fsl_clock.c:448:10:CLOCK_GetClockRootFreq 40 static
../drivers/fsl_clock.c:492:6:CLOCK_EnableUsbhs0Clock 24 static
../drivers/fsl_clock.c:519:6:CLOCK_EnableUsbhs1Clock 24 static
../drivers/fsl_clock.c:544:6:CLOCK_EnableUsbhs0PhyPllClock 16 static
../drivers/fsl_clock.c:568:6:CLOCK_DisableUsbhs0PhyPllClock 4 static
../drivers/fsl_clock.c:581:6:CLOCK_InitArmPll 16 static
../drivers/fsl_clock.c:602:6:CLOCK_DeinitArmPll 4 static
../drivers/fsl_clock.c:614:6:CLOCK_InitSysPll 16 static
../drivers/fsl_clock.c:644:6:CLOCK_DeinitSysPll 4 static
../drivers/fsl_clock.c:656:6:CLOCK_InitUsb1Pll 16 static
../drivers/fsl_clock.c:677:6:CLOCK_DeinitUsb1Pll 4 static
../drivers/fsl_clock.c:689:6:CLOCK_InitUsb2Pll 16 static
../drivers/fsl_clock.c:710:6:CLOCK_DeinitUsb2Pll 4 static
../drivers/fsl_clock.c:722:6:CLOCK_InitAudioPll 24 static
../drivers/fsl_clock.c:797:6:CLOCK_DeinitAudioPll 4 static
../drivers/fsl_clock.c:809:6:CLOCK_InitVideoPll 24 static
../drivers/fsl_clock.c:883:6:CLOCK_DeinitVideoPll 4 static
../drivers/fsl_clock.c:895:6:CLOCK_InitEnetPll 24 static
../drivers/fsl_clock.c:937:6:CLOCK_DeinitEnetPll 4 static
../drivers/fsl_clock.c:950:10:CLOCK_GetPllFreq 128 static
../drivers/fsl_clock.c:1174:6:CLOCK_InitSysPfd 24 static
../drivers/fsl_clock.c:1197:6:CLOCK_DeinitSysPfd 16 static
../drivers/fsl_clock.c:1210:6:CLOCK_IsSysPfdEnabled 16 static
../drivers/fsl_clock.c:1225:6:CLOCK_InitUsb1Pfd 24 static
../drivers/fsl_clock.c:1248:6:CLOCK_DeinitUsb1Pfd 16 static
../drivers/fsl_clock.c:1261:6:CLOCK_IsUsb1PfdEnabled 16 static
../drivers/fsl_clock.c:1274:10:CLOCK_GetSysPfdFreq 24 static
../drivers/fsl_clock.c:1313:10:CLOCK_GetUsb1PfdFreq 24 static
../drivers/fsl_clock.c:1353:6:CLOCK_EnableUsbhs1PhyPllClock 16 static
../drivers/fsl_clock.c:1371:6:CLOCK_DisableUsbhs1PhyPllClock 4 static
../drivers/fsl_clock.c:1383:6:CLOCK_SetClockOutput1 24 static
../drivers/fsl_clock.c:1407:6:CLOCK_SetClockOutput2 24 static
../drivers/fsl_clock.c:1431:10:CLOCK_GetClockOutCLKO1Freq 16 static
../drivers/fsl_clock.c:1492:10:CLOCK_GetClockOutClkO2Freq 16 static

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@ -0,0 +1,2 @@
../drivers/fsl_common.c:25:7:SDK_Malloc 32 static
../drivers/fsl_common.c:66:6:SDK_Free 24 static

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@ -0,0 +1,4 @@
../drivers/fsl_common_arm.c:121:6:MSDK_EnableCpuCycleCounter 8 static
../drivers/fsl_common_arm.c:139:10:MSDK_GetCpuCycleCount 4 static
../drivers/fsl_common_arm.c:175:13:DelayLoop 16 static
../drivers/fsl_common_arm.c:205:6:SDK_DelayAtLeastUs 48 static

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@ -0,0 +1,8 @@
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_gpio.h:242:20:GPIO_SetPinInterruptConfig 24 static
../drivers/fsl_gpio.c:47:17:GPIO_GetInstance 24 static
../drivers/fsl_gpio.c:75:6:GPIO_PinInit 32 static
../drivers/fsl_gpio.c:115:6:GPIO_PinWrite 24 static
../drivers/fsl_gpio.c:144:6:GPIO_PinSetInterruptConfig 32 static

View File

@ -0,0 +1,50 @@
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:1911:22:__NVIC_EnableIRQ 16 static
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
../drivers/fsl_common_arm.h:514:24:EnableIRQ 24 static
../drivers/fsl_common_arm.h:732:24:DisableGlobalIRQ 16 static
../drivers/fsl_common_arm.h:758:20:EnableGlobalIRQ 24 static
../drivers/fsl_lpuart.h:355:20:LPUART_SoftwareReset 16 static
../drivers/fsl_lpuart.c:159:10:LPUART_GetInstance 24 static
../drivers/fsl_lpuart.c:194:8:LPUART_TransferGetRxRingBufferLength 32 static
../drivers/fsl_lpuart.c:215:13:LPUART_TransferIsRxRingBufferFull 24 static
../drivers/fsl_lpuart.c:232:13:LPUART_WriteNonBlocking 32 static
../drivers/fsl_lpuart.c:246:13:LPUART_ReadNonBlocking 40 static
../drivers/fsl_lpuart.c:300:10:LPUART_Init 56 static
../drivers/fsl_lpuart.c:524:6:LPUART_Deinit 24 static
../drivers/fsl_lpuart.c:588:6:LPUART_GetDefaultConfig 16 static
../drivers/fsl_lpuart.c:633:10:LPUART_SetBaudRate 56 static
../drivers/fsl_lpuart.c:733:6:LPUART_Enable9bitMode 24 static
../drivers/fsl_lpuart.c:767:6:LPUART_SendAddress 24 static
../drivers/fsl_lpuart.c:789:6:LPUART_EnableInterrupts 24 static
../drivers/fsl_lpuart.c:831:6:LPUART_DisableInterrupts 24 static
../drivers/fsl_lpuart.c:879:10:LPUART_GetEnabledInterrupts 24 static
../drivers/fsl_lpuart.c:917:10:LPUART_GetStatusFlags 24 static
../drivers/fsl_lpuart.c:950:10:LPUART_ClearStatusFlags 24 static
../drivers/fsl_lpuart.c:1000:10:LPUART_WriteBlocking 32 static
../drivers/fsl_lpuart.c:1065:10:LPUART_ReadBlocking 48 static
../drivers/fsl_lpuart.c:1200:6:LPUART_TransferCreateHandle 40 static
../drivers/fsl_lpuart.c:1265:6:LPUART_TransferStartRingBuffer 32 static
../drivers/fsl_lpuart.c:1294:6:LPUART_TransferStopRingBuffer 24 static
../drivers/fsl_lpuart.c:1332:10:LPUART_TransferSendNonBlocking 32 static
../drivers/fsl_lpuart.c:1375:6:LPUART_TransferAbortSend 24 static
../drivers/fsl_lpuart.c:1400:10:LPUART_TransferGetSendCount 32 static
../drivers/fsl_lpuart.c:1458:10:LPUART_TransferReceiveNonBlocking 56 static
../drivers/fsl_lpuart.c:1597:6:LPUART_TransferAbortReceive 24 static
../drivers/fsl_lpuart.c:1628:10:LPUART_TransferGetReceiveCount 32 static
../drivers/fsl_lpuart.c:1648:13:LPUART_TransferHandleIDLEReady 32 static
../drivers/fsl_lpuart.c:1701:13:LPUART_TransferHandleReceiveDataFull 40 static
../drivers/fsl_lpuart.c:1814:13:LPUART_TransferHandleSendDataEmpty 24 static
../drivers/fsl_lpuart.c:1854:13:LPUART_TransferHandleTransmissionComplete 32 static
../drivers/fsl_lpuart.c:1882:6:LPUART_TransferHandleIRQ 40 static
../drivers/fsl_lpuart.c:1940:6:LPUART_TransferHandleErrorIRQ 16 static
../drivers/fsl_lpuart.c:2035:6:LPUART1_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2060:6:LPUART2_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2084:6:LPUART3_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2108:6:LPUART4_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2132:6:LPUART5_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2156:6:LPUART6_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2180:6:LPUART7_DriverIRQHandler 8 static
../drivers/fsl_lpuart.c:2204:6:LPUART8_DriverIRQHandler 8 static

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@ -0,0 +1,22 @@
../drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
../drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
../drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
../drivers/fsl_clock.h:1523:20:CLOCK_DisableClock 16 static
../drivers/fsl_trng.c:1287:17:trng_GetInstance 24 static
../drivers/fsl_trng.c:1349:10:TRNG_GetDefaultConfig 24 static
../drivers/fsl_trng.c:1414:17:trng_SetRetryCount 24 static
../drivers/fsl_trng.c:1436:17:trng_SetMonobitLimit 32 static
../drivers/fsl_trng.c:1461:17:trng_SetRunBit1Limit 32 static
../drivers/fsl_trng.c:1485:17:trng_SetRunBit2Limit 32 static
../drivers/fsl_trng.c:1509:17:trng_SetRunBit3Limit 32 static
../drivers/fsl_trng.c:1532:17:trng_SetRunBit4Limit 32 static
../drivers/fsl_trng.c:1557:17:trng_SetRunBit5Limit 32 static
../drivers/fsl_trng.c:1582:17:trng_SetRunBit6Limit 32 static
../drivers/fsl_trng.c:1607:17:trng_SetPokerMaxLimit 32 static
../drivers/fsl_trng.c:1632:17:trng_SetFrequencyCountMaxLimit 32 static
../drivers/fsl_trng.c:1657:17:trng_SetStatisticalCheckLimit 32 static
../drivers/fsl_trng.c:1730:17:trng_ApplyUserConfig 24 static
../drivers/fsl_trng.c:1821:17:trng_ReadEntropy 24 static
../drivers/fsl_trng.c:1851:10:TRNG_Init 24 static
../drivers/fsl_trng.c:1912:6:TRNG_Deinit 16 static
../drivers/fsl_trng.c:1947:10:TRNG_GetRandomData 64 static

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@ -0,0 +1,46 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../drivers/fsl_clock.c \
../drivers/fsl_common.c \
../drivers/fsl_common_arm.c \
../drivers/fsl_gpio.c \
../drivers/fsl_lpuart.c \
../drivers/fsl_trng.c
C_DEPS += \
./drivers/fsl_clock.d \
./drivers/fsl_common.d \
./drivers/fsl_common_arm.d \
./drivers/fsl_gpio.d \
./drivers/fsl_lpuart.d \
./drivers/fsl_trng.d
OBJS += \
./drivers/fsl_clock.o \
./drivers/fsl_common.o \
./drivers/fsl_common_arm.o \
./drivers/fsl_gpio.o \
./drivers/fsl_lpuart.o \
./drivers/fsl_trng.o
# Each subdirectory must supply rules for building sources it contributes
drivers/%.o: ../drivers/%.c drivers/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-drivers
clean-drivers:
-$(RM) ./drivers/fsl_clock.d ./drivers/fsl_clock.o ./drivers/fsl_common.d ./drivers/fsl_common.o ./drivers/fsl_common_arm.d ./drivers/fsl_common_arm.o ./drivers/fsl_gpio.d ./drivers/fsl_gpio.o ./drivers/fsl_lpuart.d ./drivers/fsl_lpuart.o ./drivers/fsl_trng.d ./drivers/fsl_trng.o
.PHONY: clean-drivers

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@ -0,0 +1,69 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
-include ../makefile.init
RM := rm -rf
# All of the sources participating in the build are defined here
-include sources.mk
-include xip/subdir.mk
-include utilities/subdir.mk
-include startup/subdir.mk
-include source/subdir.mk
-include drivers/subdir.mk
-include device/subdir.mk
-include component/uart/subdir.mk
-include component/serial_manager/subdir.mk
-include component/lists/subdir.mk
-include board/subdir.mk
ifneq ($(MAKECMDGOALS),clean)
ifneq ($(strip $(C_DEPS)),)
-include $(C_DEPS)
endif
endif
-include ../makefile.defs
OPTIONAL_TOOL_DEPS := \
$(wildcard ../makefile.defs) \
$(wildcard ../makefile.init) \
$(wildcard ../makefile.targets) \
BUILD_ARTIFACT_NAME := rt1060-evk-xpresso-baremetal-builtin
BUILD_ARTIFACT_EXTENSION := axf
BUILD_ARTIFACT_PREFIX :=
BUILD_ARTIFACT := $(BUILD_ARTIFACT_PREFIX)$(BUILD_ARTIFACT_NAME)$(if $(BUILD_ARTIFACT_EXTENSION),.$(BUILD_ARTIFACT_EXTENSION),)
# Add inputs and outputs from these tool invocations to the build variables
# All Target
all:
+@$(MAKE) --no-print-directory main-build && $(MAKE) --no-print-directory post-build
# Main-build Target
main-build: rt1060-evk-xpresso-baremetal-builtin.axf
# Tool invocations
rt1060-evk-xpresso-baremetal-builtin.axf: $(OBJS) $(USER_OBJS) makefile $(OPTIONAL_TOOL_DEPS)
@echo 'Building target: $@'
@echo 'Invoking: MCU Linker'
arm-none-eabi-gcc -nostdlib -Xlinker -Map="rt1060-evk-xpresso-baremetal-builtin.map" -Xlinker --gc-sections -Xlinker -print-memory-usage -Xlinker --sort-section=alignment -Xlinker --cref -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -T rt1060-evk-xpresso-baremetal-builtin_Debug.ld -o "rt1060-evk-xpresso-baremetal-builtin.axf" $(OBJS) $(USER_OBJS) $(LIBS)
@echo 'Finished building target: $@'
@echo ' '
# Other Targets
clean:
-$(RM) rt1060-evk-xpresso-baremetal-builtin.axf
-@echo ' '
post-build:
-@echo 'Performing post-build steps'
-arm-none-eabi-size "rt1060-evk-xpresso-baremetal-builtin.axf" ; arm-none-eabi-objcopy -v -O binary "rt1060-evk-xpresso-baremetal-builtin.axf" "rt1060-evk-xpresso-baremetal-builtin.bin" ; # checksum -p MIMXRT1062xxxxB -d "rt1060-evk-xpresso-baremetal-builtin.bin"
-@echo ' '
.PHONY: all clean dependents main-build post-build
-include ../makefile.targets

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@ -0,0 +1,422 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from linkscript.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 8:59:47 PM
*/
INCLUDE "rt1060-evk-xpresso-baremetal-builtin_Debug_library.ld"
INCLUDE "rt1060-evk-xpresso-baremetal-builtin_Debug_memory.ld"
ENTRY(ResetISR)
SECTIONS
{
/* Image Vector Table and Boot Data for booting from external flash */
.boot_hdr : ALIGN(4)
{
FILL(0xff)
__boot_hdr_start__ = ABSOLUTE(.) ;
KEEP(*(.boot_hdr.conf))
. = 0x1000 ;
KEEP(*(.boot_hdr.ivt))
. = 0x1020 ;
KEEP(*(.boot_hdr.boot_data))
. = 0x1030 ;
KEEP(*(.boot_hdr.dcd_data))
__boot_hdr_end__ = ABSOLUTE(.) ;
. = 0x2000 ;
} >BOARD_FLASH
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
__vectors_start__ = ABSOLUTE(.) ;
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data));
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2));
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3));
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4));
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5));
LONG( SIZEOF(.data_RAM5));
LONG(LOADADDR(.data_RAM6));
LONG( ADDR(.data_RAM6));
LONG( SIZEOF(.data_RAM6));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
LONG( ADDR(.bss_RAM6));
LONG( SIZEOF(.bss_RAM6));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.* .constdata .constdata.*)
. = ALIGN(4);
} > BOARD_FLASH
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
*/
.ARM.extab : ALIGN(4)
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} > BOARD_FLASH
.ARM.exidx : ALIGN(4)
{
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
} > BOARD_FLASH
_etext = .;
/* DATA section for SRAM_ITC */
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM2 = .) ;
PROVIDE(__start_data_SRAM_ITC = .) ;
*(.ramfunc.$RAM2)
*(.ramfunc.$SRAM_ITC)
*(.data.$RAM2)
*(.data.$SRAM_ITC)
*(.data.$RAM2.*)
*(.data.$SRAM_ITC.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM2 = .) ;
PROVIDE(__end_data_SRAM_ITC = .) ;
} > SRAM_ITC AT>BOARD_FLASH
/* DATA section for SRAM_OC2 */
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM3 = .) ;
PROVIDE(__start_data_SRAM_OC2 = .) ;
*(.ramfunc.$RAM3)
*(.ramfunc.$SRAM_OC2)
*(.data.$RAM3)
*(.data.$SRAM_OC2)
*(.data.$RAM3.*)
*(.data.$SRAM_OC2.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM3 = .) ;
PROVIDE(__end_data_SRAM_OC2 = .) ;
} > SRAM_OC2 AT>BOARD_FLASH
/* DATA section for SRAM_OC */
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM4 = .) ;
PROVIDE(__start_data_SRAM_OC = .) ;
*(.ramfunc.$RAM4)
*(.ramfunc.$SRAM_OC)
*(.data.$RAM4)
*(.data.$SRAM_OC)
*(.data.$RAM4.*)
*(.data.$SRAM_OC.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM4 = .) ;
PROVIDE(__end_data_SRAM_OC = .) ;
} > SRAM_OC AT>BOARD_FLASH
/* DATA section for BOARD_SDRAM */
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM5 = .) ;
PROVIDE(__start_data_BOARD_SDRAM = .) ;
*(.ramfunc.$RAM5)
*(.ramfunc.$BOARD_SDRAM)
*(.data.$RAM5)
*(.data.$BOARD_SDRAM)
*(.data.$RAM5.*)
*(.data.$BOARD_SDRAM.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM5 = .) ;
PROVIDE(__end_data_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT>BOARD_FLASH
/* DATA section for NCACHE_REGION */
.data_RAM6 : ALIGN(4)
{
FILL(0xff)
PROVIDE(__start_data_RAM6 = .) ;
PROVIDE(__start_data_NCACHE_REGION = .) ;
*(.ramfunc.$RAM6)
*(.ramfunc.$NCACHE_REGION)
*(.data.$RAM6)
*(.data.$NCACHE_REGION)
*(.data.$RAM6.*)
*(.data.$NCACHE_REGION.*)
. = ALIGN(4) ;
PROVIDE(__end_data_RAM6 = .) ;
PROVIDE(__end_data_NCACHE_REGION = .) ;
} > NCACHE_REGION AT>BOARD_FLASH
/* MAIN DATA SECTION */
.uninit_RESERVED (NOLOAD) : ALIGN(4)
{
_start_uninit_RESERVED = .;
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > SRAM_DTC AT> SRAM_DTC
/* Main DATA section (SRAM_DTC) */
.data : ALIGN(4)
{
FILL(0xff)
_data = . ;
PROVIDE(__start_data_RAM = .) ;
PROVIDE(__start_data_SRAM_DTC = .) ;
*(vtable)
*(.ramfunc*)
KEEP(*(CodeQuickAccess))
KEEP(*(DataQuickAccess))
*(RamFunction)
*(.data*)
. = ALIGN(4) ;
_edata = . ;
PROVIDE(__end_data_RAM = .) ;
PROVIDE(__end_data_SRAM_DTC = .) ;
} > SRAM_DTC AT>BOARD_FLASH
/* BSS section for SRAM_ITC */
.bss_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM2 = .) ;
PROVIDE(__start_bss_SRAM_ITC = .) ;
*(.bss.$RAM2)
*(.bss.$SRAM_ITC)
*(.bss.$RAM2.*)
*(.bss.$SRAM_ITC.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM2 = .) ;
PROVIDE(__end_bss_SRAM_ITC = .) ;
} > SRAM_ITC AT> SRAM_ITC
/* BSS section for SRAM_OC2 */
.bss_RAM3 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM3 = .) ;
PROVIDE(__start_bss_SRAM_OC2 = .) ;
*(.bss.$RAM3)
*(.bss.$SRAM_OC2)
*(.bss.$RAM3.*)
*(.bss.$SRAM_OC2.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM3 = .) ;
PROVIDE(__end_bss_SRAM_OC2 = .) ;
} > SRAM_OC2 AT> SRAM_OC2
/* BSS section for SRAM_OC */
.bss_RAM4 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM4 = .) ;
PROVIDE(__start_bss_SRAM_OC = .) ;
*(.bss.$RAM4)
*(.bss.$SRAM_OC)
*(.bss.$RAM4.*)
*(.bss.$SRAM_OC.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM4 = .) ;
PROVIDE(__end_bss_SRAM_OC = .) ;
} > SRAM_OC AT> SRAM_OC
/* BSS section for BOARD_SDRAM */
.bss_RAM5 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM5 = .) ;
PROVIDE(__start_bss_BOARD_SDRAM = .) ;
*(.bss.$RAM5)
*(.bss.$BOARD_SDRAM)
*(.bss.$RAM5.*)
*(.bss.$BOARD_SDRAM.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM5 = .) ;
PROVIDE(__end_bss_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT> BOARD_SDRAM
/* BSS section for NCACHE_REGION */
.bss_RAM6 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_bss_RAM6 = .) ;
PROVIDE(__start_bss_NCACHE_REGION = .) ;
*(.bss.$RAM6)
*(.bss.$NCACHE_REGION)
*(.bss.$RAM6.*)
*(.bss.$NCACHE_REGION.*)
. = ALIGN (. != 0 ? 4 : 1) ; /* avoid empty segment */
PROVIDE(__end_bss_RAM6 = .) ;
PROVIDE(__end_bss_NCACHE_REGION = .) ;
} > NCACHE_REGION AT> NCACHE_REGION
/* MAIN BSS SECTION */
.bss (NOLOAD) : ALIGN(4)
{
_bss = .;
PROVIDE(__start_bss_RAM = .) ;
PROVIDE(__start_bss_SRAM_DTC = .) ;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(__end_bss_RAM = .) ;
PROVIDE(__end_bss_SRAM_DTC = .) ;
PROVIDE(end = .);
} > SRAM_DTC AT> SRAM_DTC
/* NOINIT section for SRAM_ITC */
.noinit_RAM2 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM2 = .) ;
PROVIDE(__start_noinit_SRAM_ITC = .) ;
*(.noinit.$RAM2)
*(.noinit.$SRAM_ITC)
*(.noinit.$RAM2.*)
*(.noinit.$SRAM_ITC.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM2 = .) ;
PROVIDE(__end_noinit_SRAM_ITC = .) ;
} > SRAM_ITC AT> SRAM_ITC
/* NOINIT section for SRAM_OC2 */
.noinit_RAM3 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM3 = .) ;
PROVIDE(__start_noinit_SRAM_OC2 = .) ;
*(.noinit.$RAM3)
*(.noinit.$SRAM_OC2)
*(.noinit.$RAM3.*)
*(.noinit.$SRAM_OC2.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM3 = .) ;
PROVIDE(__end_noinit_SRAM_OC2 = .) ;
} > SRAM_OC2 AT> SRAM_OC2
/* NOINIT section for SRAM_OC */
.noinit_RAM4 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM4 = .) ;
PROVIDE(__start_noinit_SRAM_OC = .) ;
*(.noinit.$RAM4)
*(.noinit.$SRAM_OC)
*(.noinit.$RAM4.*)
*(.noinit.$SRAM_OC.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM4 = .) ;
PROVIDE(__end_noinit_SRAM_OC = .) ;
} > SRAM_OC AT> SRAM_OC
/* NOINIT section for BOARD_SDRAM */
.noinit_RAM5 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM5 = .) ;
PROVIDE(__start_noinit_BOARD_SDRAM = .) ;
*(.noinit.$RAM5)
*(.noinit.$BOARD_SDRAM)
*(.noinit.$RAM5.*)
*(.noinit.$BOARD_SDRAM.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM5 = .) ;
PROVIDE(__end_noinit_BOARD_SDRAM = .) ;
} > BOARD_SDRAM AT> BOARD_SDRAM
/* NOINIT section for NCACHE_REGION */
.noinit_RAM6 (NOLOAD) : ALIGN(4)
{
PROVIDE(__start_noinit_RAM6 = .) ;
PROVIDE(__start_noinit_NCACHE_REGION = .) ;
*(.noinit.$RAM6)
*(.noinit.$NCACHE_REGION)
*(.noinit.$RAM6.*)
*(.noinit.$NCACHE_REGION.*)
. = ALIGN(4) ;
PROVIDE(__end_noinit_RAM6 = .) ;
PROVIDE(__end_noinit_NCACHE_REGION = .) ;
} > NCACHE_REGION AT> NCACHE_REGION
/* DEFAULT NOINIT SECTION */
.noinit (NOLOAD): ALIGN(4)
{
_noinit = .;
PROVIDE(__start_noinit_RAM = .) ;
PROVIDE(__start_noinit_SRAM_DTC = .) ;
*(.noinit*)
. = ALIGN(4) ;
_end_noinit = .;
PROVIDE(__end_noinit_RAM = .) ;
PROVIDE(__end_noinit_SRAM_DTC = .) ;
} > SRAM_DTC AT> SRAM_DTC
/* Reserve and place Heap within memory map */
_HeapSize = 0x1000;
.heap (NOLOAD) : ALIGN(4)
{
_pvHeapStart = .;
. += _HeapSize;
. = ALIGN(4);
_pvHeapLimit = .;
} > SRAM_DTC
_StackSize = 0x1000;
/* Reserve space in memory for Stack */
.heap2stackfill (NOLOAD) :
{
. += _StackSize;
} > SRAM_DTC
/* Locate actual Stack in memory map */
.stack ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - _StackSize - 0 (NOLOAD) : ALIGN(4)
{
_vStackBase = .;
. = ALIGN(4);
_vStackTop = . + _StackSize;
} > SRAM_DTC
/* Provide basic symbols giving location and size of main text
* block, including initial values of RW data sections. Note that
* these will need extending to give a complete picture with
* complex images (e.g multiple Flash banks).
*/
_image_start = LOADADDR(.text);
_image_end = LOADADDR(.data) + SIZEOF(.data);
_image_size = _image_end - _image_start;
}

View File

@ -0,0 +1,16 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from library.ldt by FMCreateLinkLibraries
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 8:59:47 PM
*/
GROUP (
"libgcc.a"
"libc_nano.a"
"libm.a"
"libcr_newlib_nohost.a"
)

View File

@ -0,0 +1,51 @@
/*
* GENERATED FILE - DO NOT EDIT
* Copyright 2008-2013 Code Red Technologies Ltd,
* Copyright 2013-2024 NXP
* Generated linker script file for MIMXRT1062xxxxB
* Created from memory.ldt by FMCreateLinkMemory
* Using Freemarker v2.3.30
* MCUXpresso IDE v11.8.1 [Build 1197] [2023-10-27] on Jan 5, 2024, 8:59:47 PM
*/
MEMORY
{
/* Define each memory region */
BOARD_FLASH (rx) : ORIGIN = 0x60000000, LENGTH = 0x800000 /* 8M bytes (alias Flash) */
SRAM_DTC (rwx) : ORIGIN = 0x20000000, LENGTH = 0x20000 /* 128K bytes (alias RAM) */
SRAM_ITC (rwx) : ORIGIN = 0x0, LENGTH = 0x20000 /* 128K bytes (alias RAM2) */
SRAM_OC2 (rwx) : ORIGIN = 0x20200000, LENGTH = 0x80000 /* 512K bytes (alias RAM3) */
SRAM_OC (rwx) : ORIGIN = 0x20280000, LENGTH = 0x40000 /* 256K bytes (alias RAM4) */
BOARD_SDRAM (rwx) : ORIGIN = 0x80000000, LENGTH = 0x1e00000 /* 30M bytes (alias RAM5) */
NCACHE_REGION (rwx) : ORIGIN = 0x81e00000, LENGTH = 0x200000 /* 2M bytes (alias RAM6) */
}
/* Define a symbol for the top of each memory region */
__base_BOARD_FLASH = 0x60000000 ; /* BOARD_FLASH */
__base_Flash = 0x60000000 ; /* Flash */
__top_BOARD_FLASH = 0x60000000 + 0x800000 ; /* 8M bytes */
__top_Flash = 0x60000000 + 0x800000 ; /* 8M bytes */
__base_SRAM_DTC = 0x20000000 ; /* SRAM_DTC */
__base_RAM = 0x20000000 ; /* RAM */
__top_SRAM_DTC = 0x20000000 + 0x20000 ; /* 128K bytes */
__top_RAM = 0x20000000 + 0x20000 ; /* 128K bytes */
__base_SRAM_ITC = 0x0 ; /* SRAM_ITC */
__base_RAM2 = 0x0 ; /* RAM2 */
__top_SRAM_ITC = 0x0 + 0x20000 ; /* 128K bytes */
__top_RAM2 = 0x0 + 0x20000 ; /* 128K bytes */
__base_SRAM_OC2 = 0x20200000 ; /* SRAM_OC2 */
__base_RAM3 = 0x20200000 ; /* RAM3 */
__top_SRAM_OC2 = 0x20200000 + 0x80000 ; /* 512K bytes */
__top_RAM3 = 0x20200000 + 0x80000 ; /* 512K bytes */
__base_SRAM_OC = 0x20280000 ; /* SRAM_OC */
__base_RAM4 = 0x20280000 ; /* RAM4 */
__top_SRAM_OC = 0x20280000 + 0x40000 ; /* 256K bytes */
__top_RAM4 = 0x20280000 + 0x40000 ; /* 256K bytes */
__base_BOARD_SDRAM = 0x80000000 ; /* BOARD_SDRAM */
__base_RAM5 = 0x80000000 ; /* RAM5 */
__top_BOARD_SDRAM = 0x80000000 + 0x1e00000 ; /* 30M bytes */
__top_RAM5 = 0x80000000 + 0x1e00000 ; /* 30M bytes */
__base_NCACHE_REGION = 0x81e00000 ; /* NCACHE_REGION */
__base_RAM6 = 0x81e00000 ; /* RAM6 */
__top_NCACHE_REGION = 0x81e00000 + 0x200000 ; /* 2M bytes */
__top_RAM6 = 0x81e00000 + 0x200000 ; /* 2M bytes */

View File

@ -0,0 +1,17 @@
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:1911:22:__NVIC_EnableIRQ 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:2041:22:__NVIC_SetPriority 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS/core_cm7.h:2259:26:SysTick_Config 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_common_arm.h:210:20:_SDK_AtomicLocalClearAndSet4Byte 48 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1496:20:CLOCK_ControlGate 32 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_clock.h:1513:20:CLOCK_EnableClock 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_gpio.h:176:24:GPIO_PinRead 16 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1288:20:IOMUXC_SetPinMux 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1320:20:IOMUXC_SetPinConfig 24 static
/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers/fsl_iomuxc.h:1340:20:IOMUXC_EnableMode 24 static
../source/hal.h:16:20:ethernet_init 24 static
../source/hal.h:60:20:test_init 24 static
../source/main.c:28:6:SysTick_Handler 4 static
../source/main.c:32:10:mg_millis 4 static
../source/main.c:36:6:mg_random 16 static
../source/main.c:40:13:timer_fn 64 static
../source/main.c:52:5:main 224 static

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../source/mongoose.c:5626:14:mg_ota_boot 4 static
../source/mongoose.c:27:12:mg_base64_encode_single 16 static
../source/mongoose.c:39:12:mg_base64_decode_single 16 static
../source/mongoose.c:57:8:mg_base64_update 32 static
../source/mongoose.c:73:8:mg_base64_final 24 static
../source/mongoose.c:84:8:mg_base64_encode 32 static
../source/mongoose.c:93:8:mg_base64_decode 48 static
../source/mongoose.c:207:7:mg_flash_start 4 static
../source/mongoose.c:210:8:mg_flash_size 4 static
../source/mongoose.c:213:8:mg_flash_sector_size 4 static
../source/mongoose.c:216:8:mg_flash_write_align 4 static
../source/mongoose.c:219:5:mg_flash_bank 4 static
../source/mongoose.c:222:6:mg_flash_erase 16 static
../source/mongoose.c:226:6:mg_flash_swap_bank 4 static
../source/mongoose.c:229:6:mg_flash_write 24 static
../source/mongoose.c:233:6:mg_device_reset 4 static
../source/mongoose.c:402:6:mg_flash_save 24 static
../source/mongoose.c:406:6:mg_flash_load 24 static
../source/mongoose.c:737:13:mg_dns_free 24 static
../source/mongoose.c:742:6:mg_resolve_cancel 32 static
../source/mongoose.c:751:15:mg_dns_parse_name_depth 56 static
../source/mongoose.c:788:15:mg_dns_parse_name 40 static
../source/mongoose.c:793:8:mg_dns_parse_rr 40 static
../source/mongoose.c:817:6:mg_dns_parse 56 static
../source/mongoose.c:855:13:dns_cb 344 static
../source/mongoose.c:913:13:mg_dns_send 312 static
../source/mongoose.c:940:13:mg_sendnsreq 56 static
../source/mongoose.c:972:6:mg_resolve 40 static
../source/mongoose.c:994:6:mg_call 32 static
../source/mongoose.c:1013:6:mg_error 92 static
../source/mongoose.c:1031:13:is_digit 16 static
../source/mongoose.c:1035:12:addexp 32 static
../source/mongoose.c:1047:12:xisinf 24 static
../source/mongoose.c:1056:12:xisnan 24 static
../source/mongoose.c:1066:15:mg_dtoa 136 static
../source/mongoose.c:1125:15:mg_lld 64 static
../source/mongoose.c:1147:15:scpy 32 static
../source/mongoose.c:1154:8:mg_xprintf 24 static
../source/mongoose.c:1163:8:mg_vxprintf 176 static
../source/mongoose.c:1257:15:mg_fs_open 32 static
../source/mongoose.c:1270:6:mg_fs_close 16 static
../source/mongoose.c:1277:7:mg_file_read 40 static
../source/mongoose.c:1298:6:mg_file_write 144 static
../source/mongoose.c:1317:6:mg_file_printf 32 static
../source/mongoose.c:1487:15:mg_unpacked 24 static
../source/mongoose.c:1493:12:is_dir_prefix 24 static
../source/mongoose.c:1499:12:packed_stat 40 static
../source/mongoose.c:1510:13:packed_list 256 static
../source/mongoose.c:1531:14:packed_open 32 static
../source/mongoose.c:1544:13:packed_close 16 static
../source/mongoose.c:1548:15:packed_read 32 static
../source/mongoose.c:1556:15:packed_write 24 static
../source/mongoose.c:1561:15:packed_seek 24 static
../source/mongoose.c:1568:13:packed_rename 16 static
../source/mongoose.c:1573:13:packed_remove 16 static
../source/mongoose.c:1578:13:packed_mkdir 16 static
../source/mongoose.c:1602:12:p_stat 112 static
../source/mongoose.c:1743:13:p_list 24 static
../source/mongoose.c:1759:14:p_open 24 static
../source/mongoose.c:1772:13:p_close 16 static
../source/mongoose.c:1776:15:p_read 24 static
../source/mongoose.c:1780:15:p_write 24 static
../source/mongoose.c:1784:15:p_seek 16 static
../source/mongoose.c:1795:13:p_rename 16 static
../source/mongoose.c:1799:13:p_remove 16 static
../source/mongoose.c:1803:13:p_mkdir 16 static
../source/mongoose.c:1870:6:mg_to_size_t 48 static
../source/mongoose.c:1904:8:mg_http_next_multipart 112 static
../source/mongoose.c:1944:6:mg_http_bauth 56 static
../source/mongoose.c:1970:15:mg_http_var 48 static
../source/mongoose.c:1981:5:mg_http_get_var 56 static
../source/mongoose.c:2001:13:isx 16 static
../source/mongoose.c:2006:5:mg_url_decode 32 static
../source/mongoose.c:2028:13:isok 16 static
../source/mongoose.c:2032:5:mg_http_get_request_len 24 static
../source/mongoose.c:2042:16:mg_http_get_header 40 static
../source/mongoose.c:2052:13:vcb 16 static
../source/mongoose.c:2057:15:clen 32 static
../source/mongoose.c:2069:20:skiptorn 24 static
../source/mongoose.c:2078:13:mg_http_parse_headers 48 static
../source/mongoose.c:2100:5:mg_http_parse 48 static
../source/mongoose.c:2173:13:mg_http_vprintf_chunk 32 static
../source/mongoose.c:2186:6:mg_http_printf_chunk 28 static
../source/mongoose.c:2193:6:mg_http_write_chunk 24 static
../source/mongoose.c:2201:20:mg_http_status_code_str 16 static
../source/mongoose.c:2271:6:mg_http_reply 52 static
../source/mongoose.c:2290:13:restore_http_cb 16 static
../source/mongoose.c:2298:7:mg_http_etag 48 static
../source/mongoose.c:2303:13:static_cb 48 static
../source/mongoose.c:2362:22:guess_content_type 64 static
../source/mongoose.c:2384:12:getrange 48 static
../source/mongoose.c:2400:6:mg_http_serve_file 480 static
../source/mongoose.c:2606:12:uri_to_path2 56 static
../source/mongoose.c:2665:12:uri_to_path 112 static
../source/mongoose.c:2679:6:mg_http_serve_dir 152 static
../source/mongoose.c:2700:13:mg_is_url_safe 16 static
../source/mongoose.c:2705:8:mg_url_encode 40 static
../source/mongoose.c:2723:6:mg_http_creds 328 static
../source/mongoose.c:2745:22:stripquotes 24 static
../source/mongoose.c:2751:15:mg_http_get_header_var 56 static
../source/mongoose.c:2768:6:mg_http_match_uri 32 static
../source/mongoose.c:2772:6:mg_http_upload 72 static
../source/mongoose.c:2808:5:mg_http_status 16 static
../source/mongoose.c:2812:13:is_hex_digit 16 static
../source/mongoose.c:2817:12:skip_chunk 32 static
../source/mongoose.c:2831:13:http_cb 616 static
../source/mongoose.c:2896:13:mg_hfn 40 static
../source/mongoose.c:2915:6:mg_hello 96 static
../source/mongoose.c:2924:23:mg_http_connect 32 static
../source/mongoose.c:2931:23:mg_http_listen 32 static
../source/mongoose.c:2946:15:roundup 16 static
../source/mongoose.c:2950:5:mg_iobuf_resize 56 static
../source/mongoose.c:2977:5:mg_iobuf_init 24 static
../source/mongoose.c:2984:8:mg_iobuf_add 32 static
../source/mongoose.c:2996:8:mg_iobuf_del 24 static
../source/mongoose.c:3005:6:mg_iobuf_free 16 static
../source/mongoose.c:3016:20:escapeseq 16 static
../source/mongoose.c:3020:13:json_esc 32 static
../source/mongoose.c:3028:12:mg_pass_string 24 static
../source/mongoose.c:3042:15:mg_atod 72 static
../source/mongoose.c:3089:8:mg_json_next 64 static
../source/mongoose.c:3137:5:mg_json_get 120 static
../source/mongoose.c:3280:6:mg_json_get_num 48 static
../source/mongoose.c:3290:6:mg_json_get_bool 40 static
../source/mongoose.c:3299:6:mg_json_unescape 48 static
../source/mongoose.c:3324:7:mg_json_get_str 48 static
../source/mongoose.c:3338:7:mg_json_get_b64 48 static
../source/mongoose.c:3350:7:mg_json_get_hex 48 static
../source/mongoose.c:3362:6:mg_json_get_long 48 static
../source/mongoose.c:3381:6:mg_log_set_fn 16 static
../source/mongoose.c:3386:13:logc 16 static
../source/mongoose.c:3390:13:logs 24 static
../source/mongoose.c:3398:6:mg_log_prefix 112 static
../source/mongoose.c:3410:6:mg_log 16 static
../source/mongoose.c:3419:22:nibble 16 static
../source/mongoose.c:3424:6:mg_hexdump 48 static
../source/mongoose.c:3467:13:mg_byte_reverse 24 static
../source/mongoose.c:3492:6:mg_md5_init 16 static
../source/mongoose.c:3502:13:mg_md5_transform 32 static
../source/mongoose.c:3584:6:mg_md5_update 32 static
../source/mongoose.c:3619:6:mg_md5_final 32 static
../source/mongoose.c:3701:6:mg_mqtt_send_header 40 static
../source/mongoose.c:3714:13:mg_send_u16 16 static
../source/mongoose.c:3718:13:mg_send_u32 16 static
../source/mongoose.c:3722:16:varint_size 24 static
../source/mongoose.c:3731:15:encode_varint 24 static
../source/mongoose.c:3744:15:decode_varint 40 static
../source/mongoose.c:3759:12:mqtt_prop_type_by_id 24 static
../source/mongoose.c:3769:15:get_properties_length 24 static
../source/mongoose.c:3806:15:get_props_size 24 static
../source/mongoose.c:3812:13:mg_send_mqtt_properties 48 static
../source/mongoose.c:3854:8:mg_mqtt_next_prop 40 static
../source/mongoose.c:3908:6:mg_mqtt_login 72 static
../source/mongoose.c:3974:6:mg_mqtt_pub 40 static
../source/mongoose.c:3996:6:mg_mqtt_sub 32 static
../source/mongoose.c:4011:5:mg_mqtt_parse 48 static
../source/mongoose.c:4081:13:mqtt_cb 112 static
../source/mongoose.c:4153:6:mg_mqtt_ping 16 static
../source/mongoose.c:4157:6:mg_mqtt_pong 16 static
../source/mongoose.c:4161:6:mg_mqtt_disconnect 24 static
../source/mongoose.c:4174:23:mg_mqtt_connect 96 static
../source/mongoose.c:4187:23:mg_mqtt_listen 32 static
../source/mongoose.c:4206:8:mg_vprintf 32 static
../source/mongoose.c:4212:8:mg_printf 28 static
../source/mongoose.c:4221:13:mg_atonl 32 static
../source/mongoose.c:4229:13:mg_atone 24 static
../source/mongoose.c:4236:13:mg_aton4 40 static
../source/mongoose.c:4257:13:mg_v4mapped 40 static
../source/mongoose.c:4275:13:mg_aton6 48 static
../source/mongoose.c:4320:6:mg_aton 24 static
../source/mongoose.c:4326:23:mg_alloc_conn 24 static
../source/mongoose.c:4338:6:mg_close_conn 24 static
../source/mongoose.c:4358:23:mg_connect 32 static
../source/mongoose.c:4379:23:mg_listen 32 static
../source/mongoose.c:4402:23:mg_wrapfd 32 static
../source/mongoose.c:4416:18:mg_timer_add 48 static
../source/mongoose.c:4426:6:mg_io_recv 24 static
../source/mongoose.c:4434:6:mg_mgr_free 32 static
../source/mongoose.c:4451:6:mg_mgr_init 16 static
../source/mongoose.c:4619:13:mkpay 32 static
../source/mongoose.c:4624:17:csumup 32 static
../source/mongoose.c:4630:17:csumfin 16 static
../source/mongoose.c:4635:17:ipcsum 24 static
../source/mongoose.c:4640:13:settmout 56 static
../source/mongoose.c:4653:15:ether_output 24 static
../source/mongoose.c:4659:13:arp_ask 24 static
../source/mongoose.c:4673:13:onstatechange 16 static
../source/mongoose.c:4687:19:tx_ip 32 static
../source/mongoose.c:4707:13:tx_udp 48 static
../source/mongoose.c:4729:13:tx_dhcp 320 static
../source/mongoose.c:4746:13:tx_dhcp_request_sel 80 static
../source/mongoose.c:4763:13:tx_dhcp_request_re 48 static
../source/mongoose.c:4773:13:tx_dhcp_discover 40 static
../source/mongoose.c:4783:30:getpeer 32 static
../source/mongoose.c:4798:13:rx_arp 48 static
../source/mongoose.c:4837:13:rx_icmp 48 static
../source/mongoose.c:4853:13:rx_dhcp_client 88 static
../source/mongoose.c:4902:13:rx_dhcp_server 368 static
../source/mongoose.c:4941:13:rx_udp 24 static
../source/mongoose.c:4963:15:tx_tcp 88 static
../source/mongoose.c:4993:15:tx_tcp_pkt 72 static
../source/mongoose.c:5002:30:accept_conn 32 static
../source/mongoose.c:5029:15:trim_len 48 static
../source/mongoose.c:5056:6:mg_io_send 80 static
../source/mongoose.c:5079:13:read_conn 96 static
../source/mongoose.c:5170:13:rx_tcp 48 static
../source/mongoose.c:5219:13:rx_ip 56 static
../source/mongoose.c:5262:13:rx_ip6 16 static
../source/mongoose.c:5278:13:mg_tcpip_rx 88 static
../source/mongoose.c:5322:13:mg_tcpip_poll 104 static
../source/mongoose.c:5409:6:mg_tcpip_qwrite 32 static
../source/mongoose.c:5420:6:mg_tcpip_init 24 static
../source/mongoose.c:5451:6:mg_tcpip_free 16 static
../source/mongoose.c:5456:13:send_syn 64 static
../source/mongoose.c:5466:6:mg_connect_resolved 48 static
../source/mongoose.c:5506:6:mg_open_listener 16 static
../source/mongoose.c:5511:13:write_conn 24 static
../source/mongoose.c:5522:13:init_closure 80 static
../source/mongoose.c:5536:13:close_conn 24 static
../source/mongoose.c:5542:13:can_write 16 static
../source/mongoose.c:5547:6:mg_mgr_poll 64 static
../source/mongoose.c:5567:6:mg_send 64 static
../source/mongoose.c:5593:6:mg_ota_begin 16 static
../source/mongoose.c:5597:6:mg_ota_write 16 static
../source/mongoose.c:5601:6:mg_ota_end 4 static
../source/mongoose.c:5604:6:mg_ota_commit 4 static
../source/mongoose.c:5607:6:mg_ota_rollback 4 static
../source/mongoose.c:5610:5:mg_ota_status 16 static
../source/mongoose.c:5614:10:mg_ota_crc32 16 static
../source/mongoose.c:5618:10:mg_ota_timestamp 16 static
../source/mongoose.c:5622:8:mg_ota_size 16 static
../source/mongoose.c:5840:8:mg_queue_vprintf 32 static
../source/mongoose.c:5852:8:mg_queue_printf 28 static
../source/mongoose.c:5861:13:mg_pfn_iobuf_private 24 static
../source/mongoose.c:5872:13:mg_putchar_iobuf_static 16 static
../source/mongoose.c:5876:6:mg_pfn_iobuf 16 static
../source/mongoose.c:5880:8:mg_vsnprintf 48 static
../source/mongoose.c:5887:8:mg_snprintf 24 static
../source/mongoose.c:5896:7:mg_vmprintf 32 static
../source/mongoose.c:5902:7:mg_mprintf 16 static
../source/mongoose.c:5911:6:mg_pfn_stdout 16 static
../source/mongoose.c:5916:15:print_ip4 40 static
../source/mongoose.c:5920:15:print_ip6 80 static
../source/mongoose.c:5927:8:mg_print_ip4 32 static
../source/mongoose.c:5932:8:mg_print_ip6 32 static
../source/mongoose.c:5937:8:mg_print_ip 32 static
../source/mongoose.c:5943:8:mg_print_ip_port 40 static
../source/mongoose.c:5948:8:mg_print_mac 64 static
../source/mongoose.c:5954:13:mg_esc 32 static
../source/mongoose.c:5962:13:mg_escape 16 static
../source/mongoose.c:5966:15:qcpy 40 static
../source/mongoose.c:5980:15:bcpy 48 static
../source/mongoose.c:5997:8:mg_print_hex 40 static
../source/mongoose.c:6008:8:mg_print_base64 32 static
../source/mongoose.c:6014:8:mg_print_esc 32 static
../source/mongoose.c:6050:6:mg_queue_init 24 static
../source/mongoose.c:6056:15:mg_queue_read_len 24 static
../source/mongoose.c:6064:13:mg_queue_write_len 24 static
../source/mongoose.c:6070:8:mg_queue_book 32 static
../source/mongoose.c:6083:8:mg_queue_next 24 static
../source/mongoose.c:6097:6:mg_queue_add 16 static
../source/mongoose.c:6104:6:mg_queue_del 16 static
../source/mongoose.c:6115:6:mg_rpc_add 48 static
../source/mongoose.c:6124:6:mg_rpc_del 24 static
../source/mongoose.c:6137:13:mg_rpc_call 40 static
../source/mongoose.c:6148:6:mg_rpc_process 48 static
../source/mongoose.c:6162:6:mg_rpc_vok 72 static
../source/mongoose.c:6172:6:mg_rpc_ok 28 static
../source/mongoose.c:6179:6:mg_rpc_verr 80 static
../source/mongoose.c:6192:6:mg_rpc_err 24 static
../source/mongoose.c:6199:15:print_methods 56 static
../source/mongoose.c:6210:6:mg_rpc_list 16 static
../source/mongoose.c:6229:17:blk0 16 static
../source/mongoose.c:6266:13:mg_sha1_transform 112 static
../source/mongoose.c:6373:6:mg_sha1_init 16 static
../source/mongoose.c:6382:6:mg_sha1_update 32 static
../source/mongoose.c:6402:6:mg_sha1_final 32 static
../source/mongoose.c:6452:6:mg_sha256_init 16 static
../source/mongoose.c:6465:13:mg_sha256_chunk 320 static
../source/mongoose.c:6507:6:mg_sha256_update 40 static
../source/mongoose.c:6521:6:mg_sha256_final 40 static
../source/mongoose.c:6560:6:mg_hmac_sha256 344 static
../source/mongoose.c:6602:16:gettimestamp 56 static
../source/mongoose.c:6608:9:mg_sntp_parse 144 static
../source/mongoose.c:6633:13:sntp_cb 40 static
../source/mongoose.c:6651:6:mg_sntp_request 96 static
../source/mongoose.c:6666:23:mg_sntp_connect 32 static
../source/mongoose.c:7490:6:mg_http_serve_ssi 24 static
../source/mongoose.c:7502:15:mg_str_s 24 static
../source/mongoose.c:7507:15:mg_str_n 32 static
../source/mongoose.c:7512:5:mg_lower 24 static
../source/mongoose.c:7518:5:mg_ncasecmp 40 static
../source/mongoose.c:7526:5:mg_casecmp 16 static
../source/mongoose.c:7530:5:mg_vcmp 32 static
../source/mongoose.c:7537:5:mg_vcasecmp 32 static
../source/mongoose.c:7544:15:mg_strdup 40 static
../source/mongoose.c:7558:5:mg_strcmp 40 static
../source/mongoose.c:7572:13:mg_strstr 40 static
../source/mongoose.c:7585:13:is_space 16 static
../source/mongoose.c:7589:15:mg_strstrip 24 static
../source/mongoose.c:7595:6:mg_match 40 static
../source/mongoose.c:7627:6:mg_globmatch 48 static
../source/mongoose.c:7631:15:mg_nce 32 static
../source/mongoose.c:7644:6:mg_split 80 static
../source/mongoose.c:7654:6:mg_commalist 24 static
../source/mongoose.c:7658:7:mg_hex 40 static
../source/mongoose.c:7670:22:mg_unhex_nimble 16 static
../source/mongoose.c:7676:15:mg_unhexn 24 static
../source/mongoose.c:7682:6:mg_unhex 32 static
../source/mongoose.c:7689:6:mg_path_is_sane 24 static
../source/mongoose.c:7707:6:mg_timer_init 24 static
../source/mongoose.c:7714:6:mg_timer_free 16 static
../source/mongoose.c:7720:6:mg_timer_expired 56 static
../source/mongoose.c:7728:6:mg_timer_poll 56 static
../source/mongoose.c:9642:6:mg_tls_init 16 static
../source/mongoose.c:9646:6:mg_tls_handshake 16 static
../source/mongoose.c:9649:6:mg_tls_free 16 static
../source/mongoose.c:9652:6:mg_tls_recv 24 static
../source/mongoose.c:9655:6:mg_tls_send 24 static
../source/mongoose.c:9658:8:mg_tls_pending 16 static
../source/mongoose.c:9662:6:mg_tls_ctx_init 16 static
../source/mongoose.c:9665:6:mg_tls_ctx_free 16 static
../source/mongoose.c:13331:5:mg_url_is_ssl 16 static
../source/mongoose.c:13337:19:urlparse 56 static
../source/mongoose.c:13365:15:mg_url_host 56 static
../source/mongoose.c:13374:13:mg_url_uri 48 static
../source/mongoose.c:13379:16:mg_url_port 48 static
../source/mongoose.c:13391:15:mg_url_user 64 static
../source/mongoose.c:13401:15:mg_url_pass 64 static
../source/mongoose.c:13418:6:mg_bzero 16 static
../source/mongoose.c:13445:7:mg_random_str 24 static
../source/mongoose.c:13458:10:mg_ntohl 24 static
../source/mongoose.c:13465:10:mg_ntohs 24 static
../source/mongoose.c:13471:10:mg_crc32 32 static
../source/mongoose.c:13486:12:isbyte 16 static
../source/mongoose.c:13490:12:parse_net 72 static
../source/mongoose.c:13504:5:mg_check_ip_acl 56 static
../source/mongoose.c:13591:8:mg_ws_vprintf 32 static
../source/mongoose.c:13599:8:mg_ws_printf 24 static
../source/mongoose.c:13608:13:ws_handshake 176 static
../source/mongoose.c:13634:17:be32 16 static
../source/mongoose.c:13639:15:ws_process 56 static
../source/mongoose.c:13669:15:mkhdr 48 static
../source/mongoose.c:13697:13:mg_ws_mask 32 static
../source/mongoose.c:13705:8:mg_ws_send 48 static
../source/mongoose.c:13716:13:mg_ws_client_handshake 560 static
../source/mongoose.c:13739:13:mg_ws_cb 72 static
../source/mongoose.c:13810:23:mg_ws_connect 112 static
../source/mongoose.c:13840:6:mg_ws_upgrade 40 static
../source/mongoose.c:13860:8:mg_ws_wrap 48 static
../source/mongoose.c:14047:17:enet_phy_read 16 static
../source/mongoose.c:14054:13:enet_phy_write 16 static
../source/mongoose.c:14061:17:enet_phy_id 24 static
../source/mongoose.c:14070:13:mg_tcpip_driver_imxrt_init 40 static
../source/mongoose.c:14138:15:mg_tcpip_driver_imxrt_tx 24 static
../source/mongoose.c:14161:13:mg_tcpip_driver_imxrt_up 48 static
../source/mongoose.c:14196:6:ENET_IRQHandler 24 static
../source/mongoose.c:15221:13:w5500_txn 32 static
../source/mongoose.c:15236:14:w5500_wn 32 static
../source/mongoose.c:15237:14:w5500_w1 24 static
../source/mongoose.c:15238:14:w5500_w2 40 static
../source/mongoose.c:15239:14:w5500_rn 32 static
../source/mongoose.c:15240:17:w5500_r1 32 static
../source/mongoose.c:15241:18:w5500_r2 32 static
../source/mongoose.c:15244:15:w5500_rx 48 static
../source/mongoose.c:15263:15:w5500_tx 48 static
../source/mongoose.c:15282:13:w5500_init 24 static
../source/mongoose.c:15296:13:w5500_up 24 static

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@ -0,0 +1,23 @@
../source/net.c:32:10:mg_now 16 static
../source/net.c:36:5:ui_event_next 24 static
../source/net.c:54:13:sfn 56 static
../source/net.c:68:13:timer_sntp_fn 16 static
../source/net.c:73:21:authenticate 160 static
../source/net.c:100:13:handle_login 296 static
../source/net.c:109:13:handle_logout 272 static
../source/net.c:119:13:handle_debug 32 static
../source/net.c:125:15:print_int_arr 48 static
../source/net.c:134:13:handle_stats_get 136 static
../source/net.c:143:15:print_events 144 static
../source/net.c:162:13:handle_events_get 64 static
../source/net.c:169:13:handle_settings_set 96 static
../source/net.c:190:13:handle_settings_get 96 static
../source/net.c:199:13:handle_firmware_upload 168 static
../source/net.c:228:13:handle_firmware_commit 32 static
../source/net.c:233:13:handle_firmware_rollback 32 static
../source/net.c:238:15:print_status 120 static
../source/net.c:246:13:handle_firmware_status 32 static
../source/net.c:251:13:handle_device_reset 32 static
../source/net.c:256:13:handle_device_eraselast 32 static
../source/net.c:265:13:fn 120 static
../source/net.c:322:6:web_init 32 static

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@ -0,0 +1,3 @@
../source/packed_fs.c:2681:12:scmp 16 static
../source/packed_fs.c:2685:13:mg_unlist 16 static
../source/packed_fs.c:2688:13:mg_unpack 32 static

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@ -0,0 +1,43 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../source/main.c \
../source/mongoose.c \
../source/net.c \
../source/packed_fs.c \
../source/syscalls.c
C_DEPS += \
./source/main.d \
./source/mongoose.d \
./source/net.d \
./source/packed_fs.d \
./source/syscalls.d
OBJS += \
./source/main.o \
./source/mongoose.o \
./source/net.o \
./source/packed_fs.o \
./source/syscalls.o
# Each subdirectory must supply rules for building sources it contributes
source/%.o: ../source/%.c source/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-source
clean-source:
-$(RM) ./source/main.d ./source/main.o ./source/mongoose.d ./source/mongoose.o ./source/net.d ./source/net.o ./source/packed_fs.d ./source/packed_fs.o ./source/syscalls.d ./source/syscalls.o
.PHONY: clean-source

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@ -0,0 +1,19 @@
../source/syscalls.c:5:5:_fstat 16 static
../source/syscalls.c:11:7:_sbrk 32 static
../source/syscalls.c:24:5:_open 16 static
../source/syscalls.c:29:5:_close 16 static
../source/syscalls.c:34:5:_isatty 16 static
../source/syscalls.c:39:5:_lseek 24 static
../source/syscalls.c:44:6:_exit 16 static
../source/syscalls.c:49:6:_kill 16 static
../source/syscalls.c:53:5:_getpid 4 static
../source/hal.h:86:20:uart_write_byte 16 static
../source/hal.h:90:20:uart_write_buf 24 static
../source/syscalls.c:59:5:_write 24 static
../source/syscalls.c:73:5:_read 24 static
../source/syscalls.c:78:5:_link 16 static
../source/syscalls.c:83:5:_unlink 16 static
../source/syscalls.c:88:5:_stat 16 static
/usr/local/mcuxpressoide-11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.linux_11.8.1.202308071233/tools/arm-none-eabi/include/sys/stat.h:140:5:mkdir 16 static
../source/syscalls.c:98:6:_init 4 static
../source/syscalls.c:102:5:_gettimeofday 24 static

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@ -0,0 +1,27 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
ASM_SRCS :=
C_SRCS :=
OBJ_SRCS :=
O_SRCS :=
S_SRCS :=
S_UPPER_SRCS :=
C_DEPS :=
EXECUTABLES :=
OBJS :=
# Every subdirectory with source files must be described here
SUBDIRS := \
board \
component/lists \
component/serial_manager \
component/uart \
device \
drivers \
source \
startup \
utilities \
xip \

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@ -0,0 +1,171 @@
../startup/startup_mimxrt1062.c:618:6:data_init 4 static
../startup/startup_mimxrt1062.c:627:6:bss_init 0 static
../startup/startup_mimxrt1062.c:652:6:ResetISR 0 static
../startup/startup_mimxrt1062.c:743:14:NMI_Handler 0 static
../startup/startup_mimxrt1062.c:747:14:HardFault_Handler 0 static
../startup/startup_mimxrt1062.c:751:14:MemManage_Handler 0 static
../startup/startup_mimxrt1062.c:755:14:BusFault_Handler 0 static
../startup/startup_mimxrt1062.c:759:14:UsageFault_Handler 0 static
../startup/startup_mimxrt1062.c:763:14:SVC_Handler 0 static
../startup/startup_mimxrt1062.c:767:14:DebugMon_Handler 0 static
../startup/startup_mimxrt1062.c:771:14:PendSV_Handler 0 static
../startup/startup_mimxrt1062.c:775:14:SysTick_Handler 0 static
../startup/startup_mimxrt1062.c:783:14:IntDefaultHandler 0 static
../startup/startup_mimxrt1062.c:793:11:DMA0_DMA16_IRQHandler 8 static
../startup/startup_mimxrt1062.c:797:11:DMA1_DMA17_IRQHandler 8 static
../startup/startup_mimxrt1062.c:801:11:DMA2_DMA18_IRQHandler 8 static
../startup/startup_mimxrt1062.c:805:11:DMA3_DMA19_IRQHandler 8 static
../startup/startup_mimxrt1062.c:809:11:DMA4_DMA20_IRQHandler 8 static
../startup/startup_mimxrt1062.c:813:11:DMA5_DMA21_IRQHandler 8 static
../startup/startup_mimxrt1062.c:817:11:DMA6_DMA22_IRQHandler 8 static
../startup/startup_mimxrt1062.c:821:11:DMA7_DMA23_IRQHandler 8 static
../startup/startup_mimxrt1062.c:825:11:DMA8_DMA24_IRQHandler 8 static
../startup/startup_mimxrt1062.c:829:11:DMA9_DMA25_IRQHandler 8 static
../startup/startup_mimxrt1062.c:833:11:DMA10_DMA26_IRQHandler 8 static
../startup/startup_mimxrt1062.c:837:11:DMA11_DMA27_IRQHandler 8 static
../startup/startup_mimxrt1062.c:841:11:DMA12_DMA28_IRQHandler 8 static
../startup/startup_mimxrt1062.c:845:11:DMA13_DMA29_IRQHandler 8 static
../startup/startup_mimxrt1062.c:849:11:DMA14_DMA30_IRQHandler 8 static
../startup/startup_mimxrt1062.c:853:11:DMA15_DMA31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:857:11:DMA_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:861:11:CTI0_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:865:11:CTI1_ERROR_IRQHandler 8 static
../startup/startup_mimxrt1062.c:869:11:CORE_IRQHandler 8 static
../startup/startup_mimxrt1062.c:873:11:LPUART1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:877:11:LPUART2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:881:11:LPUART3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:885:11:LPUART4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:889:11:LPUART5_IRQHandler 8 static
../startup/startup_mimxrt1062.c:893:11:LPUART6_IRQHandler 8 static
../startup/startup_mimxrt1062.c:897:11:LPUART7_IRQHandler 8 static
../startup/startup_mimxrt1062.c:901:11:LPUART8_IRQHandler 8 static
../startup/startup_mimxrt1062.c:905:11:LPI2C1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:909:11:LPI2C2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:913:11:LPI2C3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:917:11:LPI2C4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:921:11:LPSPI1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:925:11:LPSPI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:929:11:LPSPI3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:933:11:LPSPI4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:937:11:CAN1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:941:11:CAN2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:945:11:FLEXRAM_IRQHandler 8 static
../startup/startup_mimxrt1062.c:949:11:KPP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:953:11:TSC_DIG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:957:11:GPR_IRQ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:961:11:LCDIF_IRQHandler 8 static
../startup/startup_mimxrt1062.c:965:11:CSI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:969:11:PXP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:973:11:WDOG2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:977:11:SNVS_HP_WRAPPER_IRQHandler 8 static
../startup/startup_mimxrt1062.c:981:11:SNVS_HP_WRAPPER_TZ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:985:11:SNVS_LP_WRAPPER_IRQHandler 8 static
../startup/startup_mimxrt1062.c:989:11:CSU_IRQHandler 8 static
../startup/startup_mimxrt1062.c:993:11:DCP_IRQHandler 8 static
../startup/startup_mimxrt1062.c:997:11:DCP_VMI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1001:11:Reserved68_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1005:11:TRNG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1009:11:SJC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1013:11:BEE_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1017:11:SAI1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1021:11:SAI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1025:11:SAI3_RX_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1029:11:SAI3_TX_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1033:11:SPDIF_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1037:11:PMU_EVENT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1041:11:Reserved78_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1045:11:TEMP_LOW_HIGH_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1049:11:TEMP_PANIC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1053:11:USB_PHY1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1057:11:USB_PHY2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1061:11:ADC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1065:11:ADC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1069:11:DCDC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1073:11:Reserved86_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1077:11:GPIO10_Combined_0_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1081:11:GPIO1_INT0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1085:11:GPIO1_INT1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1089:11:GPIO1_INT2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1093:11:GPIO1_INT3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1097:11:GPIO1_INT4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1101:11:GPIO1_INT5_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1105:11:GPIO1_INT6_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1109:11:GPIO1_INT7_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1113:11:GPIO1_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1117:11:GPIO1_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1121:11:GPIO2_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1125:11:GPIO2_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1129:11:GPIO3_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1133:11:GPIO3_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1137:11:GPIO4_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1141:11:GPIO4_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1145:11:GPIO5_Combined_0_15_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1149:11:GPIO5_Combined_16_31_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1153:11:FLEXIO1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1157:11:FLEXIO2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1161:11:WDOG1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1165:11:RTWDOG_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1169:11:EWM_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1173:11:CCM_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1177:11:CCM_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1181:11:GPC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1185:11:SRC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1189:11:Reserved115_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1193:11:GPT1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1197:11:GPT2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1201:11:PWM1_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1205:11:PWM1_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1209:11:PWM1_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1213:11:PWM1_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1217:11:PWM1_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1221:11:FLEXSPI2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1225:11:FLEXSPI_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1229:11:SEMC_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1233:11:USDHC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1237:11:USDHC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1241:11:USB_OTG2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1245:11:USB_OTG1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1249:11:ENET_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1253:11:ENET_1588_Timer_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1257:11:XBAR1_IRQ_0_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1261:11:XBAR1_IRQ_2_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1265:11:ADC_ETC_IRQ0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1269:11:ADC_ETC_IRQ1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1273:11:ADC_ETC_IRQ2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1277:11:ADC_ETC_ERROR_IRQ_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1281:11:PIT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1285:11:ACMP1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1289:11:ACMP2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1293:11:ACMP3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1297:11:ACMP4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1301:11:Reserved143_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1305:11:Reserved144_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1309:11:ENC1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1313:11:ENC2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1317:11:ENC3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1321:11:ENC4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1325:11:TMR1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1329:11:TMR2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1333:11:TMR3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1337:11:TMR4_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1341:11:PWM2_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1345:11:PWM2_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1349:11:PWM2_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1353:11:PWM2_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1357:11:PWM2_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1361:11:PWM3_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1365:11:PWM3_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1369:11:PWM3_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1373:11:PWM3_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1377:11:PWM3_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1381:11:PWM4_0_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1385:11:PWM4_1_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1389:11:PWM4_2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1393:11:PWM4_3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1397:11:PWM4_FAULT_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1401:11:ENET2_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1405:11:ENET2_1588_Timer_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1409:11:CAN3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1413:11:Reserved171_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1417:11:FLEXIO3_IRQHandler 8 static
../startup/startup_mimxrt1062.c:1421:11:GPIO6_7_8_9_IRQHandler 8 static

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################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../startup/startup_mimxrt1062.c
C_DEPS += \
./startup/startup_mimxrt1062.d
OBJS += \
./startup/startup_mimxrt1062.o
# Each subdirectory must supply rules for building sources it contributes
startup/%.o: ../startup/%.c startup/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-startup
clean-startup:
-$(RM) ./startup/startup_mimxrt1062.d ./startup/startup_mimxrt1062.o
.PHONY: clean-startup

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@ -0,0 +1 @@
/usr/local/mcuxpressoide-11.8.1_1197/ide/plugins/com.nxp.mcuxpresso.tools.linux_11.8.1.202308071233/tools/arm-none-eabi/include/assert.h:41:6:__assert_func 32 static

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@ -0,0 +1,18 @@
../utilities/fsl_debug_console.c:424:10:DbgConsole_ReadOneCharacter 24 static
../utilities/fsl_debug_console.c:495:5:DbgConsole_SendData 24 static
../utilities/fsl_debug_console.c:548:5:DbgConsole_SendDataReliable 24 static
../utilities/fsl_debug_console.c:629:5:DbgConsole_ReadLine 24 static
../utilities/fsl_debug_console.c:695:5:DbgConsole_ReadCharacter 24 static
../utilities/fsl_debug_console.c:732:13:DbgConsole_PrintCallback 32 static
../utilities/fsl_debug_console.c:772:10:DbgConsole_Init 64 static
../utilities/fsl_debug_console.c:943:10:DbgConsole_EnterLowpower 16 static
../utilities/fsl_debug_console.c:954:10:DbgConsole_ExitLowpower 16 static
../utilities/fsl_debug_console.c:965:10:DbgConsole_Deinit 8 static
../utilities/fsl_debug_console.c:1008:40:DbgConsole_Flush 4 static
../utilities/fsl_debug_console.c:1047:5:DbgConsole_Printf 16 static
../utilities/fsl_debug_console.c:1060:5:DbgConsole_Vprintf 152 static
../utilities/fsl_debug_console.c:1076:5:DbgConsole_Putchar 16 static
../utilities/fsl_debug_console.c:1083:5:DbgConsole_Scanf 40 static
../utilities/fsl_debug_console.c:1102:5:DbgConsole_BlockingPrintf 16 static
../utilities/fsl_debug_console.c:1115:5:DbgConsole_BlockingVprintf 160 static
../utilities/fsl_debug_console.c:1184:5:DbgConsole_Getchar 16 static

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@ -0,0 +1,20 @@
../utilities/fsl_str.c:102:17:PrintGetWidth 24 static
../utilities/fsl_str.c:131:17:PrintGetPrecision 40 static
../utilities/fsl_str.c:188:17:PrintIsobpu 24 static
../utilities/fsl_str.c:198:17:PrintIsdi 24 static
../utilities/fsl_str.c:208:13:PrintOutputdifFobpu 32 static
../utilities/fsl_str.c:261:13:PrintOutputxX 32 static
../utilities/fsl_str.c:322:17:PrintIsfF 24 static
../utilities/fsl_str.c:332:17:PrintIsxX 24 static
../utilities/fsl_str.c:441:13:PrintFilterLengthFlag 24 static
../utilities/fsl_str.c:455:16:PrintGetRadixFromobpu 24 static
../utilities/fsl_str.c:478:17:ScanIsWhiteSpace 24 static
../utilities/fsl_str.c:488:17:ScanIgnoreWhiteSpace 24 static
../utilities/fsl_str.c:503:16:ConvertRadixNumToString 64 static
../utilities/fsl_str.c:768:5:StrFormatPrintf 144 static
../utilities/fsl_str.c:1060:16:StrFormatScanIsFormatStarting 24 static
../utilities/fsl_str.c:1079:16:StrFormatScanGetBase 16 static
../utilities/fsl_str.c:1102:16:StrFormatScanCheckSymbol 24 static
../utilities/fsl_str.c:1123:16:StrFormatScanFillInteger 24 static
../utilities/fsl_str.c:1224:16:StrFormatScanfStringHandling 40 static
../utilities/fsl_str.c:1393:5:StrFormatScanf 88 static

View File

@ -0,0 +1,37 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../utilities/fsl_assert.c \
../utilities/fsl_debug_console.c \
../utilities/fsl_str.c
C_DEPS += \
./utilities/fsl_assert.d \
./utilities/fsl_debug_console.d \
./utilities/fsl_str.d
OBJS += \
./utilities/fsl_assert.o \
./utilities/fsl_debug_console.o \
./utilities/fsl_str.o
# Each subdirectory must supply rules for building sources it contributes
utilities/%.o: ../utilities/%.c utilities/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-utilities
clean-utilities:
-$(RM) ./utilities/fsl_assert.d ./utilities/fsl_assert.o ./utilities/fsl_debug_console.d ./utilities/fsl_debug_console.o ./utilities/fsl_str.d ./utilities/fsl_str.o
.PHONY: clean-utilities

View File

@ -0,0 +1,34 @@
################################################################################
# Automatically-generated file. Do not edit!
################################################################################
# Add inputs and outputs from these tool invocations to the build variables
C_SRCS += \
../xip/evkbmimxrt1060_flexspi_nor_config.c \
../xip/fsl_flexspi_nor_boot.c
C_DEPS += \
./xip/evkbmimxrt1060_flexspi_nor_config.d \
./xip/fsl_flexspi_nor_boot.d
OBJS += \
./xip/evkbmimxrt1060_flexspi_nor_config.o \
./xip/fsl_flexspi_nor_boot.o
# Each subdirectory must supply rules for building sources it contributes
xip/%.o: ../xip/%.c xip/subdir.mk
@echo 'Building file: $<'
@echo 'Invoking: MCU C Compiler'
arm-none-eabi-gcc -DCPU_MIMXRT1062DVL6B -DUART_DEBUG=LPUART3 -DCPU_MIMXRT1062DVL6B_cm7 -DSDK_OS_BAREMETAL -DXIP_EXTERNAL_FLASH=1 -DXIP_BOOT_HEADER_ENABLE=1 -DSDK_DEBUGCONSOLE=1 -DSERIAL_PORT_TYPE_UART=1 -D__MCUXPRESSO -D__USE_CMSIS -DDEBUG -D__NEWLIB__ -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/board" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/source" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/drivers" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/xip" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/CMSIS" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/device" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/serial_manager" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/uart" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/utilities" -I"/root/Documents/MCUXpresso_11.8.1_1197/workspace/rt1060-evk-xpresso-baremetal-builtin/component/lists" -O0 -fno-common -g3 -Wall -c -ffunction-sections -fdata-sections -ffreestanding -fno-builtin -fmerge-constants -fmacro-prefix-map="$(<D)/"= -mcpu=cortex-m7 -mfpu=fpv5-sp-d16 -mfloat-abi=hard -mthumb -D__NEWLIB__ -fstack-usage -specs=nano.specs -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.o)" -MT"$(@:%.o=%.d)" -o "$@" "$<"
@echo 'Finished building: $<'
@echo ' '
clean: clean-xip
clean-xip:
-$(RM) ./xip/evkbmimxrt1060_flexspi_nor_config.d ./xip/evkbmimxrt1060_flexspi_nor_config.o ./xip/fsl_flexspi_nor_boot.d ./xip/fsl_flexspi_nor_boot.o
.PHONY: clean-xip

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@ -0,0 +1,402 @@
/*
* Copyright 2021 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include "fsl_common.h"
#include "fsl_debug_console.h"
#include "board.h"
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
#include "fsl_lpi2c.h"
#endif /* SDK_I2C_BASED_COMPONENT_USED */
#include "fsl_iomuxc.h"
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
* Code
******************************************************************************/
/* Get debug console frequency. */
uint32_t BOARD_DebugConsoleSrcFreq(void)
{
uint32_t freq;
/* To make it simple, we assume default PLL and divider settings, and the only variable
from application is use PLL3 source or OSC source */
if (CLOCK_GetMux(kCLOCK_UartMux) == 0) /* PLL3 div6 80M */
{
freq = (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
else
{
freq = CLOCK_GetOscFreq() / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U);
}
return freq;
}
/* Initialize debug console. */
void BOARD_InitDebugConsole(void)
{
uint32_t uartClkSrcFreq = BOARD_DebugConsoleSrcFreq();
DbgConsole_Init(BOARD_DEBUG_UART_INSTANCE, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq);
}
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz)
{
lpi2c_master_config_t lpi2cConfig = {0};
/*
* lpi2cConfig.debugEnable = false;
* lpi2cConfig.ignoreAck = false;
* lpi2cConfig.pinConfig = kLPI2C_2PinOpenDrain;
* lpi2cConfig.baudRate_Hz = 100000U;
* lpi2cConfig.busIdleTimeout_ns = 0;
* lpi2cConfig.pinLowTimeout_ns = 0;
* lpi2cConfig.sdaGlitchFilterWidth_ns = 0;
* lpi2cConfig.sclGlitchFilterWidth_ns = 0;
*/
LPI2C_MasterGetDefaultConfig(&lpi2cConfig);
LPI2C_MasterInit(base, &lpi2cConfig, clkSrc_Hz);
}
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *txBuff,
uint8_t txBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Write;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = txBuff;
xfer.dataSize = txBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
}
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Read;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = rxBuff;
xfer.dataSize = rxBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
}
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *txBuff,
uint8_t txBuffSize)
{
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Write;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = txBuff;
xfer.dataSize = txBuffSize;
return LPI2C_MasterTransferBlocking(base, &xfer);
}
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subAddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize)
{
status_t status;
lpi2c_master_transfer_t xfer;
xfer.flags = kLPI2C_TransferDefaultFlag;
xfer.slaveAddress = deviceAddress;
xfer.direction = kLPI2C_Write;
xfer.subaddress = subAddress;
xfer.subaddressSize = subAddressSize;
xfer.data = NULL;
xfer.dataSize = 0;
status = LPI2C_MasterTransferBlocking(base, &xfer);
if (kStatus_Success == status)
{
xfer.subaddressSize = 0;
xfer.direction = kLPI2C_Read;
xfer.data = rxBuff;
xfer.dataSize = rxBuffSize;
status = LPI2C_MasterTransferBlocking(base, &xfer);
}
return status;
}
void BOARD_Accel_I2C_Init(void)
{
BOARD_LPI2C_Init(BOARD_ACCEL_I2C_BASEADDR, BOARD_ACCEL_I2C_CLOCK_FREQ);
}
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff)
{
uint8_t data = (uint8_t)txBuff;
return BOARD_LPI2C_Send(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, &data, 1);
}
status_t BOARD_Accel_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_ACCEL_I2C_BASEADDR, deviceAddress, subAddress, subaddressSize, rxBuff, rxBuffSize);
}
void BOARD_Codec_I2C_Init(void)
{
BOARD_LPI2C_Init(BOARD_CODEC_I2C_BASEADDR, BOARD_CODEC_I2C_CLOCK_FREQ);
}
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_CODEC_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
}
void BOARD_Camera_I2C_Init(void)
{
CLOCK_SetMux(kCLOCK_Lpi2cMux, BOARD_CAMERA_I2C_CLOCK_SOURCE_SELECT);
CLOCK_SetDiv(kCLOCK_Lpi2cDiv, BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER);
BOARD_LPI2C_Init(BOARD_CAMERA_I2C_BASEADDR, BOARD_CAMERA_I2C_CLOCK_FREQ);
}
status_t BOARD_Camera_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Camera_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
rxBuffSize);
}
status_t BOARD_Camera_I2C_SendSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_SendSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Camera_I2C_ReceiveSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_ReceiveSCCB(BOARD_CAMERA_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff,
rxBuffSize);
}
status_t BOARD_Touch_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize)
{
return BOARD_LPI2C_Send(BOARD_TOUCH_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, (uint8_t *)txBuff,
txBuffSize);
}
status_t BOARD_Touch_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize)
{
return BOARD_LPI2C_Receive(BOARD_TOUCH_I2C_BASEADDR, deviceAddress, subAddress, subAddressSize, rxBuff, rxBuffSize);
}
#endif /* SDK_I2C_BASED_COMPONENT_USED */
/* MPU configuration. */
void BOARD_ConfigMPU(void)
{
#if defined(__CC_ARM) || defined(__ARMCC_VERSION)
extern uint32_t Image$$RW_m_ncache$$Base[];
/* RW_m_ncache_unused is a auxiliary region which is used to get the whole size of noncache section */
extern uint32_t Image$$RW_m_ncache_unused$$Base[];
extern uint32_t Image$$RW_m_ncache_unused$$ZI$$Limit[];
uint32_t nonCacheStart = (uint32_t)Image$$RW_m_ncache$$Base;
uint32_t size = ((uint32_t)Image$$RW_m_ncache_unused$$Base == nonCacheStart) ?
0 :
((uint32_t)Image$$RW_m_ncache_unused$$ZI$$Limit - nonCacheStart);
#elif defined(__MCUXPRESSO)
extern uint32_t __base_NCACHE_REGION;
extern uint32_t __top_NCACHE_REGION;
uint32_t nonCacheStart = (uint32_t)(&__base_NCACHE_REGION);
uint32_t size = (uint32_t)(&__top_NCACHE_REGION) - nonCacheStart;
#elif defined(__ICCARM__) || defined(__GNUC__)
extern uint32_t __NCACHE_REGION_START[];
extern uint32_t __NCACHE_REGION_SIZE[];
uint32_t nonCacheStart = (uint32_t)__NCACHE_REGION_START;
uint32_t size = (uint32_t)__NCACHE_REGION_SIZE;
#endif
volatile uint32_t i = 0;
/* Disable I cache and D cache */
if (SCB_CCR_IC_Msk == (SCB_CCR_IC_Msk & SCB->CCR))
{
SCB_DisableICache();
}
if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR))
{
SCB_DisableDCache();
}
/* Disable MPU */
ARM_MPU_Disable();
/* MPU configure:
* Use ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable,
* SubRegionDisable, Size)
* API in mpu_armv7.h.
* param DisableExec Instruction access (XN) disable bit,0=instruction fetches enabled, 1=instruction fetches
* disabled.
* param AccessPermission Data access permissions, allows you to configure read/write access for User and
* Privileged mode.
* Use MACROS defined in mpu_armv7.h:
* ARM_MPU_AP_NONE/ARM_MPU_AP_PRIV/ARM_MPU_AP_URO/ARM_MPU_AP_FULL/ARM_MPU_AP_PRO/ARM_MPU_AP_RO
* Combine TypeExtField/IsShareable/IsCacheable/IsBufferable to configure MPU memory access attributes.
* TypeExtField IsShareable IsCacheable IsBufferable Memory Attribute Shareability Cache
* 0 x 0 0 Strongly Ordered shareable
* 0 x 0 1 Device shareable
* 0 0 1 0 Normal not shareable Outer and inner write
* through no write allocate
* 0 0 1 1 Normal not shareable Outer and inner write
* back no write allocate
* 0 1 1 0 Normal shareable Outer and inner write
* through no write allocate
* 0 1 1 1 Normal shareable Outer and inner write
* back no write allocate
* 1 0 0 0 Normal not shareable outer and inner
* noncache
* 1 1 0 0 Normal shareable outer and inner
* noncache
* 1 0 1 1 Normal not shareable outer and inner write
* back write/read acllocate
* 1 1 1 1 Normal shareable outer and inner write
* back write/read acllocate
* 2 x 0 0 Device not shareable
* Above are normal use settings, if your want to see more details or want to config different inner/outter cache
* policy.
* please refer to Table 4-55 /4-56 in arm cortex-M7 generic user guide <dui0646b_cortex_m7_dgug.pdf>
* param SubRegionDisable Sub-region disable field. 0=sub-region is enabled, 1=sub-region is disabled.
* param Size Region size of the region to be configured. use ARM_MPU_REGION_SIZE_xxx MACRO in
* mpu_armv7.h.
*/
/*
* Add default region to deny access to whole address space to workaround speculative prefetch.
* Refer to Arm errata 1013783-B for more details.
*
*/
/* Region 0 setting: Instruction access disabled, No data access permission. */
MPU->RBAR = ARM_MPU_RBAR(0, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(1, ARM_MPU_AP_NONE, 0, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4GB);
/* Region 1 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
/* Region 2 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
#if defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1)
/* Region 3 setting: Memory with Normal type, not shareable, outer/inner write back. */
MPU->RBAR = ARM_MPU_RBAR(3, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_RO, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_8MB);
#endif
/* Region 4 setting: Memory with Device type, not shareable, non-cacheable. */
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(5, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 6 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(6, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 7 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(7, 0x20200000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_512KB);
/* Region 8 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(8, 0x20280000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
/* Region 9 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(9, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
while ((size >> i) > 0x1U)
{
i++;
}
if (i != 0)
{
/* The MPU region size should be 2^N, 5<=N<=32, region base should be multiples of size. */
assert(!(nonCacheStart % size));
assert(size == (uint32_t)(1 << i));
assert(i >= 5);
/* Region 10 setting: Memory with Normal type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(10, nonCacheStart);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 0, 0, 0, 0, i - 1);
}
/* Region 10 setting: Memory with Device type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(11, 0x40000000);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_4MB);
/* Region 12 setting: Memory with Device type, not shareable, non-cacheable */
MPU->RBAR = ARM_MPU_RBAR(12, 0x42000000);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1MB);
/* Enable MPU */
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
/* Enable I cache and D cache */
SCB_EnableDCache();
SCB_EnableICache();
}

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/*
* Copyright 2021-2022 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include "clock_config.h"
#include "fsl_common.h"
#include "fsl_gpio.h"
#include "fsl_clock.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*! @brief The board name */
#define BOARD_NAME "MIMXRT1060-EVKB"
/* The UART to use for debug messages. */
#define BOARD_DEBUG_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
#define BOARD_DEBUG_UART_TYPE kSerialPort_Uart
#ifndef BOARD_DEBUG_UART_BASEADDR
#define BOARD_DEBUG_UART_BASEADDR (uint32_t) LPUART1
#endif
#ifndef BOARD_DEBUG_UART_INSTANCE
#define BOARD_DEBUG_UART_INSTANCE 1U
#endif
#ifndef BOARD_UART_IRQ
#define BOARD_UART_IRQ LPUART1_IRQn
#endif
#ifndef BOARD_UART_IRQ_HANDLER
#define BOARD_UART_IRQ_HANDLER LPUART1_IRQHandler
#endif
#ifndef BOARD_DEBUG_UART_BAUDRATE
#define BOARD_DEBUG_UART_BAUDRATE (115200U)
#endif
/*! @brief The USER_LED used for board */
#define LOGIC_LED_ON (0U)
#define LOGIC_LED_OFF (1U)
#ifndef BOARD_USER_LED_GPIO
#define BOARD_USER_LED_GPIO GPIO1
#endif
#ifndef BOARD_USER_LED_GPIO_PIN
#define BOARD_USER_LED_GPIO_PIN (8U)
#endif
#define USER_LED_INIT(output) \
GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, output); \
BOARD_USER_LED_GPIO->GDIR |= (1U << BOARD_USER_LED_GPIO_PIN) /*!< Enable target USER_LED */
#define USER_LED_ON() GPIO_PortSet(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN) /*!<Turn on target USER_LED*/
#define USER_LED_OFF() \
GPIO_PortClear(BOARD_USER_LED_GPIO, 1U << BOARD_USER_LED_GPIO_PIN) /*!< Turn off target USER_LED */
#define USER_LED_TOGGLE() \
GPIO_PinWrite(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN, \
0x1 ^ GPIO_PinRead(BOARD_USER_LED_GPIO, BOARD_USER_LED_GPIO_PIN)) /*!< Toggle target USER_LED */
/*! @brief Define the port interrupt number for the board switches */
#ifndef BOARD_USER_BUTTON_GPIO
#define BOARD_USER_BUTTON_GPIO GPIO5
#endif
#ifndef BOARD_USER_BUTTON_GPIO_PIN
#define BOARD_USER_BUTTON_GPIO_PIN (0U)
#endif
#define BOARD_USER_BUTTON_IRQ GPIO5_Combined_0_15_IRQn
#define BOARD_USER_BUTTON_IRQ_HANDLER GPIO5_Combined_0_15_IRQHandler
#define BOARD_USER_BUTTON_NAME "SW5"
/*! @brief The board flash size */
#define BOARD_FLASH_SIZE (0x800000U)
/*! @brief The ENET PHY address. */
#define BOARD_ENET0_PHY_ADDRESS (0x02U) /* Phy address of enet port 0. */
/* USB PHY condfiguration */
#define BOARD_USB_PHY_D_CAL (0x0CU)
#define BOARD_USB_PHY_TXCAL45DP (0x06U)
#define BOARD_USB_PHY_TXCAL45DM (0x06U)
#define BOARD_ARDUINO_INT_IRQ (GPIO1_INT3_IRQn)
#define BOARD_ARDUINO_I2C_IRQ (LPI2C1_IRQn)
#define BOARD_ARDUINO_I2C_INDEX (1)
/* @Brief Board accelerator sensor configuration */
#define BOARD_ACCEL_I2C_BASEADDR LPI2C1
/* Select USB1 PLL (480 MHz) as LPI2C's clock source */
#define BOARD_ACCEL_I2C_CLOCK_SOURCE_SELECT (0U)
/* Clock divider for LPI2C clock source */
#define BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER (5U)
#define BOARD_ACCEL_I2C_CLOCK_FREQ (CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_ACCEL_I2C_CLOCK_SOURCE_DIVIDER + 1U))
#define BOARD_CODEC_I2C_BASEADDR LPI2C1
#define BOARD_CODEC_I2C_INSTANCE 1U
#define BOARD_CODEC_I2C_CLOCK_SOURCE_SELECT (0U)
#define BOARD_CODEC_I2C_CLOCK_SOURCE_DIVIDER (5U)
#define BOARD_CODEC_I2C_CLOCK_FREQ (10000000U)
/* @Brief Board CAMERA configuration */
#define BOARD_CAMERA_I2C_BASEADDR LPI2C1
#define BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER (5U)
#define BOARD_CAMERA_I2C_CLOCK_SOURCE_SELECT (0U) /* Select USB1 PLL (480 MHz) as LPI2C's clock source */
#define BOARD_CAMERA_I2C_CLOCK_FREQ \
(CLOCK_GetFreq(kCLOCK_Usb1PllClk) / 8 / (BOARD_CAMERA_I2C_CLOCK_SOURCE_DIVIDER + 1U))
#define BOARD_CAMERA_I2C_SCL_GPIO GPIO1
#define BOARD_CAMERA_I2C_SCL_PIN 16
#define BOARD_CAMERA_I2C_SDA_GPIO GPIO1
#define BOARD_CAMERA_I2C_SDA_PIN 17
#define BOARD_CAMERA_PWDN_GPIO GPIO1
#define BOARD_CAMERA_PWDN_PIN 18
/* @Brief Board touch panel configuration */
#define BOARD_TOUCH_I2C_BASEADDR LPI2C1
#define BOARD_TOUCH_RST_GPIO GPIO1
#define BOARD_TOUCH_RST_PIN 2
#define BOARD_TOUCH_INT_GPIO GPIO1
#define BOARD_TOUCH_INT_PIN 11
/* @Brief Board Bluetooth HCI UART configuration */
#define BOARD_BT_UART_BASEADDR LPUART3
#define BOARD_BT_UART_INSTANCE 3
#define BOARD_BT_UART_BAUDRATE 3000000
#define BOARD_BT_UART_CLK_FREQ BOARD_DebugConsoleSrcFreq()
#define BOARD_BT_UART_IRQ LPUART3_IRQn
#define BOARD_BT_UART_IRQ_HANDLER LPUART3_IRQHandler
/*! @brief board has sdcard */
#define BOARD_HAS_SDCARD (1U)
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus */
/*******************************************************************************
* API
******************************************************************************/
uint32_t BOARD_DebugConsoleSrcFreq(void);
void BOARD_InitDebugConsole(void);
void BOARD_ConfigMPU(void);
#if defined(SDK_I2C_BASED_COMPONENT_USED) && SDK_I2C_BASED_COMPONENT_USED
void BOARD_LPI2C_Init(LPI2C_Type *base, uint32_t clkSrc_Hz);
status_t BOARD_LPI2C_Send(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_LPI2C_Receive(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
status_t BOARD_LPI2C_SendSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *txBuff,
uint8_t txBuffSize);
status_t BOARD_LPI2C_ReceiveSCCB(LPI2C_Type *base,
uint8_t deviceAddress,
uint32_t subAddress,
uint8_t subaddressSize,
uint8_t *rxBuff,
uint8_t rxBuffSize);
void BOARD_Accel_I2C_Init(void);
status_t BOARD_Accel_I2C_Send(uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint32_t txBuff);
status_t BOARD_Accel_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subaddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
void BOARD_Codec_I2C_Init(void);
status_t BOARD_Codec_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Codec_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
void BOARD_Camera_I2C_Init(void);
status_t BOARD_Camera_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Camera_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
status_t BOARD_Camera_I2C_SendSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Camera_I2C_ReceiveSCCB(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
status_t BOARD_Touch_I2C_Send(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, const uint8_t *txBuff, uint8_t txBuffSize);
status_t BOARD_Touch_I2C_Receive(
uint8_t deviceAddress, uint32_t subAddress, uint8_t subAddressSize, uint8_t *rxBuff, uint8_t rxBuffSize);
#endif /* SDK_I2C_BASED_COMPONENT_USED */
void BOARD_SD_Pin_Config(uint32_t speed, uint32_t strength);
void BOARD_MMC_Pin_Config(uint32_t speed, uint32_t strength);
#if defined(__cplusplus)
}
#endif /* __cplusplus */
#endif /* _BOARD_H_ */

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@ -0,0 +1,953 @@
/*
* How to setup clock using clock driver functions:
*
* 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
*
* 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
*
* 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
*
* 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
*
* 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
*
*/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: Clocks v12.0
processor: MIMXRT1062xxxxB
package_id: MIMXRT1062DVL6B
mcu_data: ksdk2_0
processor_version: 14.0.1
board: MIMXRT1060-EVKB
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
#include "clock_config.h"
#include "fsl_iomuxc.h"
/*******************************************************************************
* Definitions
******************************************************************************/
/*******************************************************************************
* Variables
******************************************************************************/
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
void BOARD_InitBootClocks(void)
{
BOARD_BootClockRUN();
}
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN
called_from_default_init: true
outputs:
- {id: AHB_CLK_ROOT.outFreq, value: 600 MHz}
- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
- {id: CLK_1M.outFreq, value: 1 MHz}
- {id: CLK_24M.outFreq, value: 24 MHz}
- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
- {id: ENET2_125M_CLK.outFreq, value: 25 MHz}
- {id: ENET_125M_CLK.outFreq, value: 50 MHz}
- {id: ENET_25M_REF_CLK.outFreq, value: 25 MHz}
- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
- {id: GPT1_ipg_clk_highfreq.outFreq, value: 75 MHz}
- {id: GPT2_ipg_clk_highfreq.outFreq, value: 75 MHz}
- {id: IPG_CLK_ROOT.outFreq, value: 150 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
- {id: PERCLK_CLK_ROOT.outFreq, value: 75 MHz}
- {id: PLL7_MAIN_CLK.outFreq, value: 24 MHz}
- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
- {id: SEMC_CLK_ROOT.outFreq, value: 75 MHz}
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
settings:
- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
- {id: CCM.SEMC_PODF.scale, value: '8'}
- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
- {id: CCM_ANALOG.PLL4.denom, value: '50'}
- {id: CCM_ANALOG.PLL4.div, value: '47'}
- {id: CCM_ANALOG.PLL5.denom, value: '1'}
- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
- {id: CCM_ANALOG.PLL5.num, value: '0'}
- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
sources:
- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Variables for BOARD_BootClockRUN configuration
******************************************************************************/
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
{
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN =
{
.loopDivider = 31, /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.postDivider = 8, /* Divider after PLL */
.numerator = 0, /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.denominator = 1, /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
{
.enableClkOutput = true, /* Enable the PLL providing the ENET 125MHz reference clock */
.enableClkOutput1 = true, /* Enable the PLL providing the ENET2 125MHz reference clock */
.enableClkOutput25M = true, /* Enable the PLL providing the ENET 25MHz reference clock */
.loopDivider = 1, /* Set frequency of ethernet reference clock to 50 MHz */
.loopDivider1 = 0, /* Set frequency of ethernet reference clock to 25 MHz */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
/*******************************************************************************
* Code for BOARD_BootClockRUN configuration
******************************************************************************/
void BOARD_BootClockRUN(void)
{
/* Init RTC OSC clock frequency. */
CLOCK_SetRtcXtalFreq(32768U);
/* Enable 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
/* Use free 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
/* Set XTAL 24MHz clock frequency. */
CLOCK_SetXtalFreq(24000000U);
/* Enable XTAL 24MHz clock source. */
CLOCK_InitExternalClk(0);
/* Enable internal RC. */
CLOCK_InitRcOsc24M();
/* Switch clock source to external OSC. */
CLOCK_SwitchOsc(kCLOCK_XtalOsc);
/* Set Oscillator ready counter value. */
CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
/* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
/* Setting the VDD_SOC to 1.275V. It is necessary to config AHB to 600Mhz. */
DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x13);
/* Waiting for DCDC_STS_DC_OK bit is asserted */
while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
{
}
/* Set AHB_PODF. */
CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
/* Disable IPG clock gate. */
CLOCK_DisableClock(kCLOCK_Adc1);
CLOCK_DisableClock(kCLOCK_Adc2);
CLOCK_DisableClock(kCLOCK_Xbar1);
CLOCK_DisableClock(kCLOCK_Xbar2);
CLOCK_DisableClock(kCLOCK_Xbar3);
/* Set IPG_PODF. */
CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
/* Set ARM_PODF. */
CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
/* Set PERIPH_CLK2_PODF. */
CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
/* Disable PERCLK clock gate. */
CLOCK_DisableClock(kCLOCK_Gpt1);
CLOCK_DisableClock(kCLOCK_Gpt1S);
CLOCK_DisableClock(kCLOCK_Gpt2);
CLOCK_DisableClock(kCLOCK_Gpt2S);
CLOCK_DisableClock(kCLOCK_Pit);
/* Set PERCLK_PODF. */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
/* Disable USDHC1 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc1);
/* Set USDHC1_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
/* Set Usdhc1 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
/* Disable USDHC2 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc2);
/* Set USDHC2_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
/* Set Usdhc2 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
/* Disable Semc clock gate. */
CLOCK_DisableClock(kCLOCK_Semc);
/* Set SEMC_PODF. */
CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
/* Set Semc alt clock source. */
CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
/* Set Semc clock source. */
CLOCK_SetMux(kCLOCK_SemcMux, 0);
#endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
#endif
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
/* Disable CSI clock gate. */
CLOCK_DisableClock(kCLOCK_Csi);
/* Set CSI_PODF. */
CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
/* Set Csi clock source. */
CLOCK_SetMux(kCLOCK_CsiMux, 0);
/* Disable LPSPI clock gate. */
CLOCK_DisableClock(kCLOCK_Lpspi1);
CLOCK_DisableClock(kCLOCK_Lpspi2);
CLOCK_DisableClock(kCLOCK_Lpspi3);
CLOCK_DisableClock(kCLOCK_Lpspi4);
/* Set LPSPI_PODF. */
CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
/* Set Lpspi clock source. */
CLOCK_SetMux(kCLOCK_LpspiMux, 2);
/* Disable TRACE clock gate. */
CLOCK_DisableClock(kCLOCK_Trace);
/* Set TRACE_PODF. */
CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
/* Set Trace clock source. */
CLOCK_SetMux(kCLOCK_TraceMux, 0);
/* Disable SAI1 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai1);
/* Set SAI1_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
/* Set SAI1_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
/* Set Sai1 clock source. */
CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
/* Disable SAI2 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai2);
/* Set SAI2_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
/* Set SAI2_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
/* Set Sai2 clock source. */
CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
/* Disable SAI3 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai3);
/* Set SAI3_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
/* Set SAI3_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
/* Set Sai3 clock source. */
CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
/* Disable Lpi2c clock gate. */
CLOCK_DisableClock(kCLOCK_Lpi2c1);
CLOCK_DisableClock(kCLOCK_Lpi2c2);
CLOCK_DisableClock(kCLOCK_Lpi2c3);
/* Set LPI2C_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
/* Set Lpi2c clock source. */
CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
/* Disable CAN clock gate. */
CLOCK_DisableClock(kCLOCK_Can1);
CLOCK_DisableClock(kCLOCK_Can2);
CLOCK_DisableClock(kCLOCK_Can3);
CLOCK_DisableClock(kCLOCK_Can1S);
CLOCK_DisableClock(kCLOCK_Can2S);
CLOCK_DisableClock(kCLOCK_Can3S);
/* Set CAN_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_CanDiv, 1);
/* Set Can clock source. */
CLOCK_SetMux(kCLOCK_CanMux, 2);
/* Disable UART clock gate. */
CLOCK_DisableClock(kCLOCK_Lpuart1);
CLOCK_DisableClock(kCLOCK_Lpuart2);
CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4);
CLOCK_DisableClock(kCLOCK_Lpuart5);
CLOCK_DisableClock(kCLOCK_Lpuart6);
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */
CLOCK_DisableClock(kCLOCK_LcdPixel);
/* Set LCDIF_PRED. */
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
/* Set LCDIF_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
/* Set Lcdif pre clock source. */
CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
/* Disable SPDIF clock gate. */
CLOCK_DisableClock(kCLOCK_Spdif);
/* Set SPDIF0_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
/* Set SPDIF0_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
/* Set Spdif clock source. */
CLOCK_SetMux(kCLOCK_SpdifMux, 3);
/* Disable Flexio1 clock gate. */
CLOCK_DisableClock(kCLOCK_Flexio1);
/* Set FLEXIO1_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
/* Set FLEXIO1_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
/* Set Flexio1 clock source. */
CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
/* Disable Flexio2 clock gate. */
CLOCK_DisableClock(kCLOCK_Flexio2);
/* Set FLEXIO2_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
/* Set FLEXIO2_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
/* Set Flexio2 clock source. */
CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
/* Set Pll3 sw clock source. */
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
#warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
#endif
/* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
#endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Init Usb1 PLL. */
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
/* Init Usb1 pfd0. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
/* Init Usb1 pfd1. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
/* Init Usb1 pfd2. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
/* Init Usb1 pfd3. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif
/* DeInit Audio PLL. */
CLOCK_DeinitAudioPll();
/* Bypass Audio PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
/* Set divider for Audio PLL. */
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
/* Enable Audio PLL output. */
CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
/* Init Video PLL. */
uint32_t pllVideo;
/* Disable Video PLL output before initial Video PLL. */
CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
/* Bypass PLL first */
CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
CCM_ANALOG->PLL_VIDEO = pllVideo;
while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
{
}
/* Disable bypass for Video PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
/* Init Enet PLL. */
CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
/* DeInit Usb2 PLL. */
CLOCK_DeinitUsb2Pll();
/* Bypass Usb2 PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1);
/* Enable Usb2 PLL output. */
CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK;
/* Set preperiph clock source. */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
/* Set periph clock source. */
CLOCK_SetMux(kCLOCK_PeriphMux, 0);
/* Set periph clock2 clock source. */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
/* Set per clock source. */
CLOCK_SetMux(kCLOCK_PerclkMux, 0);
/* Set lvds1 clock source. */
CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
/* Set clock out1 divider. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
/* Set clock out1 source. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
/* Set clock out2 divider. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
/* Set clock out2 source. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
/* Set clock out1 drives clock out1. */
CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
/* Disable clock out1. */
CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
/* Disable clock out2. */
CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
/* Set SAI1 MCLK1 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
/* Set SAI1 MCLK2 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
/* Set SAI1 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
/* Set SAI2 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
/* Set SAI3 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
/* Set MQS configuration. */
IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
/* Set ENET Ref clock source. */
IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
/* Set ENET2 Ref clock source. */
IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
/* Set GPT1 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
/* Set GPT2 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
}
/*******************************************************************************
******************* Configuration BOARD_BootClockRUN_528M *********************
******************************************************************************/
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!Configuration
name: BOARD_BootClockRUN_528M
outputs:
- {id: AHB_CLK_ROOT.outFreq, value: 528 MHz}
- {id: CAN_CLK_ROOT.outFreq, value: 40 MHz}
- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
- {id: CLK_1M.outFreq, value: 1 MHz}
- {id: CLK_24M.outFreq, value: 24 MHz}
- {id: CSI_CLK_ROOT.outFreq, value: 12 MHz}
- {id: ENET2_125M_CLK.outFreq, value: 1.2 MHz}
- {id: ENET_125M_CLK.outFreq, value: 2.4 MHz}
- {id: ENET_25M_REF_CLK.outFreq, value: 1.2 MHz}
- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXIO2_CLK_ROOT.outFreq, value: 30 MHz}
- {id: FLEXSPI2_CLK_ROOT.outFreq, value: 1440/11 MHz}
- {id: FLEXSPI_CLK_ROOT.outFreq, value: 1440/11 MHz}
- {id: GPT1_ipg_clk_highfreq.outFreq, value: 66 MHz}
- {id: GPT2_ipg_clk_highfreq.outFreq, value: 66 MHz}
- {id: IPG_CLK_ROOT.outFreq, value: 132 MHz}
- {id: LCDIF_CLK_ROOT.outFreq, value: 67.5 MHz}
- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
- {id: LVDS1_CLK.outFreq, value: 1.2 GHz}
- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
- {id: PERCLK_CLK_ROOT.outFreq, value: 66 MHz}
- {id: PLL7_MAIN_CLK.outFreq, value: 24 MHz}
- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
- {id: SAI2_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI2_MCLK3.outFreq, value: 30 MHz}
- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
- {id: SEMC_CLK_ROOT.outFreq, value: 66 MHz}
- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
- {id: USDHC1_CLK_ROOT.outFreq, value: 198 MHz}
- {id: USDHC2_CLK_ROOT.outFreq, value: 198 MHz}
settings:
- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
- {id: CCM.ARM_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI2_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI2_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.FLEXSPI_PODF.scale, value: '2', locked: true}
- {id: CCM.FLEXSPI_SEL.sel, value: CCM_ANALOG.PLL3_PFD0_CLK}
- {id: CCM.LCDIF_PODF.scale, value: '4', locked: true}
- {id: CCM.LCDIF_PRED.scale, value: '2', locked: true}
- {id: CCM.LPSPI_PODF.scale, value: '5', locked: true}
- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
- {id: CCM.SEMC_PODF.scale, value: '8'}
- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
- {id: CCM.TRACE_PODF.scale, value: '4', locked: true}
- {id: CCM_ANALOG.PLL1_BYPASS.sel, value: CCM_ANALOG.PLL1}
- {id: CCM_ANALOG.PLL1_PREDIV.scale, value: '1', locked: true}
- {id: CCM_ANALOG.PLL1_VDIV.scale, value: '50', locked: true}
- {id: CCM_ANALOG.PLL2.denom, value: '1', locked: true}
- {id: CCM_ANALOG.PLL2.num, value: '0', locked: true}
- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '33', locked: true}
- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
- {id: CCM_ANALOG.PLL4.denom, value: '50'}
- {id: CCM_ANALOG.PLL4.div, value: '47'}
- {id: CCM_ANALOG.PLL5.denom, value: '1'}
- {id: CCM_ANALOG.PLL5.div, value: '31', locked: true}
- {id: CCM_ANALOG.PLL5.num, value: '0'}
- {id: CCM_ANALOG.PLL5_BYPASS.sel, value: CCM_ANALOG.PLL5_POST_DIV}
- {id: CCM_ANALOG.PLL5_POST_DIV.scale, value: '2', locked: true}
- {id: CCM_ANALOG.VIDEO_DIV.scale, value: '4', locked: true}
- {id: CCM_ANALOG_PLL_ENET_POWERDOWN_CFG, value: 'Yes'}
- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
- {id: CCM_ANALOG_PLL_VIDEO_POWERDOWN_CFG, value: 'No'}
sources:
- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/*******************************************************************************
* Variables for BOARD_BootClockRUN_528M configuration
******************************************************************************/
const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN_528M =
{
.loopDivider = 100, /* PLL loop divider, Fout = Fin * 50 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN_528M =
{
.loopDivider = 1, /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
.numerator = 0, /* 30 bit numerator of fractional loop divider */
.denominator = 1, /* 30 bit denominator of fractional loop divider */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN_528M =
{
.loopDivider = 0, /* PLL loop divider, Fout = Fin * 20 */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN_528M =
{
.loopDivider = 31, /* PLL loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.postDivider = 8, /* Divider after PLL */
.numerator = 0, /* 30 bit numerator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.denominator = 1, /* 30 bit denominator of fractional loop divider, Fout = Fin * ( loopDivider + numerator / denominator ) */
.src = 0, /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
};
/*******************************************************************************
* Code for BOARD_BootClockRUN_528M configuration
******************************************************************************/
void BOARD_BootClockRUN_528M(void)
{
/* Init RTC OSC clock frequency. */
CLOCK_SetRtcXtalFreq(32768U);
/* Enable 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
/* Use free 1MHz clock output. */
XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
/* Set XTAL 24MHz clock frequency. */
CLOCK_SetXtalFreq(24000000U);
/* Enable XTAL 24MHz clock source. */
CLOCK_InitExternalClk(0);
/* Enable internal RC. */
CLOCK_InitRcOsc24M();
/* Switch clock source to external OSC. */
CLOCK_SwitchOsc(kCLOCK_XtalOsc);
/* Set Oscillator ready counter value. */
CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
/* Setting PeriphClk2Mux and PeriphMux to provide stable clock before PLLs are initialed */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 1); /* Set PERIPH_CLK2 MUX to OSC */
CLOCK_SetMux(kCLOCK_PeriphMux, 1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
/* Set AHB_PODF. */
CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
/* Disable IPG clock gate. */
CLOCK_DisableClock(kCLOCK_Adc1);
CLOCK_DisableClock(kCLOCK_Adc2);
CLOCK_DisableClock(kCLOCK_Xbar1);
CLOCK_DisableClock(kCLOCK_Xbar2);
CLOCK_DisableClock(kCLOCK_Xbar3);
/* Set IPG_PODF. */
CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
/* Set ARM_PODF. */
CLOCK_SetDiv(kCLOCK_ArmDiv, 1);
/* Set PERIPH_CLK2_PODF. */
CLOCK_SetDiv(kCLOCK_PeriphClk2Div, 0);
/* Disable PERCLK clock gate. */
CLOCK_DisableClock(kCLOCK_Gpt1);
CLOCK_DisableClock(kCLOCK_Gpt1S);
CLOCK_DisableClock(kCLOCK_Gpt2);
CLOCK_DisableClock(kCLOCK_Gpt2S);
CLOCK_DisableClock(kCLOCK_Pit);
/* Set PERCLK_PODF. */
CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
/* Disable USDHC1 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc1);
/* Set USDHC1_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1);
/* Set Usdhc1 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc1Mux, 0);
/* Disable USDHC2 clock gate. */
CLOCK_DisableClock(kCLOCK_Usdhc2);
/* Set USDHC2_PODF. */
CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1);
/* Set Usdhc2 clock source. */
CLOCK_SetMux(kCLOCK_Usdhc2Mux, 0);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
/* Disable Semc clock gate. */
CLOCK_DisableClock(kCLOCK_Semc);
/* Set SEMC_PODF. */
CLOCK_SetDiv(kCLOCK_SemcDiv, 7);
/* Set Semc alt clock source. */
CLOCK_SetMux(kCLOCK_SemcAltMux, 0);
/* Set Semc clock source. */
CLOCK_SetMux(kCLOCK_SemcMux, 0);
#endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Disable Flexspi clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi);
/* Set FLEXSPI_PODF. */
CLOCK_SetDiv(kCLOCK_FlexspiDiv, 1);
/* Set Flexspi clock source. */
CLOCK_SetMux(kCLOCK_FlexspiMux, 3);
#endif
/* Disable Flexspi2 clock gate. */
CLOCK_DisableClock(kCLOCK_FlexSpi2);
/* Set FLEXSPI2_PODF. */
CLOCK_SetDiv(kCLOCK_Flexspi2Div, 1);
/* Set Flexspi2 clock source. */
CLOCK_SetMux(kCLOCK_Flexspi2Mux, 1);
/* Disable CSI clock gate. */
CLOCK_DisableClock(kCLOCK_Csi);
/* Set CSI_PODF. */
CLOCK_SetDiv(kCLOCK_CsiDiv, 1);
/* Set Csi clock source. */
CLOCK_SetMux(kCLOCK_CsiMux, 0);
/* Disable LPSPI clock gate. */
CLOCK_DisableClock(kCLOCK_Lpspi1);
CLOCK_DisableClock(kCLOCK_Lpspi2);
CLOCK_DisableClock(kCLOCK_Lpspi3);
CLOCK_DisableClock(kCLOCK_Lpspi4);
/* Set LPSPI_PODF. */
CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
/* Set Lpspi clock source. */
CLOCK_SetMux(kCLOCK_LpspiMux, 2);
/* Disable TRACE clock gate. */
CLOCK_DisableClock(kCLOCK_Trace);
/* Set TRACE_PODF. */
CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
/* Set Trace clock source. */
CLOCK_SetMux(kCLOCK_TraceMux, 0);
/* Disable SAI1 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai1);
/* Set SAI1_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
/* Set SAI1_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
/* Set Sai1 clock source. */
CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
/* Disable SAI2 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai2);
/* Set SAI2_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai2PreDiv, 3);
/* Set SAI2_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai2Div, 1);
/* Set Sai2 clock source. */
CLOCK_SetMux(kCLOCK_Sai2Mux, 0);
/* Disable SAI3 clock gate. */
CLOCK_DisableClock(kCLOCK_Sai3);
/* Set SAI3_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
/* Set SAI3_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
/* Set Sai3 clock source. */
CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
/* Disable Lpi2c clock gate. */
CLOCK_DisableClock(kCLOCK_Lpi2c1);
CLOCK_DisableClock(kCLOCK_Lpi2c2);
CLOCK_DisableClock(kCLOCK_Lpi2c3);
/* Set LPI2C_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
/* Set Lpi2c clock source. */
CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
/* Disable CAN clock gate. */
CLOCK_DisableClock(kCLOCK_Can1);
CLOCK_DisableClock(kCLOCK_Can2);
CLOCK_DisableClock(kCLOCK_Can3);
CLOCK_DisableClock(kCLOCK_Can1S);
CLOCK_DisableClock(kCLOCK_Can2S);
CLOCK_DisableClock(kCLOCK_Can3S);
/* Set CAN_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_CanDiv, 1);
/* Set Can clock source. */
CLOCK_SetMux(kCLOCK_CanMux, 2);
/* Disable UART clock gate. */
CLOCK_DisableClock(kCLOCK_Lpuart1);
CLOCK_DisableClock(kCLOCK_Lpuart2);
CLOCK_DisableClock(kCLOCK_Lpuart3);
CLOCK_DisableClock(kCLOCK_Lpuart4);
CLOCK_DisableClock(kCLOCK_Lpuart5);
CLOCK_DisableClock(kCLOCK_Lpuart6);
CLOCK_DisableClock(kCLOCK_Lpuart7);
CLOCK_DisableClock(kCLOCK_Lpuart8);
/* Set UART_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_UartDiv, 0);
/* Set Uart clock source. */
CLOCK_SetMux(kCLOCK_UartMux, 0);
/* Disable LCDIF clock gate. */
CLOCK_DisableClock(kCLOCK_LcdPixel);
/* Set LCDIF_PRED. */
CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 1);
/* Set LCDIF_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_LcdifDiv, 3);
/* Set Lcdif pre clock source. */
CLOCK_SetMux(kCLOCK_LcdifPreMux, 5);
/* Disable SPDIF clock gate. */
CLOCK_DisableClock(kCLOCK_Spdif);
/* Set SPDIF0_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
/* Set SPDIF0_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
/* Set Spdif clock source. */
CLOCK_SetMux(kCLOCK_SpdifMux, 3);
/* Disable Flexio1 clock gate. */
CLOCK_DisableClock(kCLOCK_Flexio1);
/* Set FLEXIO1_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
/* Set FLEXIO1_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
/* Set Flexio1 clock source. */
CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
/* Disable Flexio2 clock gate. */
CLOCK_DisableClock(kCLOCK_Flexio2);
/* Set FLEXIO2_CLK_PRED. */
CLOCK_SetDiv(kCLOCK_Flexio2PreDiv, 1);
/* Set FLEXIO2_CLK_PODF. */
CLOCK_SetDiv(kCLOCK_Flexio2Div, 7);
/* Set Flexio2 clock source. */
CLOCK_SetMux(kCLOCK_Flexio2Mux, 3);
/* Set Pll3 sw clock source. */
CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
/* Init ARM PLL. */
CLOCK_InitArmPll(&armPllConfig_BOARD_BootClockRUN_528M);
/* In SDK projects, SDRAM (configured by SEMC) will be initialized in either debug script or dcd.
* With this macro SKIP_SYSCLK_INIT, system pll (selected to be SEMC source clock in SDK projects) will be left unchanged.
* Note: If another clock source is selected for SEMC, user may want to avoid changing that clock as well.*/
#ifndef SKIP_SYSCLK_INIT
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
#warning "SKIP_SYSCLK_INIT should be defined to keep system pll (selected to be SEMC source clock in SDK projects) unchanged."
#endif
/* Init System PLL. */
CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN_528M);
/* Init System pfd0. */
CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
/* Init System pfd1. */
CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
/* Init System pfd2. */
CLOCK_InitSysPfd(kCLOCK_Pfd2, 24);
/* Init System pfd3. */
CLOCK_InitSysPfd(kCLOCK_Pfd3, 16);
#endif
/* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
* With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
* Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
/* Init Usb1 PLL. */
CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN_528M);
/* Init Usb1 pfd0. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 33);
/* Init Usb1 pfd1. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
/* Init Usb1 pfd2. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
/* Init Usb1 pfd3. */
CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 19);
/* Disable Usb1 PLL output for USBPHY1. */
CCM_ANALOG->PLL_USB1 &= ~CCM_ANALOG_PLL_USB1_EN_USB_CLKS_MASK;
#endif
/* DeInit Audio PLL. */
CLOCK_DeinitAudioPll();
/* Bypass Audio PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
/* Set divider for Audio PLL. */
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
/* Enable Audio PLL output. */
CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
/* Init Video PLL. */
uint32_t pllVideo;
/* Disable Video PLL output before initial Video PLL. */
CCM_ANALOG->PLL_VIDEO &= ~CCM_ANALOG_PLL_VIDEO_ENABLE_MASK;
/* Bypass PLL first */
CCM_ANALOG->PLL_VIDEO = (CCM_ANALOG->PLL_VIDEO & (~CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC_MASK)) |
CCM_ANALOG_PLL_VIDEO_BYPASS_MASK | CCM_ANALOG_PLL_VIDEO_BYPASS_CLK_SRC(0);
CCM_ANALOG->PLL_VIDEO_NUM = CCM_ANALOG_PLL_VIDEO_NUM_A(0);
CCM_ANALOG->PLL_VIDEO_DENOM = CCM_ANALOG_PLL_VIDEO_DENOM_B(1);
pllVideo = (CCM_ANALOG->PLL_VIDEO & (~(CCM_ANALOG_PLL_VIDEO_DIV_SELECT_MASK | CCM_ANALOG_PLL_VIDEO_POWERDOWN_MASK))) |
CCM_ANALOG_PLL_VIDEO_ENABLE_MASK |CCM_ANALOG_PLL_VIDEO_DIV_SELECT(31);
pllVideo |= CCM_ANALOG_PLL_VIDEO_POST_DIV_SELECT(1);
CCM_ANALOG->MISC2 = (CCM_ANALOG->MISC2 & (~CCM_ANALOG_MISC2_VIDEO_DIV_MASK)) | CCM_ANALOG_MISC2_VIDEO_DIV(3);
CCM_ANALOG->PLL_VIDEO = pllVideo;
while ((CCM_ANALOG->PLL_VIDEO & CCM_ANALOG_PLL_VIDEO_LOCK_MASK) == 0)
{
}
/* Disable bypass for Video PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllVideo, 0);
/* DeInit Enet PLL. */
CLOCK_DeinitEnetPll();
/* Bypass Enet PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllEnet, 1);
/* Set Enet output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_DIV_SELECT(1);
/* Enable Enet output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENABLE_MASK;
/* Set Enet2 output divider. */
CCM_ANALOG->PLL_ENET = (CCM_ANALOG->PLL_ENET & (~CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT_MASK)) | CCM_ANALOG_PLL_ENET_ENET2_DIV_SELECT(0);
/* Enable Enet2 output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET2_REF_EN_MASK;
/* Enable Enet25M output. */
CCM_ANALOG->PLL_ENET |= CCM_ANALOG_PLL_ENET_ENET_25M_REF_EN_MASK;
/* DeInit Usb2 PLL. */
CLOCK_DeinitUsb2Pll();
/* Bypass Usb2 PLL. */
CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllUsb2, 1);
/* Enable Usb2 PLL output. */
CCM_ANALOG->PLL_USB2 |= CCM_ANALOG_PLL_USB2_ENABLE_MASK;
/* Set preperiph clock source. */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 0);
/* Set periph clock source. */
CLOCK_SetMux(kCLOCK_PeriphMux, 0);
/* Set periph clock2 clock source. */
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
/* Set per clock source. */
CLOCK_SetMux(kCLOCK_PerclkMux, 0);
/* Set lvds1 clock source. */
CCM_ANALOG->MISC1 = (CCM_ANALOG->MISC1 & (~CCM_ANALOG_MISC1_LVDS1_CLK_SEL_MASK)) | CCM_ANALOG_MISC1_LVDS1_CLK_SEL(0);
/* Set clock out1 divider. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
/* Set clock out1 source. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
/* Set clock out2 divider. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
/* Set clock out2 source. */
CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
/* Set clock out1 drives clock out1. */
CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
/* Disable clock out1. */
CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
/* Disable clock out2. */
CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
/* Set SAI1 MCLK1 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
/* Set SAI1 MCLK2 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
/* Set SAI1 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
/* Set SAI2 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI2MClk3Sel, 0);
/* Set SAI3 MCLK3 clock source. */
IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
/* Set MQS configuration. */
IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
/* Set ENET Ref clock source. */
IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET1_TX_CLK_DIR_MASK;
/* Set ENET2 Ref clock source. */
IOMUXC_GPR->GPR1 &= ~IOMUXC_GPR_GPR1_ENET2_TX_CLK_DIR_MASK;
/* Set GPT1 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
/* Set GPT2 High frequency reference clock source. */
IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
/* Set SystemCoreClock variable. */
SystemCoreClock = BOARD_BOOTCLOCKRUN_528M_CORE_CLOCK;
}

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@ -0,0 +1,214 @@
#ifndef _CLOCK_CONFIG_H_
#define _CLOCK_CONFIG_H_
#include "fsl_common.h"
/*******************************************************************************
* Definitions
******************************************************************************/
#define BOARD_XTAL0_CLK_HZ 24000000U /*!< Board xtal0 frequency in Hz */
#define BOARD_XTAL32K_CLK_HZ 32768U /*!< Board xtal32k frequency in Hz */
/*******************************************************************************
************************ BOARD_InitBootClocks function ************************
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes default configuration of clocks.
*
*/
void BOARD_InitBootClocks(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
********************** Configuration BOARD_BootClockRUN ***********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockRUN configuration
******************************************************************************/
#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 600000000U /*!< Core clock frequency: 600000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT 600000000UL /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXIO3, FLEXSPI, FLEXSPI2, GPIO6, GPIO7, GPIO8, GPIO9 */
#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT 40000000UL /* Clock consumers of CAN_CLK_ROOT output : CAN1, CAN2, CAN3 */
#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT 32768UL /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, TSC, USB1, USB2, WDOG1, WDOG2 */
#define BOARD_BOOTCLOCKRUN_CLKO1_CLK 0UL /* Clock consumers of CLKO1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLKO2_CLK 0UL /* Clock consumers of CLKO2_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_CLK_1M 1000000UL /* Clock consumers of CLK_1M output : EWM, RTWDOG */
#define BOARD_BOOTCLOCKRUN_CLK_24M 24000000UL /* Clock consumers of CLK_24M output : GPT1, GPT2 */
#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT 12000000UL /* Clock consumers of CSI_CLK_ROOT output : CSI */
#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK 25000000UL /* Clock consumers of ENET2_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK 0UL /* Clock consumers of ENET2_REF_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK 0UL /* Clock consumers of ENET2_TX_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK 50000000UL /* Clock consumers of ENET_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK 25000000UL /* Clock consumers of ENET_25M_REF_CLK output : ENET, ENET2 */
#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK 0UL /* Clock consumers of ENET_REF_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK 0UL /* Clock consumers of ENET_TX_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO2_CLK_ROOT output : FLEXIO2, FLEXIO3 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI2_CLK_ROOT output : FLEXSPI2 */
#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ 75000000UL /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ 75000000UL /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT 150000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CAN3, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, ENET2, EWM, FLEXIO1, FLEXIO2, FLEXIO3, FLEXRAM, FLEXSPI, FLEXSPI2, GPC, GPIO1, GPIO10, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, NVIC, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT 67500000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
#define BOARD_BOOTCLOCKRUN_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT 75000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK 24000000UL /* Clock consumers of PLL7_MAIN_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT 63529411UL /* Clock consumers of SAI1_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1 63529411UL /* Clock consumers of SAI1_MCLK1 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2 63529411UL /* Clock consumers of SAI1_MCLK2 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3 30000000UL /* Clock consumers of SAI1_MCLK3 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT 63529411UL /* Clock consumers of SAI2_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1 63529411UL /* Clock consumers of SAI2_MCLK1 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2 0UL /* Clock consumers of SAI2_MCLK2 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3 30000000UL /* Clock consumers of SAI2_MCLK3 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT 63529411UL /* Clock consumers of SAI3_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1 63529411UL /* Clock consumers of SAI3_MCLK1 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2 0UL /* Clock consumers of SAI3_MCLK2 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3 30000000UL /* Clock consumers of SAI3_MCLK3 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT 75000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT 132000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK 0UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */
#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT 198000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT 198000000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
/*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
*/
extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN;
/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
*/
extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
*/
extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
/*! @brief Video PLL set for BOARD_BootClockRUN configuration.
*/
extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN;
/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
*/
extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
/*******************************************************************************
* API for BOARD_BootClockRUN configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockRUN(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
/*******************************************************************************
******************* Configuration BOARD_BootClockRUN_528M *********************
******************************************************************************/
/*******************************************************************************
* Definitions for BOARD_BootClockRUN_528M configuration
******************************************************************************/
#define BOARD_BOOTCLOCKRUN_528M_CORE_CLOCK 528000000U /*!< Core clock frequency: 528000000Hz */
/* Clock outputs (values are in Hz): */
#define BOARD_BOOTCLOCKRUN_528M_AHB_CLK_ROOT 528000000UL /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXIO3, FLEXSPI, FLEXSPI2, GPIO6, GPIO7, GPIO8, GPIO9 */
#define BOARD_BOOTCLOCKRUN_528M_CAN_CLK_ROOT 40000000UL /* Clock consumers of CAN_CLK_ROOT output : CAN1, CAN2, CAN3 */
#define BOARD_BOOTCLOCKRUN_528M_CKIL_SYNC_CLK_ROOT 32768UL /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, TSC, USB1, USB2, WDOG1, WDOG2 */
#define BOARD_BOOTCLOCKRUN_528M_CLKO1_CLK 0UL /* Clock consumers of CLKO1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_CLKO2_CLK 0UL /* Clock consumers of CLKO2_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_CLK_1M 1000000UL /* Clock consumers of CLK_1M output : EWM, RTWDOG */
#define BOARD_BOOTCLOCKRUN_528M_CLK_24M 24000000UL /* Clock consumers of CLK_24M output : GPT1, GPT2 */
#define BOARD_BOOTCLOCKRUN_528M_CSI_CLK_ROOT 12000000UL /* Clock consumers of CSI_CLK_ROOT output : CSI */
#define BOARD_BOOTCLOCKRUN_528M_ENET2_125M_CLK 1200000UL /* Clock consumers of ENET2_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_ENET2_REF_CLK 0UL /* Clock consumers of ENET2_REF_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_528M_ENET2_TX_CLK 0UL /* Clock consumers of ENET2_TX_CLK output : ENET2 */
#define BOARD_BOOTCLOCKRUN_528M_ENET_125M_CLK 2400000UL /* Clock consumers of ENET_125M_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_ENET_25M_REF_CLK 1200000UL /* Clock consumers of ENET_25M_REF_CLK output : ENET, ENET2 */
#define BOARD_BOOTCLOCKRUN_528M_ENET_REF_CLK 0UL /* Clock consumers of ENET_REF_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_528M_ENET_TX_CLK 0UL /* Clock consumers of ENET_TX_CLK output : ENET */
#define BOARD_BOOTCLOCKRUN_528M_FLEXIO1_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
#define BOARD_BOOTCLOCKRUN_528M_FLEXIO2_CLK_ROOT 30000000UL /* Clock consumers of FLEXIO2_CLK_ROOT output : FLEXIO2, FLEXIO3 */
#define BOARD_BOOTCLOCKRUN_528M_FLEXSPI2_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI2_CLK_ROOT output : FLEXSPI2 */
#define BOARD_BOOTCLOCKRUN_528M_FLEXSPI_CLK_ROOT 130909090UL /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
#define BOARD_BOOTCLOCKRUN_528M_GPT1_IPG_CLK_HIGHFREQ 66000000UL /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
#define BOARD_BOOTCLOCKRUN_528M_GPT2_IPG_CLK_HIGHFREQ 66000000UL /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
#define BOARD_BOOTCLOCKRUN_528M_IPG_CLK_ROOT 132000000UL /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CAN3, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, ENET2, EWM, FLEXIO1, FLEXIO2, FLEXIO3, FLEXRAM, FLEXSPI, FLEXSPI2, GPC, GPIO1, GPIO10, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, NVIC, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
#define BOARD_BOOTCLOCKRUN_528M_LCDIF_CLK_ROOT 67500000UL /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
#define BOARD_BOOTCLOCKRUN_528M_LPI2C_CLK_ROOT 60000000UL /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
#define BOARD_BOOTCLOCKRUN_528M_LPSPI_CLK_ROOT 105600000UL /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
#define BOARD_BOOTCLOCKRUN_528M_LVDS1_CLK 1200000000UL /* Clock consumers of LVDS1_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_MQS_MCLK 63529411UL /* Clock consumers of MQS_MCLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_PERCLK_CLK_ROOT 66000000UL /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
#define BOARD_BOOTCLOCKRUN_528M_PLL7_MAIN_CLK 24000000UL /* Clock consumers of PLL7_MAIN_CLK output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_SAI1_CLK_ROOT 63529411UL /* Clock consumers of SAI1_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_SAI1_MCLK1 63529411UL /* Clock consumers of SAI1_MCLK1 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_528M_SAI1_MCLK2 63529411UL /* Clock consumers of SAI1_MCLK2 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_528M_SAI1_MCLK3 30000000UL /* Clock consumers of SAI1_MCLK3 output : SAI1 */
#define BOARD_BOOTCLOCKRUN_528M_SAI2_CLK_ROOT 63529411UL /* Clock consumers of SAI2_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_SAI2_MCLK1 63529411UL /* Clock consumers of SAI2_MCLK1 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_528M_SAI2_MCLK2 0UL /* Clock consumers of SAI2_MCLK2 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_528M_SAI2_MCLK3 30000000UL /* Clock consumers of SAI2_MCLK3 output : SAI2 */
#define BOARD_BOOTCLOCKRUN_528M_SAI3_CLK_ROOT 63529411UL /* Clock consumers of SAI3_CLK_ROOT output : N/A */
#define BOARD_BOOTCLOCKRUN_528M_SAI3_MCLK1 63529411UL /* Clock consumers of SAI3_MCLK1 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_528M_SAI3_MCLK2 0UL /* Clock consumers of SAI3_MCLK2 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_528M_SAI3_MCLK3 30000000UL /* Clock consumers of SAI3_MCLK3 output : SAI3 */
#define BOARD_BOOTCLOCKRUN_528M_SEMC_CLK_ROOT 66000000UL /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
#define BOARD_BOOTCLOCKRUN_528M_SPDIF0_CLK_ROOT 30000000UL /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_528M_SPDIF0_EXTCLK_OUT 0UL /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
#define BOARD_BOOTCLOCKRUN_528M_TRACE_CLK_ROOT 132000000UL /* Clock consumers of TRACE_CLK_ROOT output : ARM */
#define BOARD_BOOTCLOCKRUN_528M_UART_CLK_ROOT 80000000UL /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
#define BOARD_BOOTCLOCKRUN_528M_USBPHY1_CLK 0UL /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
#define BOARD_BOOTCLOCKRUN_528M_USBPHY2_CLK 0UL /* Clock consumers of USBPHY2_CLK output : USB2 */
#define BOARD_BOOTCLOCKRUN_528M_USDHC1_CLK_ROOT 198000000UL /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
#define BOARD_BOOTCLOCKRUN_528M_USDHC2_CLK_ROOT 198000000UL /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
/*! @brief Arm PLL set for BOARD_BootClockRUN_528M configuration.
*/
extern const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN_528M;
/*! @brief Usb1 PLL set for BOARD_BootClockRUN_528M configuration.
*/
extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN_528M;
/*! @brief Sys PLL for BOARD_BootClockRUN_528M configuration.
*/
extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN_528M;
/*! @brief Video PLL set for BOARD_BootClockRUN_528M configuration.
*/
extern const clock_video_pll_config_t videoPllConfig_BOARD_BootClockRUN_528M;
/*******************************************************************************
* API for BOARD_BootClockRUN_528M configuration
******************************************************************************/
#if defined(__cplusplus)
extern "C" {
#endif /* __cplusplus*/
/*!
* @brief This function executes configuration of clocks.
*
*/
void BOARD_BootClockRUN_528M(void);
#if defined(__cplusplus)
}
#endif /* __cplusplus*/
#endif /* _CLOCK_CONFIG_H_ */

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@ -0,0 +1,308 @@
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#include "dcd.h"
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.xip_board"
#endif
#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
#if defined(XIP_BOOT_HEADER_DCD_ENABLE) && (XIP_BOOT_HEADER_DCD_ENABLE == 1)
#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
__attribute__((section(".boot_hdr.dcd_data"), used))
#elif defined(__ICCARM__)
#pragma location = ".boot_hdr.dcd_data"
#endif
/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
!!GlobalInfo
product: DCDx v3.0
processor: MIMXRT1062xxxxB
package_id: MIMXRT1062DVL6B
mcu_data: ksdk2_0
processor_version: 14.0.1
board: MIMXRT1060-EVKB
output_format: c_array
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
/* COMMENTS BELOW ARE USED AS SETTINGS FOR DCD DATA */
const uint8_t dcd_data[] = {
/* HEADER */
/* Tag */
0xD2,
/* Image Length */
0x04, 0x10,
/* Version */
0x41,
/* COMMANDS */
/* group: 'Imported Commands' */
/* #1.1-113, command header bytes for merged 'Write - value' command */
0xCC, 0x03, 0x8C, 0x04,
/* #1.1, command: write_value, address: CCM_CCGR0, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.2, command: write_value, address: CCM_CCGR1, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.3, command: write_value, address: CCM_CCGR2, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.4, command: write_value, address: CCM_CCGR3, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.5, command: write_value, address: CCM_CCGR4, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.6, command: write_value, address: CCM_CCGR5, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.7, command: write_value, address: CCM_CCGR6, value: 0xFFFFFFFF, size: 4 */
0x40, 0x0F, 0xC0, 0x80, 0xFF, 0xFF, 0xFF, 0xFF,
/* #1.8, command: write_value, address: CCM_ANALOG_PLL_SYS, value: 0x2001, size: 4 */
0x40, 0x0D, 0x80, 0x30, 0x00, 0x00, 0x20, 0x01,
/* #1.9, command: write_value, address: CCM_ANALOG_PFD_528, value: 0x101D101B, size: 4 */
0x40, 0x0D, 0x81, 0x00, 0x10, 0x1D, 0x10, 0x1B,
/* #1.10, command: write_value, address: CCM_CBCDR, value: 0x10D40, size: 4 */
0x40, 0x0F, 0xC0, 0x14, 0x00, 0x01, 0x0D, 0x40,
/* #1.11, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_00, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x14, 0x00, 0x00, 0x00, 0x00,
/* #1.12, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_01, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x18, 0x00, 0x00, 0x00, 0x00,
/* #1.13, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_02, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x1C, 0x00, 0x00, 0x00, 0x00,
/* #1.14, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_03, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x20, 0x00, 0x00, 0x00, 0x00,
/* #1.15, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_04, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x24, 0x00, 0x00, 0x00, 0x00,
/* #1.16, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_05, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x28, 0x00, 0x00, 0x00, 0x00,
/* #1.17, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_06, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x2C, 0x00, 0x00, 0x00, 0x00,
/* #1.18, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_07, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x30, 0x00, 0x00, 0x00, 0x00,
/* #1.19, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_08, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x34, 0x00, 0x00, 0x00, 0x00,
/* #1.20, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_09, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x38, 0x00, 0x00, 0x00, 0x00,
/* #1.21, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_10, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x3C, 0x00, 0x00, 0x00, 0x00,
/* #1.22, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_11, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x40, 0x00, 0x00, 0x00, 0x00,
/* #1.23, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_12, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x44, 0x00, 0x00, 0x00, 0x00,
/* #1.24, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_13, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x48, 0x00, 0x00, 0x00, 0x00,
/* #1.25, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_14, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x4C, 0x00, 0x00, 0x00, 0x00,
/* #1.26, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_15, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x50, 0x00, 0x00, 0x00, 0x00,
/* #1.27, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_16, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x54, 0x00, 0x00, 0x00, 0x00,
/* #1.28, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_17, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x58, 0x00, 0x00, 0x00, 0x00,
/* #1.29, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_18, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x5C, 0x00, 0x00, 0x00, 0x00,
/* #1.30, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_19, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x60, 0x00, 0x00, 0x00, 0x00,
/* #1.31, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_20, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x64, 0x00, 0x00, 0x00, 0x00,
/* #1.32, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_21, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x68, 0x00, 0x00, 0x00, 0x00,
/* #1.33, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_22, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x6C, 0x00, 0x00, 0x00, 0x00,
/* #1.34, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_23, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x70, 0x00, 0x00, 0x00, 0x00,
/* #1.35, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_24, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x74, 0x00, 0x00, 0x00, 0x00,
/* #1.36, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_25, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x78, 0x00, 0x00, 0x00, 0x00,
/* #1.37, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_26, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x7C, 0x00, 0x00, 0x00, 0x00,
/* #1.38, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_27, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00,
/* #1.39, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_28, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x84, 0x00, 0x00, 0x00, 0x00,
/* #1.40, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_29, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x88, 0x00, 0x00, 0x00, 0x00,
/* #1.41, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_30, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x8C, 0x00, 0x00, 0x00, 0x00,
/* #1.42, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_31, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x90, 0x00, 0x00, 0x00, 0x00,
/* #1.43, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_32, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x94, 0x00, 0x00, 0x00, 0x00,
/* #1.44, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_33, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x98, 0x00, 0x00, 0x00, 0x00,
/* #1.45, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_34, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0x9C, 0x00, 0x00, 0x00, 0x00,
/* #1.46, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_35, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0xA0, 0x00, 0x00, 0x00, 0x00,
/* #1.47, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_36, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0xA4, 0x00, 0x00, 0x00, 0x00,
/* #1.48, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_37, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0xA8, 0x00, 0x00, 0x00, 0x00,
/* #1.49, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_38, value: 0x00, size: 4 */
0x40, 0x1F, 0x80, 0xAC, 0x00, 0x00, 0x00, 0x00,
/* #1.50, command: write_value, address: IOMUXC_SW_MUX_CTL_PAD_GPIO_EMC_39, value: 0x10, size: 4 */
0x40, 0x1F, 0x80, 0xB0, 0x00, 0x00, 0x00, 0x10,
/* #1.51, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_00, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x04, 0x00, 0x01, 0x10, 0xF9,
/* #1.52, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_01, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x08, 0x00, 0x01, 0x10, 0xF9,
/* #1.53, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_02, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x0C, 0x00, 0x01, 0x10, 0xF9,
/* #1.54, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_03, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x10, 0x00, 0x01, 0x10, 0xF9,
/* #1.55, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_04, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x14, 0x00, 0x01, 0x10, 0xF9,
/* #1.56, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_05, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x18, 0x00, 0x01, 0x10, 0xF9,
/* #1.57, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_06, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x1C, 0x00, 0x01, 0x10, 0xF9,
/* #1.58, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_07, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x20, 0x00, 0x01, 0x10, 0xF9,
/* #1.59, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_08, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x24, 0x00, 0x01, 0x10, 0xF9,
/* #1.60, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_09, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x28, 0x00, 0x01, 0x10, 0xF9,
/* #1.61, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_10, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x2C, 0x00, 0x01, 0x10, 0xF9,
/* #1.62, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_11, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x30, 0x00, 0x01, 0x10, 0xF9,
/* #1.63, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_12, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x34, 0x00, 0x01, 0x10, 0xF9,
/* #1.64, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_13, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x38, 0x00, 0x01, 0x10, 0xF9,
/* #1.65, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_14, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x3C, 0x00, 0x01, 0x10, 0xF9,
/* #1.66, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_15, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x40, 0x00, 0x01, 0x10, 0xF9,
/* #1.67, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_16, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x44, 0x00, 0x01, 0x10, 0xF9,
/* #1.68, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_17, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x48, 0x00, 0x01, 0x10, 0xF9,
/* #1.69, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_18, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x4C, 0x00, 0x01, 0x10, 0xF9,
/* #1.70, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_19, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x50, 0x00, 0x01, 0x10, 0xF9,
/* #1.71, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_20, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x54, 0x00, 0x01, 0x10, 0xF9,
/* #1.72, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_21, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x58, 0x00, 0x01, 0x10, 0xF9,
/* #1.73, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_22, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x5C, 0x00, 0x01, 0x10, 0xF9,
/* #1.74, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_23, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x60, 0x00, 0x01, 0x10, 0xF9,
/* #1.75, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_24, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x64, 0x00, 0x01, 0x10, 0xF9,
/* #1.76, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_25, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x68, 0x00, 0x01, 0x10, 0xF9,
/* #1.77, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_26, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x6C, 0x00, 0x01, 0x10, 0xF9,
/* #1.78, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_27, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x70, 0x00, 0x01, 0x10, 0xF9,
/* #1.79, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_28, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x74, 0x00, 0x01, 0x10, 0xF9,
/* #1.80, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_29, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x78, 0x00, 0x01, 0x10, 0xF9,
/* #1.81, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_30, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x7C, 0x00, 0x01, 0x10, 0xF9,
/* #1.82, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_31, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x80, 0x00, 0x01, 0x10, 0xF9,
/* #1.83, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_32, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x84, 0x00, 0x01, 0x10, 0xF9,
/* #1.84, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_33, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x88, 0x00, 0x01, 0x10, 0xF9,
/* #1.85, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_34, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x8C, 0x00, 0x01, 0x10, 0xF9,
/* #1.86, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_35, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x90, 0x00, 0x01, 0x10, 0xF9,
/* #1.87, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_36, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x94, 0x00, 0x01, 0x10, 0xF9,
/* #1.88, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_37, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x98, 0x00, 0x01, 0x10, 0xF9,
/* #1.89, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_38, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0x9C, 0x00, 0x01, 0x10, 0xF9,
/* #1.90, command: write_value, address: IOMUXC_SW_PAD_CTL_PAD_GPIO_EMC_39, value: 0x110F9, size: 4 */
0x40, 0x1F, 0x82, 0xA0, 0x00, 0x01, 0x10, 0xF9,
/* #1.91, command: write_value, address: SEMC_MCR, value: 0x10000004, size: 4 */
0x40, 0x2F, 0x00, 0x00, 0x10, 0x00, 0x00, 0x04,
/* #1.92, command: write_value, address: SEMC_BMCR0, value: 0x81, size: 4 */
0x40, 0x2F, 0x00, 0x08, 0x00, 0x00, 0x00, 0x81,
/* #1.93, command: write_value, address: SEMC_BMCR1, value: 0x81, size: 4 */
0x40, 0x2F, 0x00, 0x0C, 0x00, 0x00, 0x00, 0x81,
/* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001B, size: 4 */
0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1B,
/* #1.95, command: write_value, address: SEMC_BR1, value: 0x8200001B, size: 4 */
0x40, 0x2F, 0x00, 0x14, 0x82, 0x00, 0x00, 0x1B,
/* #1.96, command: write_value, address: SEMC_BR2, value: 0x8400001B, size: 4 */
0x40, 0x2F, 0x00, 0x18, 0x84, 0x00, 0x00, 0x1B,
/* #1.97, command: write_value, address: SEMC_BR3, value: 0x8600001B, size: 4 */
0x40, 0x2F, 0x00, 0x1C, 0x86, 0x00, 0x00, 0x1B,
/* #1.98, command: write_value, address: SEMC_BR4, value: 0x90000021, size: 4 */
0x40, 0x2F, 0x00, 0x20, 0x90, 0x00, 0x00, 0x21,
/* #1.99, command: write_value, address: SEMC_BR5, value: 0xA0000019, size: 4 */
0x40, 0x2F, 0x00, 0x24, 0xA0, 0x00, 0x00, 0x19,
/* #1.100, command: write_value, address: SEMC_BR6, value: 0xA8000017, size: 4 */
0x40, 0x2F, 0x00, 0x28, 0xA8, 0x00, 0x00, 0x17,
/* #1.101, command: write_value, address: SEMC_BR7, value: 0xA900001B, size: 4 */
0x40, 0x2F, 0x00, 0x2C, 0xA9, 0x00, 0x00, 0x1B,
/* #1.102, command: write_value, address: SEMC_BR8, value: 0x21, size: 4 */
0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x21,
/* #1.103, command: write_value, address: SEMC_IOCR, value: 0x79A8, size: 4 */
0x40, 0x2F, 0x00, 0x04, 0x00, 0x00, 0x79, 0xA8,
/* #1.104, command: write_value, address: SEMC_SDRAMCR0, value: 0xF31, size: 4 */
0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0F, 0x31,
/* #1.105, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */
0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22,
/* #1.106, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */
0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20,
/* #1.107, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */
0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08,
/* #1.108, command: write_value, address: SEMC_DBICR0, value: 0x21, size: 4 */
0x40, 0x2F, 0x00, 0x80, 0x00, 0x00, 0x00, 0x21,
/* #1.109, command: write_value, address: SEMC_DBICR1, value: 0x888888, size: 4 */
0x40, 0x2F, 0x00, 0x84, 0x00, 0x88, 0x88, 0x88,
/* #1.110, command: write_value, address: SEMC_IPCR1, value: 0x02, size: 4 */
0x40, 0x2F, 0x00, 0x94, 0x00, 0x00, 0x00, 0x02,
/* #1.111, command: write_value, address: SEMC_IPCR2, value: 0x00, size: 4 */
0x40, 0x2F, 0x00, 0x98, 0x00, 0x00, 0x00, 0x00,
/* #1.112, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
/* #1.113, command: write_value, address: SEMC_IPCMD, value: 0xA55A000F, size: 4 */
0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0F,
/* #2, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
/* #3.1-2, command header bytes for merged 'Write - value' command */
0xCC, 0x00, 0x14, 0x04,
/* #3.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
/* #3.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */
0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
/* #4, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
/* #5.1-2, command header bytes for merged 'Write - value' command */
0xCC, 0x00, 0x14, 0x04,
/* #5.1, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
/* #5.2, command: write_value, address: SEMC_IPCMD, value: 0xA55A000C, size: 4 */
0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0C,
/* #6, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
/* #7.1-3, command header bytes for merged 'Write - value' command */
0xCC, 0x00, 0x1C, 0x04,
/* #7.1, command: write_value, address: SEMC_IPTXDAT, value: 0x33, size: 4 */
0x40, 0x2F, 0x00, 0xA0, 0x00, 0x00, 0x00, 0x33,
/* #7.2, command: write_value, address: SEMC_IPCR0, value: 0x80000000, size: 4 */
0x40, 0x2F, 0x00, 0x90, 0x80, 0x00, 0x00, 0x00,
/* #7.3, command: write_value, address: SEMC_IPCMD, value: 0xA55A000A, size: 4 */
0x40, 0x2F, 0x00, 0x9C, 0xA5, 0x5A, 0x00, 0x0A,
/* #8, command: check_any_bit_set, address: SEMC_INTR, value: 0x01, size: 4 */
0xCF, 0x00, 0x0C, 0x1C, 0x40, 0x2F, 0x00, 0x3C, 0x00, 0x00, 0x00, 0x01,
/* #9, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A09, size: 4 */
0xCC, 0x00, 0x0C, 0x04, 0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x09
};
/* BE CAREFUL MODIFYING THIS SETTINGS - IT IS YAML SETTINGS FOR TOOLS */
#else
const uint8_t dcd_data[] = {0x00};
#endif /* XIP_BOOT_HEADER_DCD_ENABLE */
#endif /* XIP_BOOT_HEADER_ENABLE */

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@ -0,0 +1,25 @@
/***********************************************************************************************************************
* This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
* will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
**********************************************************************************************************************/
#ifndef __DCD__
#define __DCD__
#include <stdint.h>
/*! @name Driver version */
/*@{*/
/*! @brief XIP_BOARD driver version 2.0.0. */
#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
/*@}*/
/*************************************
* DCD Data
*************************************/
#define DCD_TAG_HEADER (0xD2)
#define DCD_VERSION (0x41)
#define DCD_TAG_HEADER_SHIFT (24)
#define DCD_ARRAY_SIZE 1
#endif /* __DCD__ */

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