From f5ff7cfcf1db04799bee71608fafc9f08c8171a2 Mon Sep 17 00:00:00 2001 From: cpq Date: Mon, 6 Feb 2023 19:22:43 +0000 Subject: [PATCH] Introduce sysinit.c, better debug log, more verbose Makefile --- .../stm32/nucleo-f746zg-baremetal/Makefile | 31 +++++--- examples/stm32/nucleo-f746zg-baremetal/hal.h | 48 ++++-------- examples/stm32/nucleo-f746zg-baremetal/main.c | 76 ++++++++----------- .../stm32/nucleo-f746zg-baremetal/sysinit.c | 29 +++++++ mip/driver_stm32.c | 16 ++-- mip/mip.c | 37 ++++++--- mip/mip.h | 7 +- mongoose.c | 53 +++++++------ mongoose.h | 7 +- 9 files changed, 169 insertions(+), 135 deletions(-) create mode 100644 examples/stm32/nucleo-f746zg-baremetal/sysinit.c diff --git a/examples/stm32/nucleo-f746zg-baremetal/Makefile b/examples/stm32/nucleo-f746zg-baremetal/Makefile index c788c4d5..3bf3a4a0 100644 --- a/examples/stm32/nucleo-f746zg-baremetal/Makefile +++ b/examples/stm32/nucleo-f746zg-baremetal/Makefile @@ -4,18 +4,31 @@ CMSIS_CORE_REPO ?= https://github.com/ARM-software/CMSIS_5 CMSIS_DEVICE_VERSION ?= v1.2.8 # ST MCU peripheral definitions CMSIS_DEVICE_REPO ?= https://github.com/STMicroelectronics/cmsis_device_f7 -CFLAGS ?= -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion \ - -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion\ - -g3 -Os -ffunction-sections -fdata-sections \ - -I . -I cmsis_core/CMSIS/Core/Include -I cmsis_device_f7/Include \ - -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 $(EXTRA_CFLAGS) +CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion +CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion +CFLAGS += -g3 -Os -ffunction-sections -fdata-sections +CFLAGS += -I. -Icmsis_core/CMSIS/Core/Include -Icmsis_device_f7/Include +CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map -SOURCES = main.c syscalls.c cmsis_device_f7/Source/Templates/gcc/startup_stm32f746xx.s + +SOURCES = main.c syscalls.c sysinit.c + +# Using ST-provided startup file. NOTE: this is compiler-dependant +SOURCES += cmsis_device_f7/Source/Templates/gcc/startup_stm32f746xx.s # Mongoose-specific build flags and source code files # Build options reference: https://mongoose.ws/documentation/#build-options -CFLAGS += -I../../.. -DMG_ARCH=MG_ARCH_NEWLIB -DMG_ENABLE_CUSTOM_MILLIS=1 -DMG_ENABLE_MIP=1 -DMG_ENABLE_PACKED_FS=1 -SOURCES += ../../../mongoose.c ../../device-dashboard/net.c ../../device-dashboard/packed_fs.c +SOURCES += ../../../mongoose.c +SOURCES += ../../device-dashboard/net.c +SOURCES += ../../device-dashboard/packed_fs.c + +CFLAGS += -I../../.. +CFLAGS += -DMG_ARCH=MG_ARCH_NEWLIB +CFLAGS += -DMG_ENABLE_CUSTOM_MILLIS=1 +CFLAGS += -DMG_ENABLE_CUSTOM_RANDOM=1 +CFLAGS += -DMG_ENABLE_MIP=1 +CFLAGS += -DMG_ENABLE_PACKED_FS=1 +CFLAGS += $(CFLAGS_EXTRA) # Build flashable .bin file all build example: firmware.bin @@ -50,7 +63,7 @@ update: firmware.bin # Read serial port on a remote test device for 5 seconds, store in a # temporary file, and check the output for expected patterns -test: EXTRA_CFLAGS += -DUART_DEBUG=UART1 +test: CFLAGS_EXTRA += -DUART_DEBUG=USART1 test: update curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt grep 'READY, IP:' /tmp/output.txt # Check for network init diff --git a/examples/stm32/nucleo-f746zg-baremetal/hal.h b/examples/stm32/nucleo-f746zg-baremetal/hal.h index 1b46528b..4aac3b3f 100644 --- a/examples/stm32/nucleo-f746zg-baremetal/hal.h +++ b/examples/stm32/nucleo-f746zg-baremetal/hal.h @@ -75,7 +75,7 @@ static inline void gpio_output(uint16_t pin) { static inline void irq_exti_attach(uint16_t pin) { uint8_t bank = (uint8_t) (PINBANK(pin)), n = (uint8_t) (PINNO(pin)); - RCC->APB2ENR |= BIT(14); // Enable SYSCFG + RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG SYSCFG->EXTICR[n / 4] &= ~(15UL << ((n % 4) * 4)); SYSCFG->EXTICR[n / 4] |= (uint32_t) (bank << ((n % 4) * 4)); EXTI->IMR |= BIT(n); @@ -86,12 +86,8 @@ static inline void irq_exti_attach(uint16_t pin) { NVIC_EnableIRQ(irqvec); } -#define UART1 USART1 -#define UART2 USART2 -#define UART3 USART3 - #ifndef UART_DEBUG -#define UART_DEBUG UART3 +#define UART_DEBUG USART3 #endif static inline void uart_init(USART_TypeDef *uart, unsigned long baud) { @@ -100,13 +96,13 @@ static inline void uart_init(USART_TypeDef *uart, unsigned long baud) { uint16_t rx = 0, tx = 0; // pins uint32_t freq = 0; // Bus frequency. UART1 is on APB2, rest on APB1 - if (uart == UART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4); - if (uart == UART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17); - if (uart == UART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18); + if (uart == USART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4); + if (uart == USART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17); + if (uart == USART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18); - if (uart == UART1) tx = PIN('A', 9), rx = PIN('A', 10); - if (uart == UART2) tx = PIN('A', 2), rx = PIN('A', 3); - if (uart == UART3) tx = PIN('D', 8), rx = PIN('D', 9); + if (uart == USART1) tx = PIN('A', 9), rx = PIN('A', 10); + if (uart == USART2) tx = PIN('A', 2), rx = PIN('A', 3); + if (uart == USART3) tx = PIN('D', 8), rx = PIN('D', 9); gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af); @@ -128,25 +124,11 @@ static inline uint8_t uart_read_byte(USART_TypeDef *uart) { return (uint8_t) (uart->RDR & 255); } -static inline void clock_init(void) { // Set clock frequency -#if 0 - RCC->APB1ENR |= BIT(28); // Power enable - PWR->CR1 |= 3UL << 14; // Voltage regulator scale 3 - PWR->CR1 |= BIT(16); // Enable overdrive - while ((PWR->CSR1 & BIT(16)) == 0) spin(1); // Wait until done - PWR->CR1 |= BIT(17); // Enable overdrive switching - while ((PWR->CSR1 & BIT(17)) == 0) spin(1); // Wait until done -#endif - SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU - asm("DSB"); - asm("ISB"); - FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9); // Flash latency, prefetch - RCC->PLLCFGR &= ~((BIT(17) - 1)); // Clear PLL multipliers - RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16; // Set PLL_P - RCC->PLLCFGR |= PLL_M | (PLL_N << 6); // Set PLL_M and PLL_N - RCC->CR |= BIT(24); // Enable PLL - while ((RCC->CR & BIT(25)) == 0) spin(1); // Wait until done - RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13); // Set prescalers - RCC->CFGR |= 2; // Set clock source to PLL - while ((RCC->CFGR & 12) == 0) spin(1); // Wait until done +static inline void rng_init(void) { + RCC->AHB2ENR |= RCC_AHB2ENR_RNGEN; + RNG->CR |= RNG_CR_RNGEN; +} +static inline uint32_t rng_read(void) { + while ((RNG->SR & RNG_SR_DRDY) == 0) (void) 0; + return RNG->DR; } diff --git a/examples/stm32/nucleo-f746zg-baremetal/main.c b/examples/stm32/nucleo-f746zg-baremetal/main.c index 4dbfb8fa..8d3e5d6d 100644 --- a/examples/stm32/nucleo-f746zg-baremetal/main.c +++ b/examples/stm32/nucleo-f746zg-baremetal/main.c @@ -4,53 +4,35 @@ #include "hal.h" #include "mongoose.h" -#define LED1 PIN('B', 0) // On-board LED pin (green) -#define LED2 PIN('B', 7) // On-board LED pin (blue) -#define LED3 PIN('B', 14) // On-board LED pin (red) -#define BTN1 PIN('C', 13) // On-board user button +#define LED PIN('B', 7) // On-board LED pin #define BLINK_PERIOD_MS 1000 // LED blinking period in millis -static uint64_t s_ticks, s_exti; // Counters, increased by IRQ handlers - -uint64_t mg_millis(void) { // Declare our own uptime function - return s_ticks; // Return number of milliseconds since boot -} - -void HardFault_Handler(void) { // Escalated fault handler - gpio_output(LED3); // Setup red LED - for (;;) spin(2999999), gpio_toggle(LED3); // Blink LED infinitely -} - +static uint64_t s_ticks; // Milliseconds since boot void SysTick_Handler(void) { // SyStick IRQ handler, triggered every 1ms s_ticks++; } -void EXTI15_10_IRQHandler(void) { // External interrupt handler - s_exti++; - if (EXTI->PR & BIT(PINNO(BTN1))) EXTI->PR = BIT(PINNO(BTN1)); - gpio_write(LED1, gpio_read(BTN1)); // No debounce. Turn LED if button pressed +uint64_t mg_millis(void) { // Let Mongoose use our uptime function + return s_ticks; // Return number of milliseconds since boot } -void SystemInit(void) { // Called automatically by startup code - clock_init(); // Set clock to 180MHz - SysTick_Config(SYS_FREQUENCY / 1000); // Increment s_ticks every ms +void mg_random(void *buf, size_t len) { // Use on-board RNG + for (size_t n = 0; n < len; n += sizeof(uint32_t)) { + uint32_t r = rng_read(); + memcpy((char *) buf + n, &r, n + sizeof(r) > len ? len - n : sizeof(r)); + } } static void timer_fn(void *arg) { - gpio_toggle(LED2); // Blink LED - bool up = ((struct mip_if *) arg)->state == MIP_STATE_READY; - MG_INFO(("Ethernet: %s", up ? "up" : "down")); // Show network status + gpio_toggle(LED); // Blink LED + struct mip_if *ifp = arg; // And show + const char *names[] = {"down", "up", "ready"}; // network stats + MG_INFO(("Ethernet: %s, IP: %M, rx:%u, tx:%u, dr:%u, er:%u", + names[ifp->state], mg_print_ip4, &ifp->ip, ifp->nrecv, ifp->nsent, + ifp->ndropped, ifp->nerr)); } -int main(void) { - gpio_output(LED1); // Setup green LED - gpio_output(LED2); // Setup blue LED - gpio_input(BTN1); // Set button to input - irq_exti_attach(BTN1); // Attach BTN1 to exti - uart_init(UART_DEBUG, 115200); // Initialise debug printf - - MG_INFO(("Starting, CPU freq %g MHz", (double) SYS_FREQUENCY / 1000000)); - +static void ethernet_init(void) { // Initialise Ethernet. Enable MAC GPIO pins, see // https://www.farnell.com/datasheets/2014265.pdf section 6.10 uint16_t pins[] = {PIN('A', 1), PIN('A', 2), PIN('A', 7), @@ -58,25 +40,29 @@ int main(void) { PIN('C', 5), PIN('G', 11), PIN('G', 13)}; for (size_t i = 0; i < sizeof(pins) / sizeof(pins[0]); i++) { gpio_init(pins[i], GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_INSANE, - GPIO_PULL_NONE, 11); + GPIO_PULL_NONE, 11); // 11 is the Ethernet function } - NVIC_EnableIRQ(ETH_IRQn); // Setup Ethernet IRQ handler - RCC->APB2ENR |= BIT(14); // Enable SYSCFG - SYSCFG->PMC |= BIT(23); // Use RMII. Goes first! - RCC->AHB1ENR |= BIT(25) | BIT(26) | BIT(27); // Enable Ethernet clocks - RCC->AHB1RSTR |= BIT(25); // ETHMAC force reset - RCC->AHB1RSTR &= ~BIT(25); // ETHMAC release reset + NVIC_EnableIRQ(ETH_IRQn); // Setup Ethernet IRQ handler + SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL; // Use RMII. Goes first! + RCC->AHB1ENR |= + RCC_AHB1ENR_ETHMACEN | RCC_AHB1ENR_ETHMACTXEN | RCC_AHB1ENR_ETHMACRXEN; +} - struct mg_mgr mgr; // Initialise Mongoose event manager - mg_mgr_init(&mgr); // and attach it to the MIP interface +int main(void) { + gpio_output(LED); // Setup green LED + uart_init(UART_DEBUG, 115200); // Initialise debug printf + ethernet_init(); // Initialise ethernet pins + MG_INFO(("Starting, CPU freq %g MHz", (double) SYS_FREQUENCY / 1000000)); + + struct mg_mgr mgr; // Initialise + mg_mgr_init(&mgr); // Mongoose event manager mg_log_set(MG_LL_DEBUG); // Set log level // Initialise Mongoose network stack // Specify MAC address, and IP/mask/GW in network byte order for static // IP configuration. If IP/mask/GW are unset, DHCP is going to be used struct mip_driver_stm32_data driver_data = {.mdc_cr = 4}; // driver_stm32.h - struct mip_if mif = {.mac = {2, 0, 1, 2, 3, 5}, - .driver = &mip_driver_stm32, + struct mip_if mif = {.driver = &mip_driver_stm32, .driver_data = &driver_data}; mip_init(&mgr, &mif); mg_timer_add(&mgr, BLINK_PERIOD_MS, MG_TIMER_REPEAT, timer_fn, &mif); diff --git a/examples/stm32/nucleo-f746zg-baremetal/sysinit.c b/examples/stm32/nucleo-f746zg-baremetal/sysinit.c new file mode 100644 index 00000000..5e65284e --- /dev/null +++ b/examples/stm32/nucleo-f746zg-baremetal/sysinit.c @@ -0,0 +1,29 @@ +// Copyright (c) 2023 Cesanta Software Limited +// All rights reserved +// +// This file contains essentials required by the CMSIS: +// uint32_t SystemCoreClock - holds the system core clock value +// SystemInit() - initialises the system, e.g. sets up clocks + +#include "hal.h" + +uint32_t SystemCoreClock = SYS_FREQUENCY; + +void SystemInit(void) { // Called automatically by startup code + SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU + asm("DSB"); + asm("ISB"); + FLASH->ACR |= FLASH_LATENCY | BIT(8) | BIT(9); // Flash latency, prefetch + RCC->PLLCFGR &= ~((BIT(17) - 1)); // Clear PLL multipliers + RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16; // Set PLL_P + RCC->PLLCFGR |= PLL_M | (PLL_N << 6); // Set PLL_M and PLL_N + RCC->CR |= BIT(24); // Enable PLL + while ((RCC->CR & BIT(25)) == 0) spin(1); // Wait until done + RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13); // Set prescalers + RCC->CFGR |= 2; // Set clock source to PLL + while ((RCC->CFGR & 12) == 0) spin(1); // Wait until done + + RCC->APB2ENR |= RCC_APB2ENR_SYSCFGEN; // Enable SYSCFG + rng_init(); // Initialise random number generator + SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms +} diff --git a/mip/driver_stm32.c b/mip/driver_stm32.c index 8fb74356..def832d6 100644 --- a/mip/driver_stm32.c +++ b/mip/driver_stm32.c @@ -27,13 +27,11 @@ static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; // RX ethernet buffers static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; // TX ethernet buffers -static struct mip_if *s_ifp; // MIP interface -enum { - PHY_ADDR = 0, - PHY_BCR = 0, - PHY_BSR = 1, - PHY_CSCR = 31 -}; // PHY constants +static uint8_t s_txno; // Current TX descriptor +static uint8_t s_rxno; // Current RX descriptor + +static struct mip_if *s_ifp; // MIP interface +enum { PHY_ADDR = 0, PHY_BCR = 0, PHY_BSR = 1, PHY_CSCR = 31 }; static uint32_t eth_read_phy(uint8_t addr, uint8_t reg) { ETH->MACMIIAR &= (7 << 2); @@ -156,13 +154,13 @@ static bool mip_driver_stm32_init(struct mip_if *ifp) { return true; } -static uint32_t s_txno; static size_t mip_driver_stm32_tx(const void *buf, size_t len, struct mip_if *ifp) { if (len > sizeof(s_txbuf[s_txno])) { MG_ERROR(("Frame too big, %ld", (long) len)); len = 0; // Frame is too big } else if ((s_txdesc[s_txno][0] & BIT(31))) { + ifp->nerr++; MG_ERROR(("No free descriptors")); // printf("D0 %lx SR %lx\n", (long) s_txdesc[0][0], (long) ETH->DMASR); len = 0; // All descriptors are busy, fail @@ -176,7 +174,6 @@ static size_t mip_driver_stm32_tx(const void *buf, size_t len, ETH->DMASR = BIT(2) | BIT(5); // Clear any prior TBUS/TUS ETH->DMATPDR = 0; // and resume return len; - (void) ifp; } static bool mip_driver_stm32_up(struct mip_if *ifp) { @@ -195,7 +192,6 @@ static bool mip_driver_stm32_up(struct mip_if *ifp) { } void ETH_IRQHandler(void); -static uint32_t s_rxno; void ETH_IRQHandler(void) { qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMASR & BIT(6)) { // Frame received, loop diff --git a/mip/mip.c b/mip/mip.c index 403fb61f..c7fcf056 100644 --- a/mip/mip.c +++ b/mip/mip.c @@ -260,7 +260,9 @@ static size_t ether_output(struct mip_if *ifp, size_t len) { // size_t min = 64; // Pad short frames to 64 bytes (minimum Ethernet size) // if (len < min) memset(ifp->tx.ptr + len, 0, min - len), len = min; // mg_hexdump(ifp->tx.ptr, len); - return ifp->driver->tx(ifp->tx.ptr, len, ifp); + size_t n = ifp->driver->tx(ifp->tx.ptr, len, ifp); + if (n == len) ifp->nsent++; + return n; } static void arp_ask(struct mip_if *ifp, uint32_t ip) { @@ -715,7 +717,6 @@ static void rx_tcp(struct mip_if *ifp, struct pkt *pkt) { } static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { - // MG_DEBUG(("IP %d", (int) pkt->pay.len)); if (pkt->ip->proto == 1) { pkt->icmp = (struct icmp *) (pkt->ip + 1); if (pkt->pay.len < sizeof(*pkt->icmp)) return; @@ -725,6 +726,9 @@ static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { pkt->udp = (struct udp *) (pkt->ip + 1); if (pkt->pay.len < sizeof(*pkt->udp)) return; mkpay(pkt, pkt->udp + 1); + MG_DEBUG(("UDP %M:%hu -> %M:%hu len %u", mg_print_ip4, &pkt->ip->src, + mg_ntohs(pkt->udp->sport), mg_print_ip4, &pkt->ip->dst, + mg_ntohs(pkt->udp->dport), (int) pkt->pay.len)); if (pkt->udp->dport == mg_htons(68)) { pkt->dhcp = (struct dhcp *) (pkt->udp + 1); mkpay(pkt, pkt->dhcp + 1); @@ -743,6 +747,9 @@ static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { uint16_t iplen = mg_ntohs(pkt->ip->len); uint16_t off = (uint16_t) (sizeof(*pkt->ip) + ((pkt->tcp->off >> 4) * 4U)); if (iplen >= off) pkt->pay.len = (size_t) (iplen - off); + MG_DEBUG(("TCP %M:%hu -> %M:%hu len %u", mg_print_ip4, &pkt->ip->src, + mg_ntohs(pkt->tcp->sport), mg_print_ip4, &pkt->ip->dst, + mg_ntohs(pkt->tcp->dport), (int) pkt->pay.len)); rx_tcp(ifp, pkt); } } @@ -867,8 +874,9 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { void mip_qwrite(void *buf, size_t len, struct mip_if *ifp) { if (q_write(&ifp->queue, buf, len)) { qp_mark(QP_FRAMEPUSHED, (int) q_space(&ifp->queue)); + ifp->nrecv++; } else { - ifp->dropped++; + ifp->ndropped++; qp_mark(QP_FRAMEDROPPED, ifp->dropped); MG_ERROR(("dropped %d", (int) len)); } @@ -888,6 +896,14 @@ size_t mip_driver_rx(void *buf, size_t len, struct mip_if *ifp) { } void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { + // If MAC address is not set, make a random one + if (ifp->mac[0] == 0 && ifp->mac[1] == 0 && ifp->mac[2] == 0 && + ifp->mac[3] == 0 && ifp->mac[4] == 0 && ifp->mac[5] == 0) { + mg_random(ifp->mac, sizeof(ifp->mac)); + ifp->mac[0] &= (uint8_t) ~1; // 1st byte must be even (unicast) + MG_INFO(("MAC not set. Generated random: %M", mg_print_mac, ifp->mac)); + } + if (ifp->driver->init && !ifp->driver->init(ifp)) { MG_ERROR(("driver init failed")); } else { @@ -901,6 +917,12 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { ifp->mgr = mgr; mgr->extraconnsize = sizeof(struct connstate); if (ifp->ip == 0) ifp->enable_dhcp_client = true; + + // Randomise initial ephemeral port + uint16_t jitter; + mg_random(&jitter, sizeof(jitter)); + ifp->eport = MIP_ETHEMERAL_PORT + (jitter % (0xffffu - MIP_ETHEMERAL_PORT)); + #ifdef MIP_QPROFILE qp_init(); #endif @@ -918,15 +940,6 @@ int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) { return -1; } -#if 0 -static uint16_t mkeport(void) { - uint16_t a = 0, b = mg_millis() & 0xffffU, c = MIP_ETHEMERAL_PORT; - mg_random(&a, sizeof(a)); - c += (a ^ b) % (0xffffU - MIP_ETHEMERAL_PORT); - return c; -} -#endif - void mg_connect_resolved(struct mg_connection *c) { struct mip_if *ifp = (struct mip_if *) c->mgr->priv; c->is_resolving = 0; diff --git a/mip/mip.h b/mip/mip.h index a31685c7..3584f7ef 100644 --- a/mip/mip.h +++ b/mip/mip.h @@ -43,7 +43,10 @@ struct mip_if { uint64_t lease_expire; // Lease expiration time uint8_t arp_cache[MIP_ARP_CS]; // Each entry is 12 bytes uint16_t eport; // Next ephemeral port - uint16_t dropped; // Number of dropped frames + volatile uint32_t ndropped; // Number of received, but dropped frames + volatile uint32_t nrecv; // Number of received frames + volatile uint32_t nsent; // Number of transmitted frames + volatile uint32_t nerr; // Number of driver errors uint8_t state; // Current state #define MIP_STATE_DOWN 0 // Interface is down #define MIP_STATE_UP 1 // Interface is up @@ -73,7 +76,7 @@ struct mip_spi { #if MG_ENABLE_MIP #if !defined(MG_ENABLE_DRIVER_STM32H) && !defined(MG_ENABLE_DRIVER_TM4C) #define MG_ENABLE_DRIVER_STM32 1 -#else +#else #define MG_ENABLE_DRIVER_STM32 0 #endif #endif diff --git a/mongoose.c b/mongoose.c index 4968a521..2cc8667d 100644 --- a/mongoose.c +++ b/mongoose.c @@ -5966,13 +5966,11 @@ static uint32_t s_rxdesc[ETH_DESC_CNT][ETH_DS]; // RX descriptors static uint32_t s_txdesc[ETH_DESC_CNT][ETH_DS]; // TX descriptors static uint8_t s_rxbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; // RX ethernet buffers static uint8_t s_txbuf[ETH_DESC_CNT][ETH_PKT_SIZE]; // TX ethernet buffers -static struct mip_if *s_ifp; // MIP interface -enum { - PHY_ADDR = 0, - PHY_BCR = 0, - PHY_BSR = 1, - PHY_CSCR = 31 -}; // PHY constants +static uint8_t s_txno; // Current TX descriptor +static uint8_t s_rxno; // Current RX descriptor + +static struct mip_if *s_ifp; // MIP interface +enum { PHY_ADDR = 0, PHY_BCR = 0, PHY_BSR = 1, PHY_CSCR = 31 }; static uint32_t eth_read_phy(uint8_t addr, uint8_t reg) { ETH->MACMIIAR &= (7 << 2); @@ -6095,13 +6093,13 @@ static bool mip_driver_stm32_init(struct mip_if *ifp) { return true; } -static uint32_t s_txno; static size_t mip_driver_stm32_tx(const void *buf, size_t len, struct mip_if *ifp) { if (len > sizeof(s_txbuf[s_txno])) { MG_ERROR(("Frame too big, %ld", (long) len)); len = 0; // Frame is too big } else if ((s_txdesc[s_txno][0] & BIT(31))) { + ifp->nerr++; MG_ERROR(("No free descriptors")); // printf("D0 %lx SR %lx\n", (long) s_txdesc[0][0], (long) ETH->DMASR); len = 0; // All descriptors are busy, fail @@ -6115,7 +6113,6 @@ static size_t mip_driver_stm32_tx(const void *buf, size_t len, ETH->DMASR = BIT(2) | BIT(5); // Clear any prior TBUS/TUS ETH->DMATPDR = 0; // and resume return len; - (void) ifp; } static bool mip_driver_stm32_up(struct mip_if *ifp) { @@ -6134,7 +6131,6 @@ static bool mip_driver_stm32_up(struct mip_if *ifp) { } void ETH_IRQHandler(void); -static uint32_t s_rxno; void ETH_IRQHandler(void) { qp_mark(QP_IRQTRIGGERED, 0); if (ETH->DMASR & BIT(6)) { // Frame received, loop @@ -7054,7 +7050,9 @@ static size_t ether_output(struct mip_if *ifp, size_t len) { // size_t min = 64; // Pad short frames to 64 bytes (minimum Ethernet size) // if (len < min) memset(ifp->tx.ptr + len, 0, min - len), len = min; // mg_hexdump(ifp->tx.ptr, len); - return ifp->driver->tx(ifp->tx.ptr, len, ifp); + size_t n = ifp->driver->tx(ifp->tx.ptr, len, ifp); + if (n == len) ifp->nsent++; + return n; } static void arp_ask(struct mip_if *ifp, uint32_t ip) { @@ -7509,7 +7507,6 @@ static void rx_tcp(struct mip_if *ifp, struct pkt *pkt) { } static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { - // MG_DEBUG(("IP %d", (int) pkt->pay.len)); if (pkt->ip->proto == 1) { pkt->icmp = (struct icmp *) (pkt->ip + 1); if (pkt->pay.len < sizeof(*pkt->icmp)) return; @@ -7519,6 +7516,9 @@ static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { pkt->udp = (struct udp *) (pkt->ip + 1); if (pkt->pay.len < sizeof(*pkt->udp)) return; mkpay(pkt, pkt->udp + 1); + MG_DEBUG(("UDP %M:%hu -> %M:%hu len %u", mg_print_ip4, &pkt->ip->src, + mg_ntohs(pkt->udp->sport), mg_print_ip4, &pkt->ip->dst, + mg_ntohs(pkt->udp->dport), (int) pkt->pay.len)); if (pkt->udp->dport == mg_htons(68)) { pkt->dhcp = (struct dhcp *) (pkt->udp + 1); mkpay(pkt, pkt->dhcp + 1); @@ -7537,6 +7537,9 @@ static void rx_ip(struct mip_if *ifp, struct pkt *pkt) { uint16_t iplen = mg_ntohs(pkt->ip->len); uint16_t off = (uint16_t) (sizeof(*pkt->ip) + ((pkt->tcp->off >> 4) * 4U)); if (iplen >= off) pkt->pay.len = (size_t) (iplen - off); + MG_DEBUG(("TCP %M:%hu -> %M:%hu len %u", mg_print_ip4, &pkt->ip->src, + mg_ntohs(pkt->tcp->sport), mg_print_ip4, &pkt->ip->dst, + mg_ntohs(pkt->tcp->dport), (int) pkt->pay.len)); rx_tcp(ifp, pkt); } } @@ -7661,8 +7664,9 @@ static void mip_poll(struct mip_if *ifp, uint64_t uptime_ms) { void mip_qwrite(void *buf, size_t len, struct mip_if *ifp) { if (q_write(&ifp->queue, buf, len)) { qp_mark(QP_FRAMEPUSHED, (int) q_space(&ifp->queue)); + ifp->nrecv++; } else { - ifp->dropped++; + ifp->ndropped++; qp_mark(QP_FRAMEDROPPED, ifp->dropped); MG_ERROR(("dropped %d", (int) len)); } @@ -7682,6 +7686,14 @@ size_t mip_driver_rx(void *buf, size_t len, struct mip_if *ifp) { } void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { + // If MAC address is not set, make a random one + if (ifp->mac[0] == 0 && ifp->mac[1] == 0 && ifp->mac[2] == 0 && + ifp->mac[3] == 0 && ifp->mac[4] == 0 && ifp->mac[5] == 0) { + mg_random(ifp->mac, sizeof(ifp->mac)); + ifp->mac[0] &= (uint8_t) ~1; // 1st byte must be even (unicast) + MG_INFO(("MAC not set. Generated random: %M", mg_print_mac, ifp->mac)); + } + if (ifp->driver->init && !ifp->driver->init(ifp)) { MG_ERROR(("driver init failed")); } else { @@ -7695,6 +7707,12 @@ void mip_init(struct mg_mgr *mgr, struct mip_if *ifp) { ifp->mgr = mgr; mgr->extraconnsize = sizeof(struct connstate); if (ifp->ip == 0) ifp->enable_dhcp_client = true; + + // Randomise initial ephemeral port + uint16_t jitter; + mg_random(&jitter, sizeof(jitter)); + ifp->eport = MIP_ETHEMERAL_PORT + (jitter % (0xffffu - MIP_ETHEMERAL_PORT)); + #ifdef MIP_QPROFILE qp_init(); #endif @@ -7712,15 +7730,6 @@ int mg_mkpipe(struct mg_mgr *m, mg_event_handler_t fn, void *d, bool udp) { return -1; } -#if 0 -static uint16_t mkeport(void) { - uint16_t a = 0, b = mg_millis() & 0xffffU, c = MIP_ETHEMERAL_PORT; - mg_random(&a, sizeof(a)); - c += (a ^ b) % (0xffffU - MIP_ETHEMERAL_PORT); - return c; -} -#endif - void mg_connect_resolved(struct mg_connection *c) { struct mip_if *ifp = (struct mip_if *) c->mgr->priv; c->is_resolving = 0; diff --git a/mongoose.h b/mongoose.h index 35649a13..748ca07c 100644 --- a/mongoose.h +++ b/mongoose.h @@ -1492,7 +1492,10 @@ struct mip_if { uint64_t lease_expire; // Lease expiration time uint8_t arp_cache[MIP_ARP_CS]; // Each entry is 12 bytes uint16_t eport; // Next ephemeral port - uint16_t dropped; // Number of dropped frames + volatile uint32_t ndropped; // Number of received, but dropped frames + volatile uint32_t nrecv; // Number of received frames + volatile uint32_t nsent; // Number of transmitted frames + volatile uint32_t nerr; // Number of driver errors uint8_t state; // Current state #define MIP_STATE_DOWN 0 // Interface is down #define MIP_STATE_UP 1 // Interface is up @@ -1522,7 +1525,7 @@ struct mip_spi { #if MG_ENABLE_MIP #if !defined(MG_ENABLE_DRIVER_STM32H) && !defined(MG_ENABLE_DRIVER_TM4C) #define MG_ENABLE_DRIVER_STM32 1 -#else +#else #define MG_ENABLE_DRIVER_STM32 0 #endif #endif