Commit Graph

11 Commits

Author SHA1 Message Date
cpq
d76e69f9a7 Use UART_DEBUG 2023-02-01 21:08:24 +00:00
Sergio R. Caprile
f4d058155a Fix UART1,2 clocking in all other examples 2023-01-20 17:49:57 -03:00
Sergio R. Caprile
37c0ed0b49 Fix AF in UART1,2 2023-01-19 15:28:51 -03:00
Sergio R. Caprile
2c014778d9 Minor tweaks in STM32 examples
Fix comments in newer mip initialization (main.c)
Correct stack initialization (boot.c)
Remove SCC clock enable when not needed (mcu.h)
2022-12-09 15:20:51 -03:00
Sergey Lyubka
51076e68c8
Merge pull request #1701 from cesanta/enableFPU
Enable FPU
2022-09-02 15:46:00 +01:00
Sergio R. Caprile
3270f1252b Enable FPU 2022-09-02 11:18:11 -03:00
Sergio R. Caprile
62a6b61fc9 Fix SCB address for scb struct 2022-09-01 17:14:31 -03:00
Sergio R. Caprile
c289556775 Group clock setup dependencies 2022-08-29 14:36:40 -03:00
cpq
dcdeffff9a MIP refactor: use mg_hton*, move driver_data to ifp, parametrise f746 PLL setup 2022-08-27 16:45:31 +01:00
cpq
8596e1bef7 Enable FPU 2022-08-16 16:45:05 +01:00
Sergey Lyubka
2ae341cf5e Add nucleo-f746zg-baremetal 2022-05-26 13:53:36 +01:00