mirror of
https://github.com/cesanta/mongoose.git
synced 2024-12-18 11:28:13 +08:00
17 lines
640 B
C
17 lines
640 B
C
#pragma once
|
|
|
|
struct mip_driver_stm32 {
|
|
// MDC clock divider. MDC clock is derived from HCLK, must not exceed 2.5MHz
|
|
// HCLK range DIVIDER mdc_cr VALUE
|
|
// -------------------------------------
|
|
// -1 <-- tell driver to guess the value
|
|
// 60-100 MHz HCLK/42 0
|
|
// 100-150 MHz HCLK/62 1
|
|
// 20-35 MHz HCLK/16 2
|
|
// 35-60 MHz HCLK/26 3
|
|
// 150-216 MHz HCLK/102 4 <-- value for Nucleo-F* on max speed
|
|
// 216-310 MHz HCLK/124 5
|
|
// 110, 111 Reserved
|
|
int mdc_cr; // Valid values: -1, 0, 1, 2, 3, 4, 5
|
|
};
|