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159 lines
6.3 KiB
C
159 lines
6.3 KiB
C
// Copyright (c) 2022 Cesanta Software Limited
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// All rights reserved
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// https://www.st.com/resource/en/reference_manual/dm00031020-stm32f405-415-stm32f407-417-stm32f427-437-and-stm32f429-439-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf
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#pragma once
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#include <inttypes.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <sys/stat.h>
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#include "stm32f429xx.h"
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#define BIT(x) (1UL << (x))
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#define SETBITS(R, CLEARMASK, SETMASK) (R) = ((R) & ~(CLEARMASK)) | (SETMASK)
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#define PIN(bank, num) ((((bank) - 'A') << 8) | (num))
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#define PINNO(pin) (pin & 255)
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#define PINBANK(pin) (pin >> 8)
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// 6.3.3: APB1 clock <= 45MHz; APB2 clock <= 90MHz
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// 3.5.1, Table 11: configure flash latency (WS) in accordance to clock freq
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// 33.4: The AHB clock must be at least 25 MHz when Ethernet is used
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enum { APB1_PRE = 5 /* AHB clock / 4 */, APB2_PRE = 4 /* AHB clock / 2 */ };
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enum { PLL_HSI = 16, PLL_M = 8, PLL_N = 180, PLL_P = 2 }; // Run at 180 Mhz
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#define FLASH_LATENCY 5
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#define SYS_FREQUENCY ((PLL_HSI * PLL_N / PLL_M / PLL_P) * 1000000)
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#define APB2_FREQUENCY (SYS_FREQUENCY / (BIT(APB2_PRE - 3)))
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#define APB1_FREQUENCY (SYS_FREQUENCY / (BIT(APB1_PRE - 3)))
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static inline void spin(volatile uint32_t count) {
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while (count--) asm("nop");
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}
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static inline void systick_init(uint32_t ticks) {
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if ((ticks - 1) > 0xffffff) return; // Systick timer is 24 bit
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SysTick->LOAD = ticks - 1;
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SysTick->VAL = 0;
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SysTick->CTRL = BIT(0) | BIT(1) | BIT(2); // Enable systick
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}
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#define GPIO(bank) ((GPIO_TypeDef *) (GPIOA_BASE + 0x400 * (bank)))
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enum { GPIO_MODE_INPUT, GPIO_MODE_OUTPUT, GPIO_MODE_AF, GPIO_MODE_ANALOG };
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enum { GPIO_OTYPE_PUSH_PULL, GPIO_OTYPE_OPEN_DRAIN };
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enum { GPIO_SPEED_LOW, GPIO_SPEED_MEDIUM, GPIO_SPEED_HIGH, GPIO_SPEED_INSANE };
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enum { GPIO_PULL_NONE, GPIO_PULL_UP, GPIO_PULL_DOWN };
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static inline void gpio_init(uint16_t pin, uint8_t mode, uint8_t type,
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uint8_t speed, uint8_t pull, uint8_t af) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin)); // GPIO bank
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uint8_t n = (uint8_t) (PINNO(pin));
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RCC->AHB1ENR |= BIT(PINBANK(pin)); // Enable GPIO clock
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SETBITS(gpio->OTYPER, 1UL << n, ((uint32_t) type) << n);
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SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
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SETBITS(gpio->PUPDR, 3UL << (n * 2), ((uint32_t) pull) << (n * 2));
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SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
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((uint32_t) af) << ((n & 7) * 4));
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SETBITS(gpio->MODER, 3UL << (n * 2), ((uint32_t) mode) << (n * 2));
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}
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#if 0
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static inline void gpio_set_mode(uint16_t pin, uint8_t mode) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin)); // GPIO bank
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int n = PINNO(pin); // Pin number
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RCC->AHB1ENR |= BIT(PINBANK(pin)); // Enable GPIO clock
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gpio->MODER &= ~(3U << (n * 2)); // Clear existing setting
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gpio->MODER |= (mode & 3) << (n * 2); // Set new mode
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}
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static inline void gpio_set_speed(uint16_t pin, uint8_t speed) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin)); // GPIO bank
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int n = PINNO(pin); // Pin number
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//gpio->OSPEEDR &= ~(3UL << (n * 2));
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//gpio->OSPEEDR |= ~(((uint32_t) speed) << (n * 2));
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SETBITS(gpio->OSPEEDR, 3UL << (n * 2), ((uint32_t) speed) << (n * 2));
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}
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static inline void gpio_set_af(uint16_t pin, uint8_t af) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin)); // GPIO bank
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int n = PINNO(pin); // Pin number
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//gpio->AFR[n >> 3] &= ~(15UL << ((n & 7) * 4));
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//gpio->AFR[n >> 3] |= ((uint32_t) af_num) << ((n & 7) * 4);
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SETBITS(gpio->AFR[n >> 3], 15UL << ((n & 7) * 4),
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((uint32_t) af) << ((n & 7) * 4));
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}
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#endif
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static inline void gpio_write(uint16_t pin, bool val) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin));
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gpio->BSRR = (1U << PINNO(pin)) << (val ? 0 : 16);
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}
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static inline void gpio_toggle(uint16_t pin) {
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GPIO_TypeDef *gpio = GPIO(PINBANK(pin)); // GPIO bank
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uint32_t mask = BIT(PINNO(pin));
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gpio->BSRR |= mask << (gpio->ODR & mask ? 16 : 0);
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}
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#define UART1 USART1
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#define UART2 USART2
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#define UART3 USART3
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#ifndef UART_DEBUG
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#define UART_DEBUG USART3
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#endif
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static inline void uart_init(USART_TypeDef *uart, unsigned long baud) {
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// https://www.st.com/resource/en/datasheet/stm32f429zi.pdf
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uint8_t af = 7; // Alternate function
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uint16_t rx = 0, tx = 0; // pins
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uint32_t freq = 0; // Bus frequency. UART1 is on APB2, rest on APB1
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if (uart == UART1) freq = APB2_FREQUENCY, RCC->APB2ENR |= BIT(4);
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if (uart == UART2) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(17);
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if (uart == UART3) freq = APB1_FREQUENCY, RCC->APB1ENR |= BIT(18);
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if (uart == UART1) tx = PIN('A', 9), rx = PIN('A', 10);
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if (uart == UART2) tx = PIN('A', 2), rx = PIN('A', 3);
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if (uart == UART3) tx = PIN('D', 8), rx = PIN('D', 9);
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gpio_init(tx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
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gpio_init(rx, GPIO_MODE_AF, GPIO_OTYPE_PUSH_PULL, GPIO_SPEED_HIGH, 0, af);
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uart->CR1 = 0; // Disable this UART
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uart->BRR = freq / baud; // Set baud rate
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uart->CR1 |= BIT(13) | BIT(2) | BIT(3); // Set UE, RE, TE
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}
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static inline void uart_write_byte(USART_TypeDef *uart, uint8_t byte) {
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uart->DR = byte;
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while ((uart->SR & BIT(7)) == 0) spin(1);
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}
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static inline void uart_write_buf(USART_TypeDef *uart, char *buf, size_t len) {
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while (len-- > 0) uart_write_byte(uart, *(uint8_t *) buf++);
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}
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static inline int uart_read_ready(USART_TypeDef *uart) {
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return uart->SR & BIT(5); // If RXNE bit is set, data is ready
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}
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static inline uint8_t uart_read_byte(USART_TypeDef *uart) {
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return (uint8_t) (uart->DR & 255);
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}
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static inline void clock_init(void) { // Set clock frequency
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SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU
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FLASH->ACR |= FLASH_LATENCY | BIT(8) |
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BIT(9); // Flash latency, prefetch, Icache, Dcache
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RCC->PLLCFGR &= ~((BIT(17) - 1)); // Clear PLL multipliers
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RCC->PLLCFGR |= (((PLL_P - 2) / 2) & 3) << 16; // Set PLL_P
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RCC->PLLCFGR |= PLL_M | (PLL_N << 6); // Set PLL_M and PLL_N
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RCC->CR |= BIT(24); // Enable PLL
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while ((RCC->CR & BIT(25)) == 0) spin(1); // Wait until done
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RCC->CFGR = (APB1_PRE << 10) | (APB2_PRE << 13); // Set prescalers
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RCC->CFGR |= 2; // Set clock source to PLL
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while ((RCC->CFGR & 12) == 0) spin(1); // Wait until done
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}
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