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37 lines
1.5 KiB
C
37 lines
1.5 KiB
C
// Copyright (c) 2023 Cesanta Software Limited
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// All rights reserved
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//
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// This file contains essentials required by the CMSIS:
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// uint32_t SystemCoreClock - holds the system core clock value
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// SystemInit() - initialises the system, e.g. sets up clocks
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#include "hal.h"
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uint32_t SystemCoreClock = SYS_FREQUENCY;
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void SystemInit(void) { // Called automatically by startup code
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SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); // Enable FPU
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asm("DSB");
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asm("ISB");
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SETBITS(SYSCTL->MOSCCTL, BIT(3) | BIT(2),
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BIT(4)); // Enable MOSC circuit (clear NOXTAL and PWRDN, set >10MHz
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// range)
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SETBITS(SYSCTL->MEMTIM0,
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BIT(21) | BIT(5) | 0x1F << 21 | 0xF << 16 | 0x1F << 5 | 0xF << 0,
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FLASH_CLKHIGH << 22 | FLASH_WAITST << 16 | FLASH_CLKHIGH << 5 |
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FLASH_WAITST << 0); // Configure flash timing (not yet applied)
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SETBITS(SYSCTL->RSCLKCFG, 0xF << 24 | (BIT(9) - 1),
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3 << 24); // Clear PLL divider, set MOSC as PLL source
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SYSCTL->PLLFREQ1 = (PLL_Q - 1) << 8 | (PLL_N - 1)
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<< 0; // Set PLL_Q and PLL_N
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SYSCTL->PLLFREQ0 =
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BIT(23) | PLL_M << 0; // Set PLL_Q, power up PLL (if it were on, we'd
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// need to set NEWFREQ in RSCLKCFG instead)
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while ((SYSCTL->PLLSTAT & BIT(0)) == 0) spin(1); // Wait for lock
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SYSCTL->RSCLKCFG |=
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BIT(31) | BIT(28) |
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(PSYSDIV - 1) << 0; // Update memory timing, use PLL, set clock divisor
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SysTick_Config(SystemCoreClock / 1000); // Sys tick every 1ms
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}
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