diff --git a/src/os/unix/ngx_gcc_atomic_ppc.h b/src/os/unix/ngx_gcc_atomic_ppc.h
index 5339ba98c..147c44f31 100644
--- a/src/os/unix/ngx_gcc_atomic_ppc.h
+++ b/src/os/unix/ngx_gcc_atomic_ppc.h
@@ -17,6 +17,58 @@
  * The "=&b" means that no input registers can be used.
  */
 
+#if (NGX_PTR_SIZE == 8)
+
+static ngx_inline ngx_atomic_uint_t
+ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
+    ngx_atomic_uint_t set)
+{
+    ngx_atomic_uint_t  res, temp;
+
+    __asm__ volatile (
+
+    "    li      %0, 0       \n" /* preset "0" to "res"                      */
+    "    ldarx   %1, 0, %2   \n" /* load from [lock] into "temp"             */
+                                 /*   and store reservation                  */
+    "    cmpd    %1, %3      \n" /* compare "temp" and "old"                 */
+    "    bne-    1f          \n" /* not equal                                */
+    "    stdcx.  %4, 0, %2   \n" /* store "set" into [lock] if reservation   */
+                                 /*   is not cleared                         */
+    "    bne-    1f          \n" /* the reservation was cleared              */
+    "    li      %0, 1       \n" /* set "1" to "res"                         */
+    "1:                      \n"
+
+    : "=&b" (res), "=&b" (temp)
+    : "b" (lock), "b" (old), "b" (set)
+    : "cc", "memory");
+
+    return res;
+}
+
+
+static ngx_inline ngx_atomic_int_t
+ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
+{
+    ngx_atomic_uint_t  res, temp;
+
+    __asm__ volatile (
+
+    "1:  ldarx   %0, 0, %2   \n" /* load from [value] into "res"             */
+                                 /*   and store reservation                  */
+    "    add     %1, %0, %3  \n" /* "res" + "add" store in "temp"            */
+    "    stdcx.  %1, 0, %2   \n" /* store "temp" into [value] if reservation */
+                                 /*   is not cleared                         */
+    "    bne-    1b          \n" /* try again if reservation was cleared     */
+
+    : "=&b" (res), "=&b" (temp)
+    : "b" (value), "b" (add)
+    : "cc", "memory");
+
+    return res;
+}
+
+#else
+
 static ngx_inline ngx_atomic_uint_t
 ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
     ngx_atomic_uint_t set)
@@ -65,6 +117,8 @@ ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
     return res;
 }
 
+#endif
+
 
 #if (NGX_SMP)
 #define ngx_memory_barrier()   __asm__ volatile ("sync\n" ::: "memory")