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https://github.com/nginx/nginx.git
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0e5dc5cff6
*) Change: the "valid_referers" directive and the "$invalid_referer"
variable were moved to the new ngx_http_referer_module from the
ngx_http_rewrite_module.
*) Change: the "$apache_bytes_sent" variable name was changed to
"$body_bytes_sent".
*) Feature: the "$sent_http_..." variables.
*) Feature: the "if" directive supports the "=" and "!=" operations.
*) Feature: the "proxy_pass" directive supports the HTTPS protocol.
*) Feature: the "proxy_set_body" directive.
*) Feature: the "post_action" directive.
*) Feature: the ngx_http_empty_gif_module.
*) Feature: the "worker_cpu_affinity" directive for Linux.
*) Bugfix: the "rewrite" directive did not unescape URI part in
redirect, now it is unescaped except the %00-%25 and %7F-%FF
characters.
*) Bugfix: nginx could not be built by the icc 9.0 compiler.
*) Bugfix: if the SSI was enabled for zero size static file, then the
chunked response was encoded incorrectly.
80 lines
1.5 KiB
C
80 lines
1.5 KiB
C
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/*
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* Copyright (C) Igor Sysoev
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*/
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/*
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* "casa [r1] 0x80, r2, r0" and
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* "casxa [r1] 0x80, r2, r0" do the following:
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*
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* if ([r1] == r2) {
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* swap(r0, [r1]);
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* } else {
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* r0 = [r1];
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* }
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*
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* so "r0 == r2" means that the operation was successfull.
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*
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*
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* The "r" means the general register.
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* The "+r" means the general register used for both input and output.
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*/
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#if (NGX_PTR_SIZE == 4)
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#define NGX_CASA "casa"
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#else
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#define NGX_CASA "casxa"
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#endif
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static ngx_inline ngx_atomic_uint_t
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ngx_atomic_cmp_set(ngx_atomic_t *lock, ngx_atomic_uint_t old,
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ngx_atomic_uint_t set)
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{
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__asm__ volatile (
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NGX_CASA " [%1] 0x80, %2, %0"
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: "+r" (set) : "r" (lock), "r" (old) : "memory");
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return (set == old);
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}
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static ngx_inline ngx_atomic_int_t
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ngx_atomic_fetch_add(ngx_atomic_t *value, ngx_atomic_int_t add)
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{
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ngx_atomic_uint_t old, res;
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old = *value;
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for ( ;; ) {
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res = old + add;
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__asm__ volatile (
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NGX_CASA " [%1] 0x80, %2, %0"
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: "+r" (res) : "r" (value), "r" (old) : "memory");
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if (res == old) {
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return res;
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}
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old = res;
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}
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}
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#if (NGX_SMP)
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#define ngx_memory_barrier() \
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__asm__ volatile ( \
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"membar #LoadLoad | #LoadStore | #StoreStore | #StoreLoad" \
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::: "memory")
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#else
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#define ngx_memory_barrier() __asm__ volatile ("" ::: "memory")
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#endif
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