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SymmRowSmallVec_8u32s 1x5 asymm
NEON speedup: 3.14x Auto-vect speedup: 1.6x Test kernel: [-5, -2, 0, 2, 5]
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@ -2400,7 +2400,40 @@ struct SymmRowSmallVec_8u32s
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}
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else if( _ksize == 5 )
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{
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return 0;
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int32x4_t k32 = vdupq_n_s32(0);
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k32 = vld1q_lane_s32(kx + 1, k32, 1);
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k32 = vld1q_lane_s32(kx + 2, k32, 2);
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int16x4_t k = vqmovn_s32(k32);
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uint8x8_t z = vdup_n_u8(0);
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for( ; i <= width - 8; i += 8, src += 8 )
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{
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uint8x8_t x0, x1;
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x0 = vld1_u8( (uint8_t *) (src - cn) );
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x1 = vld1_u8( (uint8_t *) (src + cn) );
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int32x4_t accl, acch;
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int16x8_t y0;
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y0 = vsubq_s16(vreinterpretq_s16_u16(vaddl_u8(x1, z)),
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vreinterpretq_s16_u16(vaddl_u8(x0, z)));
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accl = vmull_lane_s16(vget_low_s16(y0), k, 1);
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acch = vmull_lane_s16(vget_high_s16(y0), k, 1);
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uint8x8_t x2, x3;
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x2 = vld1_u8( (uint8_t *) (src - cn*2) );
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x3 = vld1_u8( (uint8_t *) (src + cn*2) );
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int16x8_t y1;
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y1 = vsubq_s16(vreinterpretq_s16_u16(vaddl_u8(x3, z)),
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vreinterpretq_s16_u16(vaddl_u8(x2, z)));
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accl = vmlal_lane_s16(accl, vget_low_s16(y1), k, 2);
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acch = vmlal_lane_s16(acch, vget_high_s16(y1), k, 2);
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vst1q_s32((int32_t *)(dst + i), accl);
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vst1q_s32((int32_t *)(dst + i + 4), acch);
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}
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}
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}
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@ -2413,9 +2446,9 @@ struct SymmRowSmallVec_8u32s
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};
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typedef RowNoVec RowVec_8u32s;
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typedef RowNoVec RowVec_16s32f;
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typedef RowNoVec RowVec_32f;
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typedef SymmRowSmallNoVec SymmRowSmallVec_8u32s;
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typedef SymmRowSmallNoVec SymmRowSmallVec_32f;
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typedef ColumnNoVec SymmColumnVec_32s8u;
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typedef ColumnNoVec SymmColumnVec_32f16s;
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