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RISC-V: updated intrin_rvv071.hpp to work with modern toolchain 2.8.0
- intrinsics implementation (071) reworked to use modern RVV intrinsics syntax - cmake toolchain file (071) now allows selecting from predefined configurations Co-authored-by: Fang Sun <fangsun@linux.alibaba.com>
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@ -147,7 +147,7 @@
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#endif
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#endif
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#if defined(__riscv) && defined(__riscv_vector) && defined(__riscv_vector_071)
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#if defined(__riscv) && defined(__riscv_vector) && defined(__riscv_vector_071)
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# include<riscv-vector.h>
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# include<riscv_vector.h>
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# define CV_RVV071 1
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# define CV_RVV071 1
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#endif
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#endif
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@ -4,5 +4,54 @@ set(CMAKE_SYSTEM_PROCESSOR riscv64)
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set(CMAKE_CXX_COMPILER riscv64-unknown-linux-gnu-g++)
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set(CMAKE_CXX_COMPILER riscv64-unknown-linux-gnu-g++)
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set(CMAKE_C_COMPILER riscv64-unknown-linux-gnu-gcc)
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set(CMAKE_C_COMPILER riscv64-unknown-linux-gnu-gcc)
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set(CMAKE_CXX_FLAGS_INIT "-march=rv64gcv -mabi=lp64d -D__riscv_vector_071")
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# MangoPi MQ Pro - C906FD, C906FDV
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set(CMAKE_C_FLAGS_INIT "-march=rv64gcv -mabi=lp64d -D__riscv_vector_071")
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# Lichee Pi 4A - C910, C910V (?)
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# CanMV K230 - C908, C908V
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# See https://github.com/T-head-Semi/gcc/blob/xuantie-gcc-10.4.0/gcc/config/riscv/riscv-cores.def
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set(_enable_vector OFF)
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if(CORE STREQUAL "C906FD")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c906fd -mabi=lp64d -mtune=c906fd")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c906fd -mabi=lp64d -mtune=c906fd")
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elseif(CORE STREQUAL "C906FDV")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c906fd -mabi=lp64d -mtune=c906fd")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c906fd -mabi=lp64d -mtune=c906fd")
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# Disabled due to limited 64-bit SEW support
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# set(_enable_vector ON)
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elseif(CORE STREQUAL "C908")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c908 -mabi=lp64d -mtune=c908")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c908 -mabi=lp64d -mtune=c908")
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elseif(CORE STREQUAL "C908V")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c908v -mabi=lp64d -mtune=c908")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c908v -mabi=lp64d -mtune=c908")
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set(_enable_vector ON) # RVV 1.0
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elseif(CORE STREQUAL "C910")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c910 -mabi=lp64d -mtune=c910")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c910 -mabi=lp64d -mtune=c910")
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elseif(CORE STREQUAL "C910V")
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set(CMAKE_C_FLAGS_INIT "-march=rv64imafdcv0p7xthead -mabi=lp64d")
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set(CMAKE_CXX_FLAGS_INIT "-march=rv64imafdcv0p7xthead -mabi=lp64d")
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set(_enable_vector ON) # RVV 0.7.1
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elseif(CORE STREQUAL "C920")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c920 -mabi=lp64d -mtune=c920")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c920 -mabi=lp64d -mtune=c920")
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set(_enable_vector ON) # RVV 0.7.1
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elseif(CORE STREQUAL "C920V2")
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set(CMAKE_C_FLAGS_INIT "-mcpu=c920v2 -mabi=lp64d -mtune=c920v2")
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set(CMAKE_CXX_FLAGS_INIT "-mcpu=c920v2 -mabi=lp64d -mtune=c920v2")
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set(_enable_vector ON) # RVV 1.0
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else()
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set(CMAKE_C_FLAGS_INIT "-march=rv64imafdc_zihintpause_zfh_zba_zbb_zbc_zbs_xtheadc -mabi=lp64d")
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set(CMAKE_CXX_FLAGS_INIT "-march=rv64imafdc_zihintpause_zfh_zba_zbb_zbc_zbs_xtheadc -mabi=lp64d")
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endif()
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if(_enable_vector)
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set(CMAKE_C_FLAGS_INIT "${CMAKE_C_FLAGS_INIT} -D__riscv_vector_071 -mrvv-vector-bits=128")
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set(CMAKE_CXX_FLAGS_INIT "${CMAKE_CXX_FLAGS_INIT} -D__riscv_vector_071 -mrvv-vector-bits=128")
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endif()
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if(ENABLE_GCOV)
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set(CMAKE_CXX_FLAGS_INIT "${CMAKE_CXX_FLAGS_INIT} -fprofile-arcs -ftest-coverage")
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set(CMAKE_C_FLAGS_INIT "${CMAKE_C_FLAGS_INIT} -fprofile-arcs -ftest-coverage")
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endif()
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