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core: fix F16C compilation check
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30d91e8ed6
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2b558a3787
@ -216,6 +216,11 @@ struct VZeroUpperGuard {
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# define CV_VSX 1
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#endif
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#ifdef __F16C__
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# include <immintrin.h>
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# define CV_FP16 1
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#endif
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#endif // !__OPENCV_BUILD && !__CUDACC (Compatibility code)
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@ -765,7 +765,7 @@ protected:
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float16_t() {}
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explicit float16_t(float x)
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{
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#if CV_AVX2
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#if CV_FP16
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__m128 v = _mm_load_ss(&x);
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w = (ushort)_mm_cvtsi128_si32(_mm_cvtps_ph(v, 0));
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#else
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@ -796,7 +796,7 @@ protected:
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operator float() const
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{
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#if CV_AVX2
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#if CV_FP16
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float f;
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_mm_store_ss(&f, _mm_cvtph_ps(_mm_cvtsi32_si128(w)));
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return f;
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@ -3121,18 +3121,39 @@ OPENCV_HAL_IMPL_AVX_LOADSTORE_INTERLEAVE(v_float32x8, float, f32, v_uint32x8, un
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OPENCV_HAL_IMPL_AVX_LOADSTORE_INTERLEAVE(v_int64x4, int64, s64, v_uint64x4, uint64, u64)
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OPENCV_HAL_IMPL_AVX_LOADSTORE_INTERLEAVE(v_float64x4, double, f64, v_uint64x4, uint64, u64)
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//
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// FP16
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//
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inline v_float32x8 v256_load_expand(const float16_t* ptr)
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{
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#if CV_FP16
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return v_float32x8(_mm256_cvtph_ps(_mm_loadu_si128((const __m128i*)ptr)));
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#else
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float CV_DECL_ALIGNED(32) buf[8];
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for (int i = 0; i < 8; i++)
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buf[i] = (float)ptr[i];
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return v256_load_aligned(buf);
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#endif
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}
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inline void v_pack_store(float16_t* ptr, const v_float32x8& a)
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{
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#if CV_FP16
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__m128i ah = _mm256_cvtps_ph(a.val, 0);
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_mm_storeu_si128((__m128i*)ptr, ah);
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#else
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float CV_DECL_ALIGNED(32) buf[8];
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v_store_aligned(buf, a);
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for (int i = 0; i < 8; i++)
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ptr[i] = float16_t(buf[i]);
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#endif
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}
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//
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// end of FP16
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//
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inline void v256_cleanup() { _mm256_zeroall(); }
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CV_CPU_OPTIMIZATION_HAL_NAMESPACE_END
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@ -5,6 +5,11 @@
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#include "precomp.hpp"
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#include "convert.hpp"
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#if !defined(OPENCV_SUPRESS_WARNING_AVX2_WITHOUT_FP16C) && \
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(defined(__GNUC__) && defined(__AVX2__) && !defined(__F16C__))
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#warning "Non-optimal compiler flags: AVX2 without FP16. Generated code is very slow. Consider adding '-mf16c' compiler option."
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#endif
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namespace cv {
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN
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@ -126,9 +126,11 @@ DEFINE_SIMD_TESTS(256, AVX512_SKX)
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TEST(hal_intrin256, float16x16_FP16)
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{
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#if CV_TRY_FP16
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//CV_CPU_CALL_FP16_(test_hal_intrin_float16, ());
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CV_CPU_CALL_AVX2_(test_hal_intrin_float16, ());
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throw SkipTestException("Unsupported hardware: FP16 is not available");
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#endif
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throw SkipTestException("Unsupported: FP16 is not available");
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}
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@ -142,8 +144,10 @@ namespace intrin512 {
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TEST(hal_intrin512, float16x32_FP16)
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{
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#if CV_TRY_FP16
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CV_CPU_CALL_AVX512_SKX_(test_hal_intrin_float16, ());
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throw SkipTestException("Unsupported hardware: FP16 is not available");
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#endif
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throw SkipTestException("Unsupported: FP16 is not available");
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}
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@ -1902,21 +1902,21 @@ void test_hal_intrin_float64()
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#endif
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}
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#if CV_FP16
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void test_hal_intrin_float16()
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{
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DUMP_ENTRY(v_float16);
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#if CV_FP16
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TheTest<v_float32>()
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.test_loadstore_fp16_f32()
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#endif
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#if CV_SIMD_FP16
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.test_loadstore_fp16()
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.test_float_cvt_fp16()
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#endif
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;
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}
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#else
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std::cout << "SKIP: CV_FP16 is not available" << std::endl;
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#endif
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}
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/*#if defined(CV_CPU_DISPATCH_MODE_FP16) && CV_CPU_DISPATCH_MODE == FP16
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void test_hal_intrin_float16()
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