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core(merge): fix SIMD loop head processing
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@ -36,13 +36,14 @@ vecmerge_( const T** src, T* dst, int len, int cn )
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const T* src0 = src[0];
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const T* src0 = src[0];
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const T* src1 = src[1];
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const T* src1 = src[1];
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const int dstElemSize = cn * sizeof(T);
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int r = (int)((size_t)(void*)dst % (VECSZ*sizeof(T)));
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int r = (int)((size_t)(void*)dst % (VECSZ*sizeof(T)));
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hal::StoreMode mode = hal::STORE_ALIGNED_NOCACHE;
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hal::StoreMode mode = hal::STORE_ALIGNED_NOCACHE;
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if( r != 0 )
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if( r != 0 )
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{
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{
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mode = hal::STORE_UNALIGNED;
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mode = hal::STORE_UNALIGNED;
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if( r % cn == 0 && len > VECSZ )
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if (r % dstElemSize == 0 && len > VECSZ)
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i0 = VECSZ - (r / cn);
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i0 = VECSZ - (r / dstElemSize);
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}
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}
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if( cn == 2 )
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if( cn == 2 )
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