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core:ppc Several improvements on VSX(1)
* remove unnecessary defines from vsx_utils * fix v_load_expand, load lower 64bit * use vec_ld, vec_st with alignment load/store on all types except 64bit * map v_extract to v_rotate_right * update license header * enable VSX by default on clang since #11167
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Sayed Adel
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@ -318,7 +318,7 @@ OCV_OPTION(ENABLE_PROFILING "Enable profiling in the GCC compiler (Add
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OCV_OPTION(ENABLE_COVERAGE "Enable coverage collection with GCov" OFF IF CV_GCC )
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OCV_OPTION(ENABLE_OMIT_FRAME_POINTER "Enable -fomit-frame-pointer for GCC" ON IF CV_GCC )
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OCV_OPTION(ENABLE_POWERPC "Enable PowerPC for GCC" ON IF (CV_GCC AND CMAKE_SYSTEM_PROCESSOR MATCHES powerpc.*) )
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OCV_OPTION(ENABLE_VSX "Enable POWER8 and above VSX (64-bit little-endian)" ON IF (CV_GCC AND PPC64LE) )
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OCV_OPTION(ENABLE_VSX "Enable POWER8 and above VSX (64-bit little-endian)" ON IF ((CV_GCC OR CV_CLANG) AND PPC64LE) )
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OCV_OPTION(ENABLE_FAST_MATH "Enable -ffast-math (not recommended for GCC 4.6.x)" OFF IF (CV_GCC AND (X86 OR X86_64)) )
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OCV_OPTION(ENABLE_NEON "Enable NEON instructions" (NEON OR ANDROID_ARM_NEON OR AARCH64) IF (CV_GCC OR CV_CLANG) AND (ARM OR AARCH64 OR IOS) )
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OCV_OPTION(ENABLE_VFPV3 "Enable VFPv3-D32 instructions" OFF IF (CV_GCC OR CV_CLANG) AND (ARM OR AARCH64 OR IOS) )
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@ -1,46 +1,6 @@
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/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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||||
// By downloading, copying, installing or using the software you agree to this license.
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||||
// If you do not agree to this license, do not download, install,
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||||
// copy or use the software.
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||||
//
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||||
//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
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||||
// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
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// Copyright (C) 2013, OpenCV Foundation, all rights reserved.
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// Copyright (C) 2015, Itseez Inc., all rights reserved.
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||||
// Third party copyrights are property of their respective owners.
|
||||
//
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||||
// Redistribution and use in source and binary forms, with or without modification,
|
||||
// are permitted provided that the following conditions are met:
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||||
//
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||||
// * Redistribution's of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
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||||
//
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||||
// * Redistribution's in binary form must reproduce the above copyright notice,
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||||
// this list of conditions and the following disclaimer in the documentation
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||||
// and/or other materials provided with the distribution.
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||||
//
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||||
// * The name of the copyright holders may not be used to endorse or promote products
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||||
// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
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||||
// any express or implied warranties, including, but not limited to, the implied
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||||
// warranties of merchantability and fitness for a particular purpose are disclaimed.
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// In no event shall the Intel Corporation or contributors be liable for any direct,
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html
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#ifndef OPENCV_HAL_VSX_HPP
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#define OPENCV_HAL_VSX_HPP
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@ -276,34 +236,38 @@ OPENCV_HAL_IMPL_VSX_INITVEC(v_int64x2, int64, s64, vec_dword2)
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OPENCV_HAL_IMPL_VSX_INITVEC(v_float32x4, float, f32, vec_float4)
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OPENCV_HAL_IMPL_VSX_INITVEC(v_float64x2, double, f64, vec_double2)
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#define OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(_Tpvec, _Tp, ld_func, st_func) \
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#define OPENCV_HAL_IMPL_VSX_LOADSTORE_C(_Tpvec, _Tp, ld, ld_a, st, st_a) \
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inline _Tpvec v_load(const _Tp* ptr) \
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{ return _Tpvec(ld_func(0, ptr)); } \
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inline _Tpvec v_load_aligned(const _Tp* ptr) \
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{ return _Tpvec(ld_func(0, ptr)); } \
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{ return _Tpvec(ld(0, ptr)); } \
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inline _Tpvec v_load_aligned(VSX_UNUSED(const _Tp* ptr)) \
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{ return _Tpvec(ld_a(0, ptr)); } \
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inline _Tpvec v_load_low(const _Tp* ptr) \
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{ return _Tpvec(vec_ld_l8(ptr)); } \
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inline _Tpvec v_load_halves(const _Tp* ptr0, const _Tp* ptr1) \
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{ return _Tpvec(vec_mergesqh(vec_ld_l8(ptr0), vec_ld_l8(ptr1))); } \
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inline void v_store(_Tp* ptr, const _Tpvec& a) \
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{ st_func(a.val, 0, ptr); } \
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inline void v_store_aligned(_Tp* ptr, const _Tpvec& a) \
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{ st_func(a.val, 0, ptr); } \
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{ st(a.val, 0, ptr); } \
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inline void v_store_aligned(VSX_UNUSED(_Tp* ptr), const _Tpvec& a) \
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{ st_a(a.val, 0, ptr); } \
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inline void v_store_low(_Tp* ptr, const _Tpvec& a) \
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{ vec_st_l8(a.val, ptr); } \
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inline void v_store_high(_Tp* ptr, const _Tpvec& a) \
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{ vec_st_h8(a.val, ptr); }
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_uint8x16, uchar, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_int8x16, schar, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_uint16x8, ushort, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_int16x8, short, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_uint32x4, uint, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_int32x4, int, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_float32x4, float, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_float64x2, double, vsx_ld, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_uint64x2, uint64, vsx_ld2, vsx_st2)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_INT_OP(v_int64x2, int64, vsx_ld2, vsx_st2)
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#define OPENCV_HAL_IMPL_VSX_LOADSTORE(_Tpvec, _Tp) \
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OPENCV_HAL_IMPL_VSX_LOADSTORE_C(_Tpvec, _Tp, vsx_ld, vec_ld, vsx_st, vec_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_uint8x16, uchar)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_int8x16, schar)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_uint16x8, ushort)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_int16x8, short)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_uint32x4, uint)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_int32x4, int)
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OPENCV_HAL_IMPL_VSX_LOADSTORE(v_float32x4, float)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_C(v_float64x2, double, vsx_ld, vsx_ld, vsx_st, vsx_st)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_C(v_uint64x2, uint64, vsx_ld2, vsx_ld2, vsx_st2, vsx_st2)
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OPENCV_HAL_IMPL_VSX_LOADSTORE_C(v_int64x2, int64, vsx_ld2, vsx_ld2, vsx_st2, vsx_st2)
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//////////////// Value reordering ///////////////
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@ -343,7 +307,7 @@ inline void v_expand(const _Tpvec& a, _Tpwvec& b0, _Tpwvec& b1) \
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b1.val = fl(a.val); \
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} \
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inline _Tpwvec v_load_expand(const _Tp* ptr) \
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{ return _Tpwvec(fh(vsx_ld(0, ptr))); }
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{ return _Tpwvec(fh(vec_ld_l8(ptr))); }
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OPENCV_HAL_IMPL_VSX_EXPAND(v_uint8x16, v_uint16x8, uchar, vec_unpacklu, vec_unpackhu)
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OPENCV_HAL_IMPL_VSX_EXPAND(v_int8x16, v_int16x8, schar, vec_unpackl, vec_unpackh)
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@ -353,10 +317,10 @@ OPENCV_HAL_IMPL_VSX_EXPAND(v_uint32x4, v_uint64x2, uint, vec_unpacklu, vec_unpac
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OPENCV_HAL_IMPL_VSX_EXPAND(v_int32x4, v_int64x2, int, vec_unpackl, vec_unpackh)
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inline v_uint32x4 v_load_expand_q(const uchar* ptr)
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{ return v_uint32x4(vec_ld_buw(ptr)); }
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{ return v_uint32x4(vec_uint4_set(ptr[0], ptr[1], ptr[2], ptr[3])); }
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inline v_int32x4 v_load_expand_q(const schar* ptr)
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{ return v_int32x4(vec_ld_bsw(ptr)); }
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{ return v_int32x4(vec_int4_set(ptr[0], ptr[1], ptr[2], ptr[3])); }
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/* pack */
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#define OPENCV_HAL_IMPL_VSX_PACK(_Tpvec, _Tp, _Tpwvec, _Tpvn, _Tpdel, sfnc, pkfnc, addfnc, pack) \
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@ -429,36 +393,6 @@ inline void v_recombine(const _Tpvec& a, const _Tpvec& b, _Tpvec& c, _Tpvec& d)
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d.val = vec_mergesql(a.val, b.val);
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}
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/* Extract */
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template<int s, typename _Tpvec>
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inline _Tpvec v_extract(const _Tpvec& a, const _Tpvec& b)
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{
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const int w = sizeof(typename _Tpvec::lane_type);
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const int n = _Tpvec::nlanes;
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const unsigned int sf = ((w * n) - (s * w));
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if (s == 0)
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return _Tpvec(a.val);
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else if (sf > 15)
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return _Tpvec();
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// bitwise it just to make xlc happy
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return _Tpvec(vec_sld(b.val, a.val, sf & 15));
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}
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#define OPENCV_HAL_IMPL_VSX_EXTRACT_2(_Tpvec) \
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template<int s> \
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inline _Tpvec v_extract(const _Tpvec& a, const _Tpvec& b) \
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{ \
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switch(s) { \
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case 0: return _Tpvec(a.val); \
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case 2: return _Tpvec(b.val); \
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case 1: return _Tpvec(vec_sldw(b.val, a.val, 2)); \
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default: return _Tpvec(); \
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} \
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}
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OPENCV_HAL_IMPL_VSX_EXTRACT_2(v_uint64x2)
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OPENCV_HAL_IMPL_VSX_EXTRACT_2(v_int64x2)
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////////// Arithmetic, bitwise and comparison operations /////////
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/* Element-wise binary and unary operations */
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@ -669,6 +603,11 @@ OPENCV_IMPL_VSX_ROTATE_64(v_uint64x2, right, a, b)
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OPENCV_IMPL_VSX_ROTATE_64(v_int64x2, left, b, a)
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OPENCV_IMPL_VSX_ROTATE_64(v_uint64x2, left, b, a)
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/* Extract */
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template<int s, typename _Tpvec>
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inline _Tpvec v_extract(const _Tpvec& a, const _Tpvec& b)
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{ return v_rotate_right<s>(a, b); }
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////////// Reduce and mask /////////
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/** Reduce **/
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@ -1,46 +1,6 @@
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/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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// By downloading, copying, installing or using the software you agree to this license.
|
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// If you do not agree to this license, do not download, install,
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// copy or use the software.
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//
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//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
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// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
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// Copyright (C) 2013, OpenCV Foundation, all rights reserved.
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// Copyright (C) 2015, Itseez Inc., all rights reserved.
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// Third party copyrights are property of their respective owners.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
|
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//
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||||
// * Redistribution's of source code must retain the above copyright notice,
|
||||
// this list of conditions and the following disclaimer.
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||||
//
|
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// * Redistribution's in binary form must reproduce the above copyright notice,
|
||||
// this list of conditions and the following disclaimer in the documentation
|
||||
// and/or other materials provided with the distribution.
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//
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// * The name of the copyright holders may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
|
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// any express or implied warranties, including, but not limited to, the implied
|
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// warranties of merchantability and fitness for a particular purpose are disclaimed.
|
||||
// In no event shall the Intel Corporation or contributors be liable for any direct,
|
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
|
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html
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#ifndef OPENCV_HAL_VSX_UTILS_HPP
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#define OPENCV_HAL_VSX_UTILS_HPP
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@ -64,106 +24,77 @@ typedef __vector unsigned char vec_uchar16;
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#define vec_uchar16_set(...) (vec_uchar16){__VA_ARGS__}
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#define vec_uchar16_sp(c) (__VSX_S16__(vec_uchar16, c))
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#define vec_uchar16_c(v) ((vec_uchar16)(v))
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#define vec_uchar16_mx vec_uchar16_sp(0xFF)
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#define vec_uchar16_mn vec_uchar16_sp(0)
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#define vec_uchar16_z vec_uchar16_mn
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#define vec_uchar16_z vec_uchar16_sp(0)
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typedef __vector signed char vec_char16;
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#define vec_char16_set(...) (vec_char16){__VA_ARGS__}
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#define vec_char16_sp(c) (__VSX_S16__(vec_char16, c))
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#define vec_char16_c(v) ((vec_char16)(v))
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#define vec_char16_mx vec_char16_sp(0x7F)
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#define vec_char16_mn vec_char16_sp(-0x7F-1)
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#define vec_char16_z vec_char16_sp(0)
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typedef __vector unsigned short vec_ushort8;
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#define vec_ushort8_set(...) (vec_ushort8){__VA_ARGS__}
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#define vec_ushort8_sp(c) (__VSX_S8__(vec_ushort8, c))
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#define vec_ushort8_c(v) ((vec_ushort8)(v))
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#define vec_ushort8_mx vec_ushort8_sp(0xFFFF)
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#define vec_ushort8_mn vec_ushort8_sp(0)
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#define vec_ushort8_z vec_ushort8_mn
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#define vec_ushort8_z vec_ushort8_sp(0)
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typedef __vector signed short vec_short8;
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#define vec_short8_set(...) (vec_short8){__VA_ARGS__}
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#define vec_short8_sp(c) (__VSX_S8__(vec_short8, c))
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#define vec_short8_c(v) ((vec_short8)(v))
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#define vec_short8_mx vec_short8_sp(0x7FFF)
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#define vec_short8_mn vec_short8_sp(-0x7FFF-1)
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#define vec_short8_z vec_short8_sp(0)
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typedef __vector unsigned int vec_uint4;
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#define vec_uint4_set(...) (vec_uint4){__VA_ARGS__}
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#define vec_uint4_sp(c) (__VSX_S4__(vec_uint4, c))
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#define vec_uint4_c(v) ((vec_uint4)(v))
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#define vec_uint4_mx vec_uint4_sp(0xFFFFFFFFU)
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#define vec_uint4_mn vec_uint4_sp(0)
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#define vec_uint4_z vec_uint4_mn
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#define vec_uint4_z vec_uint4_sp(0)
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typedef __vector signed int vec_int4;
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#define vec_int4_set(...) (vec_int4){__VA_ARGS__}
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#define vec_int4_sp(c) (__VSX_S4__(vec_int4, c))
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#define vec_int4_c(v) ((vec_int4)(v))
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#define vec_int4_mx vec_int4_sp(0x7FFFFFFF)
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#define vec_int4_mn vec_int4_sp(-0x7FFFFFFF-1)
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#define vec_int4_z vec_int4_sp(0)
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typedef __vector float vec_float4;
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#define vec_float4_set(...) (vec_float4){__VA_ARGS__}
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#define vec_float4_sp(c) (__VSX_S4__(vec_float4, c))
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#define vec_float4_c(v) ((vec_float4)(v))
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#define vec_float4_mx vec_float4_sp(3.40282347E+38F)
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#define vec_float4_mn vec_float4_sp(1.17549435E-38F)
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#define vec_float4_z vec_float4_sp(0)
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typedef __vector unsigned long long vec_udword2;
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#define vec_udword2_set(...) (vec_udword2){__VA_ARGS__}
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#define vec_udword2_sp(c) (__VSX_S2__(vec_udword2, c))
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#define vec_udword2_c(v) ((vec_udword2)(v))
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#define vec_udword2_mx vec_udword2_sp(18446744073709551615ULL)
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#define vec_udword2_mn vec_udword2_sp(0)
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#define vec_udword2_z vec_udword2_mn
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#define vec_udword2_z vec_udword2_sp(0)
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typedef __vector signed long long vec_dword2;
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#define vec_dword2_set(...) (vec_dword2){__VA_ARGS__}
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#define vec_dword2_sp(c) (__VSX_S2__(vec_dword2, c))
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#define vec_dword2_c(v) ((vec_dword2)(v))
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#define vec_dword2_mx vec_dword2_sp(9223372036854775807LL)
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#define vec_dword2_mn vec_dword2_sp(-9223372036854775807LL-1)
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#define vec_dword2_z vec_dword2_sp(0)
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typedef __vector double vec_double2;
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#define vec_double2_set(...) (vec_double2){__VA_ARGS__}
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#define vec_double2_c(v) ((vec_double2)(v))
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#define vec_double2_sp(c) (__VSX_S2__(vec_double2, c))
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#define vec_double2_mx vec_double2_sp(1.7976931348623157E+308)
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#define vec_double2_mn vec_double2_sp(2.2250738585072014E-308)
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#define vec_double2_z vec_double2_sp(0)
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#define vec_bchar16 __vector __bool char
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#define vec_bchar16_set(...) (vec_bchar16){__VA_ARGS__}
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#define vec_bchar16_c(v) ((vec_bchar16)(v))
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#define vec_bchar16_f (__VSX_S16__(vec_bchar16, 0))
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#define vec_bchar16_t (__VSX_S16__(vec_bchar16, 1))
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#define vec_bshort8 __vector __bool short
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#define vec_bshort8_set(...) (vec_bshort8){__VA_ARGS__}
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#define vec_bshort8_c(v) ((vec_bshort8)(v))
|
||||
#define vec_bshort8_f (__VSX_S8__(vec_bshort8, 0))
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#define vec_bshort8_t (__VSX_S8__(vec_bshort8, 1))
|
||||
|
||||
#define vec_bint4 __vector __bool int
|
||||
#define vec_bint4_set(...) (vec_bint4){__VA_ARGS__}
|
||||
#define vec_bint4_c(v) ((vec_bint4)(v))
|
||||
#define vec_bint4_f (__VSX_S4__(vec_bint4, 0))
|
||||
#define vec_bint4_t (__VSX_S4__(vec_bint4, 1))
|
||||
|
||||
#define vec_bdword2 __vector __bool long long
|
||||
#define vec_bdword2_set(...) (vec_bdword2){__VA_ARGS__}
|
||||
#define vec_bdword2_c(v) ((vec_bdword2)(v))
|
||||
#define vec_bdword2_f (__VSX_S2__(vec_bdword2, 0))
|
||||
#define vec_bdword2_t (__VSX_S2__(vec_bdword2, 1))
|
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|
||||
|
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#define VSX_FINLINE(tp) extern inline tp __attribute__((always_inline))
|
||||
|
||||
@ -688,34 +619,17 @@ VSX_IMPL_CONV_ODD_2_4(vec_uint4, vec_double2, vec_ctuo, vec_ctu)
|
||||
{ vsx_stf(vec, VSX_OFFSET(o, p), (long long*)p); }
|
||||
#endif
|
||||
|
||||
// load 4 unsigned bytes into uint4 vector
|
||||
#define vec_ld_buw(p) vec_uint4_set((p)[0], (p)[1], (p)[2], (p)[3])
|
||||
|
||||
// load 4 signed bytes into int4 vector
|
||||
#define vec_ld_bsw(p) vec_int4_set((p)[0], (p)[1], (p)[2], (p)[3])
|
||||
|
||||
// load 4 unsigned bytes into float vector
|
||||
#define vec_ld_bps(p) vec_ctf(vec_ld_buw(p), 0)
|
||||
|
||||
// Store lower 8 byte
|
||||
#define vec_st_l8(v, p) *((uint64*)(p)) = vec_extract(vec_udword2_c(v), 0)
|
||||
|
||||
// Store higher 8 byte
|
||||
#define vec_st_h8(v, p) *((uint64*)(p)) = vec_extract(vec_udword2_c(v), 1)
|
||||
|
||||
/*
|
||||
* vec_ld_l8(ptr) -> Load 64-bits of integer data to lower part
|
||||
* vec_ldz_l8(ptr) -> Load 64-bits of integer data to lower part and zero upper part
|
||||
**/
|
||||
#define VSX_IMPL_LOAD_L8(Tvec, Tp) \
|
||||
VSX_FINLINE(Tvec) vec_ld_l8(const Tp *p) \
|
||||
{ return ((Tvec)vec_promote(*((uint64*)p), 0)); } \
|
||||
VSX_FINLINE(Tvec) vec_ldz_l8(const Tp *p) \
|
||||
{ \
|
||||
/* TODO: try (Tvec)(vec_udword2{*((uint64*)p), 0}) */ \
|
||||
static const vec_bdword2 mask = {0xFFFFFFFFFFFFFFFF, 0x0000000000000000}; \
|
||||
return vec_and(vec_ld_l8(p), (Tvec)mask); \
|
||||
}
|
||||
// Load 64-bits of integer data to lower part
|
||||
#define VSX_IMPL_LOAD_L8(Tvec, Tp) \
|
||||
VSX_FINLINE(Tvec) vec_ld_l8(const Tp *p) \
|
||||
{ return ((Tvec)vec_promote(*((uint64*)p), 0)); }
|
||||
|
||||
VSX_IMPL_LOAD_L8(vec_uchar16, uchar)
|
||||
VSX_IMPL_LOAD_L8(vec_char16, schar)
|
||||
VSX_IMPL_LOAD_L8(vec_ushort8, ushort)
|
||||
@ -745,11 +659,11 @@ VSX_IMPL_LOAD_L8(vec_double2, double)
|
||||
* Implement vec_unpacklu and vec_unpackhu
|
||||
* since vec_unpackl, vec_unpackh only support signed integers
|
||||
**/
|
||||
#define VSX_IMPL_UNPACKU(rt, rg, zero) \
|
||||
VSX_FINLINE(rt) vec_unpacklu(const rg& a) \
|
||||
{ return reinterpret_cast<rt>(vec_mergel(a, zero)); } \
|
||||
VSX_FINLINE(rt) vec_unpackhu(const rg& a) \
|
||||
{ return reinterpret_cast<rt>(vec_mergeh(a, zero)); }
|
||||
#define VSX_IMPL_UNPACKU(rt, rg, zero) \
|
||||
VSX_FINLINE(rt) vec_unpacklu(const rg& a) \
|
||||
{ return (rt)(vec_mergel(a, zero)); } \
|
||||
VSX_FINLINE(rt) vec_unpackhu(const rg& a) \
|
||||
{ return (rt)(vec_mergeh(a, zero)); }
|
||||
|
||||
VSX_IMPL_UNPACKU(vec_ushort8, vec_uchar16, vec_uchar16_z)
|
||||
VSX_IMPL_UNPACKU(vec_uint4, vec_ushort8, vec_ushort8_z)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user