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imgproc: get rid of filter.avx2.cpp
This commit is contained in:
parent
9a8dbfd57f
commit
8546ac3ce6
@ -1,197 +0,0 @@
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/*M///////////////////////////////////////////////////////////////////////////////////////
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//
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// IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.
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//
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// By downloading, copying, installing or using the software you agree to this license.
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// If you do not agree to this license, do not download, install,
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// copy or use the software.
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//
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//
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// License Agreement
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// For Open Source Computer Vision Library
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//
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// Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
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// Copyright (C) 2009, Willow Garage Inc., all rights reserved.
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// Third party copyrights are property of their respective owners.
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//
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// Redistribution and use in source and binary forms, with or without modification,
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// are permitted provided that the following conditions are met:
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//
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// * Redistribution's of source code must retain the above copyright notice,
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// this list of conditions and the following disclaimer.
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//
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// * Redistribution's in binary form must reproduce the above copyright notice,
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// this list of conditions and the following disclaimer in the documentation
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// and/or other materials provided with the distribution.
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//
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// * The name of the copyright holders may not be used to endorse or promote products
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// derived from this software without specific prior written permission.
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//
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// This software is provided by the copyright holders and contributors "as is" and
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// any express or implied warranties, including, but not limited to, the implied
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// warranties of merchantability and fitness for a particular purpose are disclaimed.
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// In no event shall the Intel Corporation or contributors be liable for any direct,
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// indirect, incidental, special, exemplary, or consequential damages
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// (including, but not limited to, procurement of substitute goods or services;
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// loss of use, data, or profits; or business interruption) however caused
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// and on any theory of liability, whether in contract, strict liability,
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// or tort (including negligence or otherwise) arising in any way out of
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// the use of this software, even if advised of the possibility of such damage.
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//
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//M*/
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#include "precomp.hpp"
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#include "filter.hpp"
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namespace cv
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{
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int RowVec_32f_AVX(const float* src0, const float* _kx, float* dst, int width, int cn, int _ksize)
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{
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int i = 0, k;
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for (; i <= width - 8; i += 8)
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{
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const float* src = src0 + i;
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__m256 f, x0;
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__m256 s0 = _mm256_set1_ps(0.0f);
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for (k = 0; k < _ksize; k++, src += cn)
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{
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f = _mm256_set1_ps(_kx[k]);
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x0 = _mm256_loadu_ps(src);
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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}
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_mm256_zeroupper();
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return i;
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}
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int SymmColumnVec_32f_Symm_AVX(const float** src, const float* ky, float* dst, float delta, int width, int ksize2)
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{
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int i = 0, k;
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const float *S, *S2;
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const __m128 d4 = _mm_set1_ps(delta);
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const __m256 d8 = _mm256_set1_ps(delta);
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for( ; i <= width - 16; i += 16 )
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{
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__m256 f = _mm256_set1_ps(ky[0]);
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__m256 s0, s1;
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__m256 x0;
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S = src[0] + i;
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s0 = _mm256_loadu_ps(S);
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(s0, f, d8);
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#else
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s0 = _mm256_add_ps(_mm256_mul_ps(s0, f), d8);
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#endif
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s1 = _mm256_loadu_ps(S+8);
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(s1, f, d8);
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#else
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s1 = _mm256_add_ps(_mm256_mul_ps(s1, f), d8);
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#endif
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for( k = 1; k <= ksize2; k++ )
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{
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S = src[k] + i;
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S2 = src[-k] + i;
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f = _mm256_set1_ps(ky[k]);
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x0 = _mm256_add_ps(_mm256_loadu_ps(S), _mm256_loadu_ps(S2));
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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x0 = _mm256_add_ps(_mm256_loadu_ps(S+8), _mm256_loadu_ps(S2+8));
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(x0, f, s1);
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#else
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s1 = _mm256_add_ps(s1, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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_mm256_storeu_ps(dst + i + 8, s1);
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}
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for( ; i <= width - 4; i += 4 )
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{
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__m128 f = _mm_set1_ps(ky[0]);
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__m128 x0, s0 = _mm_load_ps(src[0] + i);
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s0 = _mm_add_ps(_mm_mul_ps(s0, f), d4);
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for( k = 1; k <= ksize2; k++ )
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{
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f = _mm_set1_ps(ky[k]);
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x0 = _mm_add_ps(_mm_load_ps(src[k]+i), _mm_load_ps(src[-k] + i));
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s0 = _mm_add_ps(s0, _mm_mul_ps(x0, f));
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}
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_mm_storeu_ps(dst + i, s0);
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}
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_mm256_zeroupper();
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return i;
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}
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int SymmColumnVec_32f_Unsymm_AVX(const float** src, const float* ky, float* dst, float delta, int width, int ksize2)
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{
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int i = 0, k;
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const float *S2;
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const __m128 d4 = _mm_set1_ps(delta);
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const __m256 d8 = _mm256_set1_ps(delta);
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for (; i <= width - 16; i += 16)
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{
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__m256 f, s0 = d8, s1 = d8;
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__m256 x0;
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for (k = 1; k <= ksize2; k++)
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{
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const float *S = src[k] + i;
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S2 = src[-k] + i;
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f = _mm256_set1_ps(ky[k]);
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x0 = _mm256_sub_ps(_mm256_loadu_ps(S), _mm256_loadu_ps(S2));
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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x0 = _mm256_sub_ps(_mm256_loadu_ps(S + 8), _mm256_loadu_ps(S2 + 8));
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(x0, f, s1);
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#else
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s1 = _mm256_add_ps(s1, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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_mm256_storeu_ps(dst + i + 8, s1);
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}
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for (; i <= width - 4; i += 4)
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{
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__m128 f, x0, s0 = d4;
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for (k = 1; k <= ksize2; k++)
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{
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f = _mm_set1_ps(ky[k]);
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x0 = _mm_sub_ps(_mm_load_ps(src[k] + i), _mm_load_ps(src[-k] + i));
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s0 = _mm_add_ps(s0, _mm_mul_ps(x0, f));
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}
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_mm_storeu_ps(dst + i, s0);
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}
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_mm256_zeroupper();
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return i;
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}
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}
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/* End of file. */
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@ -45,12 +45,6 @@
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namespace cv
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{
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#if CV_TRY_AVX2
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int RowVec_32f_AVX(const float* src0, const float* _kx, float* dst, int width, int cn, int _ksize);
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int SymmColumnVec_32f_Symm_AVX(const float** src, const float* ky, float* dst, float delta, int width, int ksize2);
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int SymmColumnVec_32f_Unsymm_AVX(const float** src, const float* ky, float* dst, float delta, int width, int ksize2);
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#endif
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#ifdef HAVE_OPENCL
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bool ocl_sepFilter2D( InputArray _src, OutputArray _dst, int ddepth,
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InputArray _kernelX, InputArray _kernelY, Point anchor,
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@ -1507,7 +1507,6 @@ struct RowVec_32f
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{
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RowVec_32f()
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{
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haveAVX2 = CV_CPU_HAS_SUPPORT_AVX2;
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#if defined USE_IPP_SEP_FILTERS
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bufsz = -1;
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#endif
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@ -1516,7 +1515,6 @@ struct RowVec_32f
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RowVec_32f( const Mat& _kernel )
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{
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kernel = _kernel;
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haveAVX2 = CV_CPU_HAS_SUPPORT_AVX2;
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#if defined USE_IPP_SEP_FILTERS
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bufsz = -1;
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#endif
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@ -1543,9 +1541,24 @@ struct RowVec_32f
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int i = 0, k;
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width *= cn;
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#if CV_TRY_AVX2
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if (haveAVX2)
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return RowVec_32f_AVX(src0, _kx, dst, width, cn, _ksize);
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#if CV_AVX
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for (; i <= width - 8; i += 8)
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{
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const float* src = src0 + i;
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__m256 f, x0;
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__m256 s0 = _mm256_set1_ps(0.0f);
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for (k = 0; k < _ksize; k++, src += cn)
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{
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f = _mm256_set1_ps(_kx[k]);
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x0 = _mm256_loadu_ps(src);
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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}
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#endif
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v_float32 k0 = vx_setall_f32(_kx[0]);
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for( ; i <= width - 4*v_float32::nlanes; i += 4*v_float32::nlanes )
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@ -1599,7 +1612,6 @@ struct RowVec_32f
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}
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Mat kernel;
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bool haveAVX2;
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#if defined USE_IPP_SEP_FILTERS
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private:
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mutable int bufsz;
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@ -1754,7 +1766,6 @@ struct SymmColumnVec_32f
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{
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SymmColumnVec_32f() {
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symmetryType=0;
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haveAVX2 = CV_CPU_HAS_SUPPORT_AVX2;
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delta = 0;
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}
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SymmColumnVec_32f(const Mat& _kernel, int _symmetryType, int, double _delta)
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@ -1762,7 +1773,6 @@ struct SymmColumnVec_32f
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symmetryType = _symmetryType;
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kernel = _kernel;
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delta = (float)_delta;
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haveAVX2 = CV_CPU_HAS_SUPPORT_AVX2;
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CV_Assert( (symmetryType & (KERNEL_SYMMETRICAL | KERNEL_ASYMMETRICAL)) != 0 );
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}
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@ -1780,9 +1790,53 @@ struct SymmColumnVec_32f
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if( symmetrical )
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{
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#if CV_TRY_AVX2
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if (haveAVX2)
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return SymmColumnVec_32f_Symm_AVX(src, ky, dst, delta, width, ksize2);
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#if CV_AVX
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{
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const float *S, *S2;
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const __m256 d8 = _mm256_set1_ps(delta);
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for( ; i <= width - 16; i += 16 )
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{
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__m256 f = _mm256_set1_ps(ky[0]);
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__m256 s0, s1;
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__m256 x0;
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S = src[0] + i;
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s0 = _mm256_loadu_ps(S);
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(s0, f, d8);
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#else
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s0 = _mm256_add_ps(_mm256_mul_ps(s0, f), d8);
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#endif
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s1 = _mm256_loadu_ps(S+8);
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(s1, f, d8);
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#else
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s1 = _mm256_add_ps(_mm256_mul_ps(s1, f), d8);
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#endif
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for( k = 1; k <= ksize2; k++ )
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{
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S = src[k] + i;
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S2 = src[-k] + i;
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f = _mm256_set1_ps(ky[k]);
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x0 = _mm256_add_ps(_mm256_loadu_ps(S), _mm256_loadu_ps(S2));
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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x0 = _mm256_add_ps(_mm256_loadu_ps(S+8), _mm256_loadu_ps(S2+8));
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(x0, f, s1);
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#else
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s1 = _mm256_add_ps(s1, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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_mm256_storeu_ps(dst + i + 8, s1);
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}
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}
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#endif
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const v_float32 d4 = vx_setall_f32(delta);
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const v_float32 k0 = vx_setall_f32(ky[0]);
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@ -1830,11 +1884,41 @@ struct SymmColumnVec_32f
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}
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else
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{
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#if CV_TRY_AVX2
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if (haveAVX2)
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return SymmColumnVec_32f_Unsymm_AVX(src, ky, dst, delta, width, ksize2);
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#endif
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CV_DbgAssert(ksize2 > 0);
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#if CV_AVX
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{
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const float *S2;
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const __m256 d8 = _mm256_set1_ps(delta);
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for (; i <= width - 16; i += 16)
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{
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__m256 f, s0 = d8, s1 = d8;
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__m256 x0;
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for (k = 1; k <= ksize2; k++)
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{
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const float *S = src[k] + i;
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S2 = src[-k] + i;
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f = _mm256_set1_ps(ky[k]);
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x0 = _mm256_sub_ps(_mm256_loadu_ps(S), _mm256_loadu_ps(S2));
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#if CV_FMA3
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s0 = _mm256_fmadd_ps(x0, f, s0);
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#else
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s0 = _mm256_add_ps(s0, _mm256_mul_ps(x0, f));
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#endif
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x0 = _mm256_sub_ps(_mm256_loadu_ps(S + 8), _mm256_loadu_ps(S2 + 8));
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#if CV_FMA3
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s1 = _mm256_fmadd_ps(x0, f, s1);
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#else
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s1 = _mm256_add_ps(s1, _mm256_mul_ps(x0, f));
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#endif
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}
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_mm256_storeu_ps(dst + i, s0);
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_mm256_storeu_ps(dst + i + 8, s1);
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}
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}
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#endif
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const v_float32 d4 = vx_setall_f32(delta);
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const v_float32 k1 = vx_setall_f32(ky[1]);
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for( ; i <= width - 4*v_float32::nlanes; i += 4*v_float32::nlanes )
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@ -1885,7 +1969,6 @@ struct SymmColumnVec_32f
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int symmetryType;
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float delta;
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Mat kernel;
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bool haveAVX2;
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};
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