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Merge pull request #21686 from anna-khakimova:ak/dynamic_disp_add_kernel
This commit is contained in:
commit
ac8a27cba9
@ -28,8 +28,8 @@ INSTANTIATE_TEST_CASE_P(SqrtPerfTestFluid, SqrtPerfTest,
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INSTANTIATE_TEST_CASE_P(AddPerfTestFluid, AddPerfTest,
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Combine(Values(Tolerance_FloatRel_IntAbs(1e-6, 1).to_compare_f()),
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Values(szSmall128, szVGA, sz720p, sz1080p),
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Values(CV_8UC1, CV_8UC3, CV_16SC1, CV_32FC1),
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Values(-1, CV_8U, CV_32F),
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Values(CV_8UC1, CV_8UC3, CV_16UC1, CV_16SC1, CV_32FC1),
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Values(-1, CV_8U, CV_16U, CV_16S, CV_32F),
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Values(cv::compile_args(CORE_FLUID))));
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INSTANTIATE_TEST_CASE_P(AddCPerfTestFluid, AddCPerfTest,
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@ -379,136 +379,6 @@ CV_ALWAYS_INLINE int absdiff_simd(const T in1[], const T in2[], T out[], int len
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return 0;
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}
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template<typename T, typename VT>
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CV_ALWAYS_INLINE int add_simd_sametype(const T in1[], const T in2[], T out[], int length)
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{
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constexpr int nlanes = static_cast<int>(VT::nlanes);
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if (length < nlanes)
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return 0;
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int x = 0;
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for (;;)
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{
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for (; x <= length - nlanes; x += nlanes)
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{
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VT a = vx_load(&in1[x]);
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VT b = vx_load(&in2[x]);
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vx_store(&out[x], a + b);
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}
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if (x < length && (in1 != out) && (in2 != out))
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{
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x = length - nlanes;
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continue; // process one more time (unaligned tail)
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}
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break;
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}
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return x;
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}
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template<typename SRC, typename DST>
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CV_ALWAYS_INLINE int add_simd(const SRC in1[], const SRC in2[], DST out[], int length)
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{
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if (std::is_same<DST, float>::value && !std::is_same<SRC, float>::value)
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return 0;
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if (std::is_same<DST, SRC>::value)
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{
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if (std::is_same<DST, uchar>::value)
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{
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return add_simd_sametype<uchar, v_uint8>(reinterpret_cast<const uchar*>(in1),
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reinterpret_cast<const uchar*>(in2),
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reinterpret_cast<uchar*>(out), length);
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}
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else if (std::is_same<DST, short>::value)
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{
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return add_simd_sametype<short, v_int16>(reinterpret_cast<const short*>(in1),
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reinterpret_cast<const short*>(in2),
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reinterpret_cast<short*>(out), length);
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}
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else if (std::is_same<DST, float>::value)
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{
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return add_simd_sametype<float, v_float32>(reinterpret_cast<const float*>(in1),
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reinterpret_cast<const float*>(in2),
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reinterpret_cast<float*>(out), length);
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}
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}
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else if (std::is_same<SRC, short>::value && std::is_same<DST, uchar>::value)
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{
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constexpr int nlanes = static_cast<int>(v_uint8::nlanes);
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if (length < nlanes)
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return 0;
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int x = 0;
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for (;;)
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{
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for (; x <= length - nlanes; x += nlanes)
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{
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v_int16 a1 = vx_load(reinterpret_cast<const short*>(&in1[x]));
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v_int16 a2 = vx_load(reinterpret_cast<const short*>(&in1[x + nlanes / 2]));
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v_int16 b1 = vx_load(reinterpret_cast<const short*>(&in2[x]));
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v_int16 b2 = vx_load(reinterpret_cast<const short*>(&in2[x + nlanes / 2]));
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vx_store(reinterpret_cast<uchar*>(&out[x]), v_pack_u(a1 + b1, a2 + b2));
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}
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if (x < length)
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{
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CV_DbgAssert((reinterpret_cast<const short*>(in1) != reinterpret_cast<const short*>(out)) &&
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(reinterpret_cast<const short*>(in2) != reinterpret_cast<const short*>(out)));
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x = length - nlanes;
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continue; // process one more time (unaligned tail)
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}
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break;
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}
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return x;
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}
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else if (std::is_same<SRC, float>::value && std::is_same<DST, uchar>::value)
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{
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constexpr int nlanes = static_cast<int>(v_uint8::nlanes);
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if (length < nlanes)
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return 0;
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int x = 0;
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for (;;)
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{
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for (; x <= length - nlanes; x += nlanes)
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{
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v_float32 a1 = vx_load(reinterpret_cast<const float*>(&in1[x]));
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v_float32 a2 = vx_load(reinterpret_cast<const float*>(&in1[x + nlanes / 4]));
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v_float32 a3 = vx_load(reinterpret_cast<const float*>(&in1[x + 2 * nlanes / 4]));
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v_float32 a4 = vx_load(reinterpret_cast<const float*>(&in1[x + 3 * nlanes / 4]));
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v_float32 b1 = vx_load(reinterpret_cast<const float*>(&in2[x]));
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v_float32 b2 = vx_load(reinterpret_cast<const float*>(&in2[x + nlanes / 4]));
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v_float32 b3 = vx_load(reinterpret_cast<const float*>(&in2[x + 2 * nlanes / 4]));
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v_float32 b4 = vx_load(reinterpret_cast<const float*>(&in2[x + 3 * nlanes / 4]));
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vx_store(reinterpret_cast<uchar*>(&out[x]), v_pack_u(v_pack(v_round(a1 + b1), v_round(a2 + b2)),
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v_pack(v_round(a3 + b3), v_round(a4 + b4))));
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}
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if (x < length)
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{
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CV_DbgAssert((reinterpret_cast<const float*>(in1) != reinterpret_cast<const float*>(out)) &&
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(reinterpret_cast<const float*>(in2) != reinterpret_cast<const float*>(out)));
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x = length - nlanes;
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continue; // process one more time (unaligned tail)
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}
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break;
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}
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return x;
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}
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return 0;
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}
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template<typename T, typename VT>
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CV_ALWAYS_INLINE int sub_simd_sametype(const T in1[], const T in2[], T out[], int length)
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{
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@ -641,7 +511,7 @@ CV_ALWAYS_INLINE int sub_simd(const SRC in1[], const SRC in2[], DST out[], int l
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#endif // CV_SIMD
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template<typename DST, typename SRC1, typename SRC2>
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static CV_ALWAYS_INLINE void run_arithm(Buffer &dst, const View &src1, const View &src2,
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CV_ALWAYS_INLINE void run_arithm(Buffer &dst, const View &src1, const View &src2,
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Arithm arithm, double scale=1)
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{
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static_assert(std::is_same<SRC1, SRC2>::value, "wrong types");
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@ -652,7 +522,7 @@ static CV_ALWAYS_INLINE void run_arithm(Buffer &dst, const View &src1, const Vie
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int width = dst.length();
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int chan = dst.meta().chan;
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int length = width * chan;
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const int length = width * chan;
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// NB: assume in/out types are not 64-bits
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float _scale = static_cast<float>( scale );
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@ -708,13 +578,22 @@ GAPI_FLUID_KERNEL(GFluidAdd, cv::gapi::core::GAdd, false)
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static void run(const View &src1, const View &src2, int /*dtype*/, Buffer &dst)
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{
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// DST SRC1 SRC2 OP __VA_ARGS__
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BINARY_(uchar , uchar , uchar , run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar , short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar , float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_( short, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_( float, uchar , uchar , run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_( float, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_( float, float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar, uchar, uchar, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar, ushort, ushort, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(uchar, float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(short, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(short, uchar, uchar, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(short, ushort, ushort, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(short, float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(ushort, ushort, ushort, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(ushort, uchar, uchar, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(ushort, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(ushort, float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(float, uchar, uchar, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(float, ushort, ushort, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(float, short, short, run_arithm, dst, src1, src2, ARITHM_ADD);
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BINARY_(float, float, float, run_arithm, dst, src1, src2, ARITHM_ADD);
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CV_Error(cv::Error::StsBadArg, "unsupported combination of types");
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}
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@ -290,6 +290,33 @@ int merge4_simd(const uchar in1[], const uchar in2[], const uchar in3[],
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CV_CPU_DISPATCH_MODES_ALL);
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}
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#define ADD_SIMD(SRC, DST) \
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int add_simd(const SRC in1[], const SRC in2[], DST out[], const int length) \
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{ \
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\
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CV_CPU_DISPATCH(add_simd, (in1, in2, out, length), \
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CV_CPU_DISPATCH_MODES_ALL); \
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}
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ADD_SIMD(uchar, uchar)
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ADD_SIMD(ushort, uchar)
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ADD_SIMD(short, uchar)
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ADD_SIMD(float, uchar)
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ADD_SIMD(short, short)
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ADD_SIMD(ushort, short)
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ADD_SIMD(uchar, short)
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ADD_SIMD(float, short)
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ADD_SIMD(ushort, ushort)
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ADD_SIMD(uchar, ushort)
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ADD_SIMD(short, ushort)
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ADD_SIMD(float, ushort)
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ADD_SIMD(uchar, float)
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ADD_SIMD(ushort, float)
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ADD_SIMD(short, float)
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ADD_SIMD(float, float)
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#undef ADD_SIMD
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} // namespace fluid
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} // namespace gapi
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} // namespace cv
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@ -222,6 +222,28 @@ int merge3_simd(const uchar in1[], const uchar in2[], const uchar in3[],
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int merge4_simd(const uchar in1[], const uchar in2[], const uchar in3[],
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const uchar in4[], uchar out[], const int width);
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#define ADD_SIMD(SRC, DST) \
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int add_simd(const SRC in1[], const SRC in2[], DST out[], const int length);
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ADD_SIMD(uchar, uchar)
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ADD_SIMD(ushort, uchar)
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ADD_SIMD(short, uchar)
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ADD_SIMD(float, uchar)
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ADD_SIMD(short, short)
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ADD_SIMD(ushort, short)
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ADD_SIMD(uchar, short)
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ADD_SIMD(float, short)
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ADD_SIMD(ushort, ushort)
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ADD_SIMD(uchar, ushort)
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ADD_SIMD(short, ushort)
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ADD_SIMD(float, ushort)
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ADD_SIMD(uchar, float)
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ADD_SIMD(ushort, float)
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ADD_SIMD(short, float)
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ADD_SIMD(float, float)
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#undef ADD_SIMD
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} // namespace fluid
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} // namespace gapi
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} // namespace cv
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|
@ -231,6 +231,28 @@ DIVRC_SIMD(float, float)
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#undef DIVRC_SIMD
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#define ADD_SIMD(SRC, DST) \
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int add_simd(const SRC in1[], const SRC in2[], DST out[], const int length);
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ADD_SIMD(uchar, uchar)
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ADD_SIMD(ushort, uchar)
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ADD_SIMD(short, uchar)
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ADD_SIMD(float, uchar)
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ADD_SIMD(short, short)
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ADD_SIMD(ushort, short)
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ADD_SIMD(uchar, short)
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ADD_SIMD(float, short)
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ADD_SIMD(ushort, ushort)
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ADD_SIMD(uchar, ushort)
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ADD_SIMD(short, ushort)
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ADD_SIMD(float, ushort)
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ADD_SIMD(uchar, float)
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ADD_SIMD(ushort, float)
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ADD_SIMD(short, float)
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ADD_SIMD(float, float)
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|
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#undef ADD_SIMD
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|
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int split3_simd(const uchar in[], uchar out1[], uchar out2[],
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uchar out3[], const int width);
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@ -2503,6 +2525,178 @@ int merge4_simd(const uchar in1[], const uchar in2[], const uchar in3[],
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return x;
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}
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//-------------------------
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//
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// Fluid kernels: Add
|
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//
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//-------------------------
|
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|
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CV_ALWAYS_INLINE void add_uchar_store(uchar* outx, const v_uint16& c1, const v_uint16& c2)
|
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{
|
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vx_store(outx, v_pack(c1, c2));
|
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}
|
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CV_ALWAYS_INLINE void add_uchar_store(uchar* outx, const v_int16& c1, const v_int16& c2)
|
||||
{
|
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vx_store(outx, v_pack_u(c1, c2));
|
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}
|
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|
||||
template<typename SRC, typename DST>
|
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CV_ALWAYS_INLINE
|
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typename std::enable_if<std::is_same<SRC, DST>::value, void>::type
|
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add_simd_impl(const SRC* in1x, const SRC* in2x, DST* outx)
|
||||
{
|
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vector_type_of_t<SRC> a = vx_load(in1x);
|
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vector_type_of_t<SRC> b = vx_load(in2x);
|
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vx_store(outx, a + b);
|
||||
}
|
||||
|
||||
template<typename SRC>
|
||||
CV_ALWAYS_INLINE
|
||||
typename std::enable_if<std::is_same<SRC, short>::value ||
|
||||
std::is_same<SRC, ushort>::value, void>::type
|
||||
add_simd_impl(const SRC* in1x, const SRC* in2x, uchar* outx)
|
||||
{
|
||||
constexpr int nlanes = v_uint8::nlanes;
|
||||
|
||||
vector_type_of_t<SRC> a1 = vx_load(in1x);
|
||||
vector_type_of_t<SRC> a2 = vx_load(&in1x[nlanes / 2]);
|
||||
vector_type_of_t<SRC> b1 = vx_load(in2x);
|
||||
vector_type_of_t<SRC> b2 = vx_load(&in2x[nlanes / 2]);
|
||||
|
||||
add_uchar_store(outx, a1 + b1, a2 + b2);
|
||||
}
|
||||
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const float* in1x, const float* in2x, uchar* outx)
|
||||
{
|
||||
constexpr int nlanes = v_uint8::nlanes;
|
||||
|
||||
v_float32 a1 = vx_load(in1x);
|
||||
v_float32 a2 = vx_load(&in1x[nlanes / 4]);
|
||||
v_float32 a3 = vx_load(&in1x[2 * nlanes / 4]);
|
||||
v_float32 a4 = vx_load(&in1x[3 * nlanes / 4]);
|
||||
|
||||
v_float32 b1 = vx_load(in2x);
|
||||
v_float32 b2 = vx_load(&in2x[nlanes / 4]);
|
||||
v_float32 b3 = vx_load(&in2x[2 * nlanes / 4]);
|
||||
v_float32 b4 = vx_load(&in2x[3 * nlanes / 4]);
|
||||
|
||||
vx_store(outx, v_pack_u(v_pack(v_round(a1 + b1), v_round(a2 + b2)),
|
||||
v_pack(v_round(a3 + b3), v_round(a4 + b4))));
|
||||
}
|
||||
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const uchar* in1x, const uchar* in2x, short* outx)
|
||||
{
|
||||
v_int16 a = v_reinterpret_as_s16(vx_load_expand(in1x));
|
||||
v_int16 b = v_reinterpret_as_s16(vx_load_expand(in2x));
|
||||
|
||||
vx_store(outx, a + b);
|
||||
}
|
||||
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const uchar* in1x, const uchar* in2x, ushort* outx)
|
||||
{
|
||||
v_uint16 a = vx_load_expand(in1x);
|
||||
v_uint16 b = vx_load_expand(in2x);
|
||||
|
||||
vx_store(outx, a + b);
|
||||
}
|
||||
|
||||
template<typename DST>
|
||||
CV_ALWAYS_INLINE
|
||||
typename std::enable_if<std::is_same<DST, short>::value ||
|
||||
std::is_same<DST, ushort>::value, void>::type
|
||||
add_simd_impl(const float* in1x, const float* in2x, DST* outx)
|
||||
{
|
||||
constexpr int nlanes = vector_type_of_t<DST>::nlanes;
|
||||
v_float32 a1 = vx_load(in1x);
|
||||
v_float32 a2 = vx_load(&in1x[nlanes/2]);
|
||||
v_float32 b1 = vx_load(in2x);
|
||||
v_float32 b2 = vx_load(&in2x[nlanes/2]);
|
||||
|
||||
v_store_i16(outx, v_round(a1 + b1), v_round(a2 + b2));
|
||||
}
|
||||
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const short* in1x, const short* in2x, ushort* outx)
|
||||
{
|
||||
v_int16 a = vx_load(in1x);
|
||||
v_int32 a1 = v_expand_low(a);
|
||||
v_int32 a2 = v_expand_high(a);
|
||||
|
||||
v_int16 b = vx_load(in2x);
|
||||
v_int32 b1 = v_expand_low(b);
|
||||
v_int32 b2 = v_expand_high(b);
|
||||
|
||||
vx_store(outx, v_pack_u(a1 + b1, a2 + b2));
|
||||
}
|
||||
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const ushort* in1x, const ushort* in2x, short* outx)
|
||||
{
|
||||
v_uint16 a = vx_load(in1x);
|
||||
v_uint32 a1 = v_expand_low(a);
|
||||
v_uint32 a2 = v_expand_high(a);
|
||||
|
||||
v_uint16 b = vx_load(in2x);
|
||||
v_uint32 b1 = v_expand_low(b);
|
||||
v_uint32 b2 = v_expand_high(b);
|
||||
|
||||
vx_store(outx, v_reinterpret_as_s16(v_pack(a1 + b1, a2 + b2)));
|
||||
}
|
||||
|
||||
template<typename SRC>
|
||||
CV_ALWAYS_INLINE void add_simd_impl(const SRC* in1x, const SRC* in2x, float* outx)
|
||||
{
|
||||
v_float32 a = vg_load_f32(in1x);
|
||||
v_float32 b = vg_load_f32(in2x);
|
||||
|
||||
vx_store(outx, a + b);
|
||||
}
|
||||
|
||||
#define ADD_SIMD(SRC, DST) \
|
||||
int add_simd(const SRC in1[], const SRC in2[], DST out[], const int length) \
|
||||
{ \
|
||||
constexpr int nlanes = vector_type_of_t<DST>::nlanes; \
|
||||
\
|
||||
if (length < nlanes) \
|
||||
return 0; \
|
||||
\
|
||||
int x = 0; \
|
||||
for (;;) \
|
||||
{ \
|
||||
for (; x <= length - nlanes; x += nlanes) \
|
||||
{ \
|
||||
add_simd_impl(&in1[x], &in2[x], &out[x]); \
|
||||
} \
|
||||
\
|
||||
if (x < length) \
|
||||
{ \
|
||||
x = length - nlanes; \
|
||||
continue; \
|
||||
} \
|
||||
break; \
|
||||
} \
|
||||
\
|
||||
return x; \
|
||||
}
|
||||
|
||||
ADD_SIMD(uchar, uchar)
|
||||
ADD_SIMD(ushort, uchar)
|
||||
ADD_SIMD(short, uchar)
|
||||
ADD_SIMD(float, uchar)
|
||||
ADD_SIMD(short, short)
|
||||
ADD_SIMD(ushort, short)
|
||||
ADD_SIMD(uchar, short)
|
||||
ADD_SIMD(float, short)
|
||||
ADD_SIMD(ushort, ushort)
|
||||
ADD_SIMD(uchar, ushort)
|
||||
ADD_SIMD(short, ushort)
|
||||
ADD_SIMD(float, ushort)
|
||||
ADD_SIMD(uchar, float)
|
||||
ADD_SIMD(ushort, float)
|
||||
ADD_SIMD(short, float)
|
||||
ADD_SIMD(float, float)
|
||||
|
||||
#undef ADD_SIMD
|
||||
|
||||
#endif // CV_CPU_OPTIMIZATION_DECLARATIONS_ONLY
|
||||
|
||||
CV_CPU_OPTIMIZATION_NAMESPACE_END
|
||||
|
Loading…
Reference in New Issue
Block a user