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synced 2024-11-27 20:50:25 +08:00
check FP16 build condition correctly
* use __GNUC_MINOR__ in correct place to check the version of GCC * check processor support of FP16 at run time * check compiler support of FP16 and pass correct compiler option * rely on ENABLE_AVX on gcc since AVX is generated when mf16c is passed * guard correctly using ifdef in case of various configuration * use v_float16x4 correctly by including the right header file
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@ -151,7 +151,7 @@ if(CMAKE_COMPILER_IS_GNUCXX)
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add_extra_compiler_option("-mfp16-format=ieee")
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endif(ARM)
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if(ENABLE_NEON)
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add_extra_compiler_option("-mfpu=neon-fp16")
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add_extra_compiler_option("-mfpu=neon")
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endif()
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if(ENABLE_VFPV3 AND NOT ENABLE_NEON)
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add_extra_compiler_option("-mfpu=vfpv3")
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@ -336,6 +336,34 @@ if(CMAKE_COMPILER_IS_GNUCXX AND CMAKE_OPENCV_GCC_VERSION_NUM GREATER 399)
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add_extra_compiler_option(-fvisibility-inlines-hidden)
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endif()
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if(NOT OPENCV_FP16_DISABLE)
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if(ARM AND ENABLE_NEON)
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set(FP16_OPTION "-mfpu=neon-fp16")
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elseif((X86 OR X86_64) AND NOT MSVC AND ENABLE_AVX)
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set(FP16_OPTION "-mf16c")
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endif()
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try_compile(__VALID_FP16
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"${OpenCV_BINARY_DIR}"
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"${OpenCV_SOURCE_DIR}/cmake/checks/fp16.cpp"
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COMPILE_DEFINITIONS "-DCHECK_FP16" "${FP16_OPTION}"
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OUTPUT_VARIABLE TRY_OUT
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)
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if(NOT __VALID_FP16)
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if((X86 OR X86_64) AND NOT MSVC AND NOT ENABLE_AVX)
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# GCC enables AVX when mf16c is passed
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message(STATUS "FP16: Feature disabled")
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else()
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message(STATUS "FP16: Compiler support is not available")
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endif()
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else()
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message(STATUS "FP16: Compiler support is available")
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set(HAVE_FP16 1)
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if(NOT ${FP16_OPTION} STREQUAL "")
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add_extra_compiler_option(${FP16_OPTION})
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endif()
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endif()
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endif()
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#combine all "extra" options
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} ${OPENCV_EXTRA_FLAGS} ${OPENCV_EXTRA_C_FLAGS}")
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set(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} ${OPENCV_EXTRA_FLAGS} ${OPENCV_EXTRA_CXX_FLAGS}")
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@ -376,21 +404,6 @@ if(MSVC)
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endif()
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endif()
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if(NOT OPENCV_FP16_DISABLE)
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try_compile(__VALID_FP16
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"${OpenCV_BINARY_DIR}"
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"${OpenCV_SOURCE_DIR}/cmake/checks/fp16.cpp"
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COMPILE_DEFINITIONS "-DCHECK_FP16"
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OUTPUT_VARIABLE TRY_OUT
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)
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if(NOT __VALID_FP16)
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message(STATUS "FP16: Compiler support is not available")
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else()
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message(STATUS "FP16: Compiler support is available")
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set(HAVE_FP16 1)
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endif()
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endif()
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if(APPLE AND NOT CMAKE_CROSSCOMPILING AND NOT DEFINED ENV{LDFLAGS} AND EXISTS "/usr/local/lib")
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link_directories("/usr/local/lib")
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endif()
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@ -310,7 +310,7 @@ enum CpuFeatures {
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typedef union Cv16suf
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{
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short i;
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#if ( defined (__arm__) || defined (__aarch64__) ) && !defined (__CUDACC__) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC__ ) ) || ( 5 <= __GNUC__ ) ) )
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#if ( defined (__arm__) || defined (__aarch64__) ) && !defined (__CUDACC__) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC_MINOR__ ) ) || ( 5 <= __GNUC__ ) ) )
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__fp16 h;
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#endif
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struct _fp16Format
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@ -44,6 +44,7 @@
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#include "precomp.hpp"
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#include "opencl_kernels_core.hpp"
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#include "opencv2/core/hal/intrin.hpp"
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#ifdef __APPLE__
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#undef CV_NEON
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@ -4379,7 +4380,7 @@ struct Cvt_SIMD<float, int>
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#endif
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#if !( ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC__ ) ) || ( 5 <= __GNUC__ ) ) ) )
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#if !( ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC_MINOR__ ) ) || ( 5 <= __GNUC__ ) ) ) )
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// const numbers for floating points format
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const unsigned int kShiftSignificand = 13;
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const unsigned int kMaskFp16Significand = 0x3ff;
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@ -4387,7 +4388,7 @@ const unsigned int kBiasFp16Exponent = 15;
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const unsigned int kBiasFp32Exponent = 127;
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#endif
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#if ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC__ ) ) || ( 5 <= __GNUC__ ) ) )
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#if ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC_MINOR__ ) ) || ( 5 <= __GNUC__ ) ) )
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static float convertFp16SW(short fp16)
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{
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// Fp16 -> Fp32
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@ -4449,7 +4450,7 @@ static float convertFp16SW(short fp16)
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}
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#endif
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#if ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC__ ) ) || ( 5 <= __GNUC__ ) ) )
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#if ( defined (__arm__) || defined (__aarch64__) ) && ( defined (__GNUC__) && ( ( ( 4 <= __GNUC__ ) && ( 7 <= __GNUC_MINOR__ ) ) || ( 5 <= __GNUC__ ) ) )
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static short convertFp16SW(float fp32)
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{
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// Fp32 -> Fp16
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@ -4557,7 +4558,7 @@ cvtScaleHalf_<float, short>( const float* src, size_t sstep, short* dst, size_t
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if ( ( (intptr_t)dst & 0xf ) == 0 )
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#endif
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{
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#if CV_FP16
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#if CV_FP16 && CV_SIMD128
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for ( ; x <= size.width - 4; x += 4)
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{
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v_float32x4 v_src = v_load(src + x);
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@ -4603,7 +4604,7 @@ cvtScaleHalf_<short, float>( const short* src, size_t sstep, float* dst, size_t
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if ( ( (intptr_t)src & 0xf ) == 0 )
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#endif
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{
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#if CV_FP16
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#if CV_FP16 && CV_SIMD128
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for ( ; x <= size.width - 4; x += 4)
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{
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v_float16x4 v_src = v_load_f16(src + x);
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@ -711,48 +711,56 @@ template<typename R> struct TheTest
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return *this;
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}
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#if CV_FP16
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TheTest & test_loadstore_fp16()
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{
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#if CV_FP16
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AlignedData<R> data;
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AlignedData<R> out;
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// check if addresses are aligned and unaligned respectively
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EXPECT_EQ((size_t)0, (size_t)&data.a.d % 16);
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EXPECT_NE((size_t)0, (size_t)&data.u.d % 16);
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EXPECT_EQ((size_t)0, (size_t)&out.a.d % 16);
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EXPECT_NE((size_t)0, (size_t)&out.u.d % 16);
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if(checkHardwareSupport(CV_CPU_FP16))
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{
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// check if addresses are aligned and unaligned respectively
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EXPECT_EQ((size_t)0, (size_t)&data.a.d % 16);
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EXPECT_NE((size_t)0, (size_t)&data.u.d % 16);
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EXPECT_EQ((size_t)0, (size_t)&out.a.d % 16);
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EXPECT_NE((size_t)0, (size_t)&out.u.d % 16);
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// check some initialization methods
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R r1 = data.u;
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R r2 = v_load_f16(data.a.d);
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R r3(r2);
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EXPECT_EQ(data.u[0], r1.get0());
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EXPECT_EQ(data.a[0], r2.get0());
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EXPECT_EQ(data.a[0], r3.get0());
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// check some initialization methods
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R r1 = data.u;
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R r2 = v_load_f16(data.a.d);
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R r3(r2);
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EXPECT_EQ(data.u[0], r1.get0());
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EXPECT_EQ(data.a[0], r2.get0());
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EXPECT_EQ(data.a[0], r3.get0());
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// check some store methods
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out.a.clear();
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v_store_f16(out.a.d, r1);
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EXPECT_EQ(data.a, out.a);
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// check some store methods
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out.a.clear();
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v_store_f16(out.a.d, r1);
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EXPECT_EQ(data.a, out.a);
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}
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return *this;
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#endif
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}
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TheTest & test_float_cvt_fp16()
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{
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#if CV_FP16
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AlignedData<v_float32x4> data;
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// check conversion
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v_float32x4 r1 = v_load(data.a.d);
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v_float16x4 r2 = v_cvt_f16(r1);
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v_float32x4 r3 = v_cvt_f32(r2);
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EXPECT_EQ(0x3c00, r2.get0());
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EXPECT_EQ(r3.get0(), r1.get0());
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if(checkHardwareSupport(CV_CPU_FP16))
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{
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// check conversion
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v_float32x4 r1 = v_load(data.a.d);
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v_float16x4 r2 = v_cvt_f16(r1);
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v_float32x4 r3 = v_cvt_f32(r2);
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EXPECT_EQ(0x3c00, r2.get0());
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EXPECT_EQ(r3.get0(), r1.get0());
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}
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return *this;
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}
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#endif
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}
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};
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