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Merge pull request #24765 from fengyuentau:mod_operator
dnn onnx: add mod #24765 Resolves https://github.com/opencv/opencv/issues/23174 TODO: - [x] enable some conformance tests - [x] add backends - [x] CANN - [x] OpenVINO - [x] CUDA ### Pull Request Readiness Checklist See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request - [x] I agree to contribute to the project under Apache 2 License. - [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV - [x] The PR is proposed to the proper branch - [x] There is a reference to the original bug report and related work - [x] There is accuracy test, performance test and test data in opencv_extra repository, if applicable Patch to opencv_extra has the same branch name. - [x] The feature is well documented and sample code can be built with the project CMake
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@ -324,7 +324,19 @@ void eltwise_sub_2(const Stream& stream, TensorSpan<T> output, TensorView<T> x,
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eltwise_op<T, SubFunctor<T>>(stream, output, x, y);
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eltwise_op<T, SubFunctor<T>>(stream, output, x, y);
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}
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}
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template <class T>
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void eltwise_mod_2(const Stream& stream, TensorSpan<T> output, TensorView<T> x, TensorView<T> y) {
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eltwise_op<T, ModFunctor<T>>(stream, output, x, y);
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}
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template <class T>
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void eltwise_fmod_2(const Stream& stream, TensorSpan<T> output, TensorView<T> x, TensorView<T> y) {
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eltwise_op<T, FModFunctor<T>>(stream, output, x, y);
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}
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#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 530)
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#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 530)
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template void eltwise_mod_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_fmod_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_sub_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_sub_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_div_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_div_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_prod_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_prod_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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@ -333,6 +345,8 @@ void eltwise_sub_2(const Stream& stream, TensorSpan<T> output, TensorView<T> x,
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template void eltwise_max_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_max_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_min_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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template void eltwise_min_2(const Stream& stream, TensorSpan<__half> output, TensorView<__half> x, TensorView<__half> y);
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#endif
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#endif
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template void eltwise_mod_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_fmod_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_sub_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_sub_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_div_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_div_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_prod_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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template void eltwise_prod_2(const Stream& stream, TensorSpan<float> output, TensorView<float> x, TensorView<float> y);
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@ -799,6 +799,40 @@ struct ReciprocalFunctor {
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}
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}
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};
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};
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template <class T>
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struct ModFunctor {
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struct Params {
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CUDA4DNN_HOST_DEVICE Params() {}
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};
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CUDA4DNN_DEVICE ModFunctor() { }
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CUDA4DNN_DEVICE ModFunctor(const Params& params) { }
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CUDA4DNN_DEVICE T operator()(T x, T y) {
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int res = (int)x % (int)y;
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T zero = T(0);
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if ((res > (int)zero && y < zero) || (res < (int)zero && y > zero)) {
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res += (int)y;
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}
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return res;
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}
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};
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template <class T>
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struct FModFunctor {
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struct Params {
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CUDA4DNN_HOST_DEVICE Params() {}
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};
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CUDA4DNN_DEVICE FModFunctor() { }
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CUDA4DNN_DEVICE FModFunctor(const Params& params) { }
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CUDA4DNN_DEVICE T operator()(T x, T y) {
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using csl::device::fmod;
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return fmod(x, y);
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}
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};
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}}}} /* namespace cv::dnn::cuda4dnn::kernels */
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}}}} /* namespace cv::dnn::cuda4dnn::kernels */
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#endif /* OPENCV_DNN_SRC_CUDA_FUNCTORS_HPP */
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#endif /* OPENCV_DNN_SRC_CUDA_FUNCTORS_HPP */
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@ -36,6 +36,13 @@ namespace cv { namespace dnn { namespace cuda4dnn { namespace csl { namespace de
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template <> inline __device__ float min(float x, float y) { return fminf(x, y); }
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template <> inline __device__ float min(float x, float y) { return fminf(x, y); }
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template <> inline __device__ double min(double x, double y) { return fmin(x, y); }
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template <> inline __device__ double min(double x, double y) { return fmin(x, y); }
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template <class T> __device__ T fmod(T x, T y) { return x % y; }
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template <> inline __device__ float fmod(float x, float y) { return fmodf(x, y); }
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template <> inline __device__ double fmod(double x, double y) { return fmod(x, y); }
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#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 530)
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template <> inline __device__ half fmod(half x, half y) { return fmodf((float)x, (float)y); }
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#endif
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template <class T> __device__ T log1p(T val);
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template <class T> __device__ T log1p(T val);
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#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 530)
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#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 530)
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template <> inline __device__ __half log1p(__half val) { return hlog(__half(1) + val); }
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template <> inline __device__ __half log1p(__half val) { return hlog(__half(1) + val); }
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@ -33,6 +33,12 @@ namespace cv { namespace dnn { namespace cuda4dnn { namespace kernels {
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template <class T>
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template <class T>
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void eltwise_sub_2(const csl::Stream& stream, csl::TensorSpan<T> output, csl::TensorView<T> x, csl::TensorView<T> y);
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void eltwise_sub_2(const csl::Stream& stream, csl::TensorSpan<T> output, csl::TensorView<T> x, csl::TensorView<T> y);
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template <class T>
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void eltwise_mod_2(const csl::Stream& stream, csl::TensorSpan<T> output, csl::TensorView<T> x, csl::TensorView<T> y);
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template <class T>
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void eltwise_fmod_2(const csl::Stream& stream, csl::TensorSpan<T> output, csl::TensorView<T> x, csl::TensorView<T> y);
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}}}} /* namespace cv::dnn::cuda4dnn::kernels */
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}}}} /* namespace cv::dnn::cuda4dnn::kernels */
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#endif /* OPENCV_DNN_SRC_CUDA4DNN_KERNELS_ELTWISE_OPS_HPP */
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#endif /* OPENCV_DNN_SRC_CUDA4DNN_KERNELS_ELTWISE_OPS_HPP */
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@ -28,6 +28,8 @@ namespace cv { namespace dnn { namespace cuda4dnn {
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DIV,
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DIV,
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MIN,
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MIN,
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SUB,
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SUB,
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MOD,
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FMOD,
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};
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};
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class EltwiseOpBase : public CUDABackendNode {
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class EltwiseOpBase : public CUDABackendNode {
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@ -90,6 +92,8 @@ namespace cv { namespace dnn { namespace cuda4dnn {
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kernels::eltwise_sum_coeff_2<T>(stream, output, coeffs[0], input_x, coeffs[1], input_y);
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kernels::eltwise_sum_coeff_2<T>(stream, output, coeffs[0], input_x, coeffs[1], input_y);
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break;
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break;
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case EltwiseOpType::SUB: kernels::eltwise_sub_2<T>(stream, output, input_x, input_y); break;
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case EltwiseOpType::SUB: kernels::eltwise_sub_2<T>(stream, output, input_x, input_y); break;
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case EltwiseOpType::MOD: kernels::eltwise_mod_2<T>(stream, output, input_x, input_y); break;
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case EltwiseOpType::FMOD: kernels::eltwise_fmod_2<T>(stream, output, input_x, input_y); break;
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}
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}
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}
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}
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else
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else
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@ -122,6 +126,8 @@ namespace cv { namespace dnn { namespace cuda4dnn {
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}
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}
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break;
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break;
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case EltwiseOpType::SUB: kernels::eltwise_sub_2<T>(stream, output, output, input); break;
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case EltwiseOpType::SUB: kernels::eltwise_sub_2<T>(stream, output, output, input); break;
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case EltwiseOpType::MOD: kernels::eltwise_mod_2<T>(stream, output, output, input); break;
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case EltwiseOpType::FMOD: kernels::eltwise_fmod_2<T>(stream, output, output, input); break;
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}
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}
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}
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}
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}
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}
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@ -24,6 +24,16 @@ namespace cv
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namespace dnn
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namespace dnn
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{
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{
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namespace {
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static int _mod(int x, int y) {
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int res = x % y;
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if ((res < 0 && y > 0) || (res > 0 && y < 0)) {
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res += y;
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}
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return res;
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}
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}
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class NaryEltwiseLayerImpl CV_FINAL : public NaryEltwiseLayer
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class NaryEltwiseLayerImpl CV_FINAL : public NaryEltwiseLayer
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{
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{
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public:
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public:
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MAX,
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MAX,
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MEAN,
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MEAN,
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MIN,
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MIN,
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MOD,
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MOD, // Integer Mod. Reminder's sign = Divisor's sign.
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FMOD, // Floating-point Mod. Reminder's sign = Dividend's sign.
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PROD,
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PROD,
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SUB,
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SUB,
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SUM,
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SUM,
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op = OPERATION::MIN;
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op = OPERATION::MIN;
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else if (operation == "mod")
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else if (operation == "mod")
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op = OPERATION::MOD;
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op = OPERATION::MOD;
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else if (operation == "fmod")
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op = OPERATION::FMOD;
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else if (operation == "mul")
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else if (operation == "mul")
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op = OPERATION::PROD;
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op = OPERATION::PROD;
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else if (operation == "sub")
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else if (operation == "sub")
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@ -106,18 +119,21 @@ public:
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#ifdef HAVE_CANN
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#ifdef HAVE_CANN
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if (backendId == DNN_BACKEND_CANN)
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if (backendId == DNN_BACKEND_CANN)
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return op == OPERATION::ADD || op == OPERATION::PROD || op == OPERATION::SUB ||
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return op == OPERATION::ADD || op == OPERATION::PROD || op == OPERATION::SUB ||
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op == OPERATION::DIV || op == OPERATION::MAX || op == OPERATION::MIN;
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op == OPERATION::DIV || op == OPERATION::MAX || op == OPERATION::MIN ||
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op == OPERATION::MOD || op == OPERATION::FMOD;
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#endif
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#endif
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if (backendId == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH)
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if (backendId == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH)
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return (op == OPERATION::ADD ||
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return (op == OPERATION::ADD ||
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op == OPERATION::PROD ||
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op == OPERATION::PROD ||
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op == OPERATION::GREATER_EQUAL ||
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op == OPERATION::GREATER_EQUAL ||
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op == OPERATION::LESS_EQUAL
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op == OPERATION::LESS_EQUAL ||
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op == OPERATION::MOD ||
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op == OPERATION::FMOD
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);
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);
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if (backendId == DNN_BACKEND_CUDA) {
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if (backendId == DNN_BACKEND_CUDA) {
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return op == OPERATION::MAX || op == OPERATION::MIN || op == OPERATION::SUM ||
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return op == OPERATION::MAX || op == OPERATION::MIN || op == OPERATION::SUM ||
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op == OPERATION::PROD || op == OPERATION::DIV || op == OPERATION::ADD ||
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op == OPERATION::PROD || op == OPERATION::DIV || op == OPERATION::ADD ||
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op == OPERATION::SUB;
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op == OPERATION::SUB || op == OPERATION::MOD || op == OPERATION::FMOD;
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}
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}
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return backendId == DNN_BACKEND_OPENCV;
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return backendId == DNN_BACKEND_OPENCV;
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}
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}
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}
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}
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case OPERATION::MOD:
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case OPERATION::MOD:
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{
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{
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auto mod = [](const uint8_t &a, const uint8_t &b) { return a % b; };
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auto mod = [] (const T &a, const T &b) { return static_cast<T>(_mod(int(a), int(b))); };
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binary_forward<T>(mod, std::forward<Args>(args)...);
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binary_forward<T>(mod, std::forward<Args>(args)...);
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break;
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break;
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}
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}
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case OPERATION::FMOD:
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{
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auto fmod = [](const T &a, const T &b) { return std::fmod(a, b); };
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binary_forward<T>(fmod, std::forward<Args>(args)...);
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break;
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}
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case OPERATION::PROD:
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case OPERATION::PROD:
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{
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{
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auto prod = [](const T &a, const T &b) { return a * b; };
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auto prod = [](const T &a, const T &b) { return a * b; };
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opDispatch<int32_t>(std::forward<Args>(args)...);
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opDispatch<int32_t>(std::forward<Args>(args)...);
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break;
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break;
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case CV_32F:
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case CV_32F:
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CV_Assert(op != OPERATION::BITSHIFT && op != OPERATION::MOD &&
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CV_Assert(op != OPERATION::BITSHIFT && op != OPERATION::AND &&
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op != OPERATION::AND && op != OPERATION::OR &&
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op != OPERATION::OR && op != OPERATION::XOR);
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op != OPERATION::XOR);
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opDispatch<float>(std::forward<Args>(args)...);
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opDispatch<float>(std::forward<Args>(args)...);
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break;
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break;
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default:
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default:
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@ -833,6 +854,12 @@ public:
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case OPERATION::SUB:
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case OPERATION::SUB:
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op_ = cuda4dnn::EltwiseOpType::SUB;
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op_ = cuda4dnn::EltwiseOpType::SUB;
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break;
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break;
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case OPERATION::MOD:
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op_ = cuda4dnn::EltwiseOpType::MOD;
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break;
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case OPERATION::FMOD:
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op_ = cuda4dnn::EltwiseOpType::FMOD;
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break;
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default: return Ptr<BackendNode>(); // return empty cuda_node if the EltwiseOpType is unsupported type.
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default: return Ptr<BackendNode>(); // return empty cuda_node if the EltwiseOpType is unsupported type.
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};
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};
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@ -877,6 +904,8 @@ public:
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BUILD_CANN_ELTWISE_OP(OPERATION::DIV, Xdivy, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::DIV, Xdivy, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::MAX, Maximum, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::MAX, Maximum, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::MIN, Minimum, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::MIN, Minimum, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::MOD, Mod, name);
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BUILD_CANN_ELTWISE_OP(OPERATION::FMOD, Mod, name);
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#undef BUILD_CANN_ELTWISE_OP
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#undef BUILD_CANN_ELTWISE_OP
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default: CV_Error(Error::StsNotImplemented, "Unsupported eltwise operation");
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default: CV_Error(Error::StsNotImplemented, "Unsupported eltwise operation");
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}
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}
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@ -923,6 +952,16 @@ public:
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node = std::make_shared<ngraph::op::v1::GreaterEqual>(inp0, inp1);
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node = std::make_shared<ngraph::op::v1::GreaterEqual>(inp0, inp1);
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else if (op == OPERATION::LESS_EQUAL)
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else if (op == OPERATION::LESS_EQUAL)
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node = std::make_shared<ngraph::op::v1::LessEqual>(inp0, inp1);
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node = std::make_shared<ngraph::op::v1::LessEqual>(inp0, inp1);
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// Ideally we should do this but int32 internal blobs are converted to float32 data type in inference.
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// TODO: Remove data type convertion when we have type inference.
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else if (op == OPERATION::MOD) {
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auto inp0_i64 = std::make_shared<ngraph::op::Convert>(inp0, ngraph::element::i64);
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auto inp1_i64 = std::make_shared<ngraph::op::Convert>(inp1, ngraph::element::i64);
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|
auto mod = std::make_shared<ngraph::op::v1::FloorMod>(inp0_i64, inp1_i64);
|
||||||
|
node = std::make_shared<ngraph::op::Convert>(mod, ngraph::element::f32);
|
||||||
|
}
|
||||||
|
else if (op == OPERATION::FMOD)
|
||||||
|
node = std::make_shared<ngraph::op::v1::Mod>(inp0, inp1);
|
||||||
else
|
else
|
||||||
CV_Error(Error::StsNotImplemented, "Operation is not implemented for nGraph backend");
|
CV_Error(Error::StsNotImplemented, "Operation is not implemented for nGraph backend");
|
||||||
return Ptr<BackendNode>(new InfEngineNgraphNode(node));
|
return Ptr<BackendNode>(new InfEngineNgraphNode(node));
|
||||||
|
@ -2830,6 +2830,11 @@ void ONNXImporter::parseElementWise(LayerParams& layerParams, const opencv_onnx:
|
|||||||
|
|
||||||
layerParams.type = "NaryEltwise";
|
layerParams.type = "NaryEltwise";
|
||||||
layerParams.set("operation", toLowerCase(node_proto.op_type()));
|
layerParams.set("operation", toLowerCase(node_proto.op_type()));
|
||||||
|
if (node_proto.op_type() == "Mod") {
|
||||||
|
if (layerParams.get<int>("fmod", 0)) {
|
||||||
|
layerParams.set("operation", "fmod");
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
// element-wise layers that can have >=1 inputs but actually have one input
|
// element-wise layers that can have >=1 inputs but actually have one input
|
||||||
if (node_proto.input_size() == 1 && (op_type == "max" || op_type == "min" || op_type == "mean" || op_type == "sum"))
|
if (node_proto.input_size() == 1 && (op_type == "max" || op_type == "min" || op_type == "mean" || op_type == "sum"))
|
||||||
@ -4006,7 +4011,7 @@ void ONNXImporter::buildDispatchMap_ONNX_AI(int opset_version)
|
|||||||
|
|
||||||
dispatch["Equal"] = dispatch["Greater"] = dispatch["Less"] = dispatch["Pow"] = dispatch["Add"] =
|
dispatch["Equal"] = dispatch["Greater"] = dispatch["Less"] = dispatch["Pow"] = dispatch["Add"] =
|
||||||
dispatch["Sub"] = dispatch["Mul"] = dispatch["Div"] = dispatch["GreaterOrEqual"] =
|
dispatch["Sub"] = dispatch["Mul"] = dispatch["Div"] = dispatch["GreaterOrEqual"] =
|
||||||
dispatch["LessOrEqual"] = &ONNXImporter::parseElementWise;
|
dispatch["LessOrEqual"] = dispatch["Mod"] = &ONNXImporter::parseElementWise;
|
||||||
|
|
||||||
dispatch["Sum"] = dispatch["Min"] = dispatch["Max"] = &ONNXImporter::parseElementWise;
|
dispatch["Sum"] = dispatch["Min"] = dispatch["Max"] = &ONNXImporter::parseElementWise;
|
||||||
dispatch["Where"] = &ONNXImporter::parseElementWise;
|
dispatch["Where"] = &ONNXImporter::parseElementWise;
|
||||||
|
@ -1056,10 +1056,25 @@ CASE(test_mod_int64_fmod)
|
|||||||
// no filter
|
// no filter
|
||||||
CASE(test_mod_mixed_sign_float16)
|
CASE(test_mod_mixed_sign_float16)
|
||||||
// no filter
|
// no filter
|
||||||
|
if (target == DNN_TARGET_OPENCL)
|
||||||
|
{
|
||||||
|
default_l1 = 0.0011; // Expected: (normL1) <= (l1), actual: 0.00104141 vs 1e-05
|
||||||
|
default_lInf = 0.0016; // Expected: (normInf) <= (lInf), actual: 0.00156212 vs 0.0001
|
||||||
|
}
|
||||||
CASE(test_mod_mixed_sign_float32)
|
CASE(test_mod_mixed_sign_float32)
|
||||||
// no filter
|
// no filter
|
||||||
|
if (target == DNN_TARGET_OPENCL)
|
||||||
|
{
|
||||||
|
default_l1 = 0.0011; // Expected: (normL1) <= (l1), actual: 0.00104141 vs 1e-05
|
||||||
|
default_lInf = 0.0016; // Expected: (normInf) <= (lInf), actual: 0.00156212 vs 0.0001
|
||||||
|
}
|
||||||
CASE(test_mod_mixed_sign_float64)
|
CASE(test_mod_mixed_sign_float64)
|
||||||
// no filter
|
// no filter
|
||||||
|
if (target == DNN_TARGET_OPENCL)
|
||||||
|
{
|
||||||
|
default_l1 = 0.0011; // Expected: (normL1) <= (l1), actual: 0.00104167 vs 1e-05
|
||||||
|
default_lInf = 0.0016; // Expected: (normInf) <= (lInf), actual: 0.00156251 vs 0.0001
|
||||||
|
}
|
||||||
CASE(test_mod_mixed_sign_int16)
|
CASE(test_mod_mixed_sign_int16)
|
||||||
// no filter
|
// no filter
|
||||||
CASE(test_mod_mixed_sign_int32)
|
CASE(test_mod_mixed_sign_int32)
|
||||||
|
@ -210,9 +210,6 @@
|
|||||||
"test_min_uint8",
|
"test_min_uint8",
|
||||||
"test_mod_broadcast",
|
"test_mod_broadcast",
|
||||||
"test_mod_int64_fmod",
|
"test_mod_int64_fmod",
|
||||||
"test_mod_mixed_sign_float16",
|
|
||||||
"test_mod_mixed_sign_float32",
|
|
||||||
"test_mod_mixed_sign_float64",
|
|
||||||
"test_mod_mixed_sign_int16",
|
"test_mod_mixed_sign_int16",
|
||||||
"test_mod_mixed_sign_int32",
|
"test_mod_mixed_sign_int32",
|
||||||
"test_mod_mixed_sign_int64",
|
"test_mod_mixed_sign_int64",
|
||||||
|
Loading…
Reference in New Issue
Block a user