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fast_math: implement optimized PPC routines
Implement cvRound using inline asm. No compiler support exists today to properly optimize this. This results in about a 4x speedup over the default rounding. Likewise, simplify the growing number of rounding function overloads. For P9 enabled targets, utilize the classification testing instruction to test for Inf/Nan values. Operation speedup is about 1.2x for FP32, and 1.5x for FP64 operands. For P8 targets, fallback to the GCC nan inline. It provides a 1.1/1.4x improvement for FP32/FP64 arguments.
This commit is contained in:
Paul E. Murphy
parent
3f92bcc11a
commit
f38a61c66d
@ -74,7 +74,15 @@
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# include "tegra_round.hpp"
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#endif
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#if defined __GNUC__ && defined __arm__ && (defined __ARM_PCS_VFP || defined __ARM_VFPV3__ || defined __ARM_NEON__) && !defined __SOFTFP__ && !defined(__CUDACC__)
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#if defined __PPC64__ && defined __GNUC__ && defined _ARCH_PWR8 && !defined (__CUDACC__)
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# include <altivec.h>
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#endif
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#if ((defined _MSC_VER && defined _M_ARM) || defined CV_ICC || \
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defined __GNUC__) && defined HAVE_TEGRA_OPTIMIZATION
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#define CV_INLINE_ROUND_DBL(value) TEGRA_ROUND_DBL(value);
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#define CV_INLINE_ROUND_FLT(value) TEGRA_ROUND_FLT(value);
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#elif defined __GNUC__ && defined __arm__ && (defined __ARM_PCS_VFP || defined __ARM_VFPV3__ || defined __ARM_NEON__) && !defined __SOFTFP__ && !defined(__CUDACC__)
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// 1. general scheme
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#define ARM_ROUND(_value, _asm_string) \
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int res; \
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@ -84,12 +92,32 @@
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return res
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// 2. version for double
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#ifdef __clang__
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#define ARM_ROUND_DBL(value) ARM_ROUND(value, "vcvtr.s32.f64 %[temp], %[value] \n vmov %[res], %[temp]")
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#define CV_INLINE_ROUND_DBL(value) ARM_ROUND(value, "vcvtr.s32.f64 %[temp], %[value] \n vmov %[res], %[temp]")
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#else
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#define ARM_ROUND_DBL(value) ARM_ROUND(value, "vcvtr.s32.f64 %[temp], %P[value] \n vmov %[res], %[temp]")
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#define CV_INLINE_ROUND_DBL(value) ARM_ROUND(value, "vcvtr.s32.f64 %[temp], %P[value] \n vmov %[res], %[temp]")
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#endif
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// 3. version for float
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#define ARM_ROUND_FLT(value) ARM_ROUND(value, "vcvtr.s32.f32 %[temp], %[value]\n vmov %[res], %[temp]")
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#define CV_INLINE_ROUND_FLT(value) ARM_ROUND(value, "vcvtr.s32.f32 %[temp], %[value]\n vmov %[res], %[temp]")
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#elif defined __PPC64__ && defined __GNUC__ && defined _ARCH_PWR8 && !defined (__CUDACC__)
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// P8 and newer machines can convert fp32/64 to int quickly.
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#define CV_INLINE_ROUND_DBL(value) \
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int out; \
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double temp; \
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__asm__( "fctiw %[temp],%[in]\n\tmffprwz %[out],%[temp]\n\t" : [out] "=r" (out), [temp] "=d" (temp) : [in] "d" ((double)(value)) : ); \
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return out;
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// FP32 also works with FP64 routine above
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#define CV_INLINE_ROUND_FLT(value) CV_INLINE_ROUND_DBL(value)
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#ifdef _ARCH_PWR9
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#define CV_INLINE_ISINF_DBL(value) return scalar_test_data_class(value, 0x30);
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#define CV_INLINE_ISNAN_DBL(value) return scalar_test_data_class(value, 0x40);
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#define CV_INLINE_ISINF_FLT(value) CV_INLINE_ISINF_DBL(value)
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#define CV_INLINE_ISNAN_FLT(value) CV_INLINE_ISNAN_DBL(value)
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#endif
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#elif defined CV_ICC || defined __GNUC__
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#define CV_INLINE_ROUND_DBL(value) return (int)(lrint(value));
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#define CV_INLINE_ROUND_FLT(value) return (int)(lrintf(value));
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#endif
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#if defined __PPC64__ && !defined OPENCV_USE_FASTMATH_GCC_BUILTINS
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@ -105,6 +133,16 @@
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#define _OPENCV_FASTMATH_ENABLE_GCC_MATH_BUILTINS
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#endif
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/* Allow overrides for some functions which may benefit from tuning. Likewise,
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note that isinf is not used as the return value is signed. */
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#if defined _OPENCV_FASTMATH_ENABLE_GCC_MATH_BUILTINS && !defined CV_INLINE_ISNAN_DBL
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#define CV_INLINE_ISNAN_DBL(value) return __builtin_isnan(value);
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#endif
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#if defined _OPENCV_FASTMATH_ENABLE_GCC_MATH_BUILTINS && !defined CV_INLINE_ISNAN_FLT
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#define CV_INLINE_ISNAN_FLT(value) return __builtin_isnanf(value);
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#endif
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/** @brief Rounds floating-point number to the nearest integer
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@param value floating-point number. If the value is outside of INT_MIN ... INT_MAX range, the
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@ -125,15 +163,8 @@ cvRound( double value )
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fistp t;
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}
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return t;
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#elif ((defined _MSC_VER && defined _M_ARM) || defined CV_ICC || \
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defined __GNUC__) && defined HAVE_TEGRA_OPTIMIZATION
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TEGRA_ROUND_DBL(value);
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#elif defined CV_ICC || defined __GNUC__
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# if defined ARM_ROUND_DBL
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ARM_ROUND_DBL(value);
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# else
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return (int)lrint(value);
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# endif
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#elif defined CV_INLINE_ROUND_DBL
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CV_INLINE_ROUND_DBL(value);
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#else
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/* it's ok if round does not comply with IEEE754 standard;
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the tests should allow +/-1 difference when the tested functions use round */
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@ -184,10 +215,14 @@ CV_INLINE int cvCeil( double value )
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otherwise. */
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CV_INLINE int cvIsNaN( double value )
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{
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#if defined CV_INLINE_ISNAN_DBL
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CV_INLINE_ISNAN_DBL(value);
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#else
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Cv64suf ieee754;
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ieee754.f = value;
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return ((unsigned)(ieee754.u >> 32) & 0x7fffffff) +
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((unsigned)ieee754.u != 0) > 0x7ff00000;
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#endif
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}
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/** @brief Determines if the argument is Infinity.
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@ -198,10 +233,14 @@ CV_INLINE int cvIsNaN( double value )
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and 0 otherwise. */
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CV_INLINE int cvIsInf( double value )
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{
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#if defined CV_INLINE_ISINF_DBL
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CV_INLINE_ISINF_DBL(value);
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#else
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Cv64suf ieee754;
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ieee754.f = value;
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return ((unsigned)(ieee754.u >> 32) & 0x7fffffff) == 0x7ff00000 &&
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(unsigned)ieee754.u == 0;
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#endif
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}
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#ifdef __cplusplus
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@ -221,15 +260,8 @@ CV_INLINE int cvRound(float value)
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fistp t;
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}
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return t;
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#elif ((defined _MSC_VER && defined _M_ARM) || defined CV_ICC || \
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defined __GNUC__) && defined HAVE_TEGRA_OPTIMIZATION
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TEGRA_ROUND_FLT(value);
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#elif defined CV_ICC || defined __GNUC__
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# if defined ARM_ROUND_FLT
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ARM_ROUND_FLT(value);
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# else
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return (int)lrintf(value);
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# endif
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#elif defined CV_INLINE_ROUND_FLT
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CV_INLINE_ROUND_FLT(value);
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#else
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/* it's ok if round does not comply with IEEE754 standard;
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the tests should allow +/-1 difference when the tested functions use round */
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@ -280,17 +312,25 @@ CV_INLINE int cvCeil( int value )
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/** @overload */
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CV_INLINE int cvIsNaN( float value )
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{
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#if defined CV_INLINE_ISNAN_FLT
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CV_INLINE_ISNAN_FLT(value);
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#else
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Cv32suf ieee754;
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ieee754.f = value;
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return (ieee754.u & 0x7fffffff) > 0x7f800000;
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#endif
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}
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/** @overload */
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CV_INLINE int cvIsInf( float value )
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{
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#if defined CV_INLINE_ISINF_FLT
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CV_INLINE_ISINF_FLT(value);
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#else
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Cv32suf ieee754;
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ieee754.f = value;
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return (ieee754.u & 0x7fffffff) == 0x7f800000;
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#endif
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}
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#endif // __cplusplus
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