Commit Graph

2364 Commits

Author SHA1 Message Date
cudawarped
692d6168b3 cuda: fix CUDA 12.0 build errors 2022-12-26 15:25:29 +02:00
Alexander Alekhin
b42c11de82 pre: OpenCV 4.7.0 (version++) 2022-12-25 17:00:22 +00:00
fengyuentau
34a0897f90 add cv::flipND; support onnx slice with negative steps via cv::flipND 2022-12-23 16:39:53 +08:00
cudawarped
9aa5ab7557 cv::cuda: Replace all instances of texture references/objects with texture objects using the existing updated cv::cudev::Texture class.
Fixes bugs in cv::cuda::demosaicing, cv::cuda::resize and cv::cuda::HoughSegmentDetector.
2022-12-19 19:28:15 +02:00
Alexander Alekhin
420db56ffd Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-12-18 02:17:17 +00:00
Alexander Alekhin
eace6adb6d Merge pull request #22934 from alalek:fix_filestorage_binding 2022-12-17 03:28:13 +00:00
Alexander Alekhin
6e3700593f compatibility: keep Ptr<FileStorage> stubs till OpenCV 5.0 2022-12-16 00:47:44 +00:00
Alexander Alekhin
6a8c5a1d27 python: resolve Ptr<FileStorage> requirement issue 2022-12-16 00:47:44 +00:00
Sergei Shutov
8bd17163c7
Merge pull request #22939 from stopmosk:21826-python-bindings-for-videocapturewaitany
Add Python bindings for VideoCapture::waitAny #21826

### Pull Request Readiness Checklist

See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request

- [x] I agree to contribute to the project under Apache 2 License.
- [x] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [x] The PR is proposed to the proper branch
- [x] There is a reference to the original bug report and related work
- [x] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
      Patch to opencv_extra has the same branch name.
- [x] The feature is well documented and sample code can be built with the project CMake
2022-12-14 22:15:02 +03:00
Vadim Levin
3f5f09e730 fix: add _ suffix to properties having reserved keyword names 2022-12-13 20:56:39 +03:00
Alexander Alekhin
4203c903f8 Merge pull request #22928 from alalek:riscv_toolchains 2022-12-13 06:32:16 +00:00
Alexander Alekhin
c725771e11 build(riscv): suppress massive -Wignored-attributes warnings 2022-12-11 17:10:00 +00:00
Alexander Alekhin
be326ff752 build: fix/eliminate MSVC warnings 2022-12-10 12:19:31 +00:00
Alexander Alekhin
941d89e06d cmake: fix RISC-V toolchains
- RVV options are moved to configuration scripts instead of toolchains
2022-12-09 12:02:28 +00:00
Alexander Alekhin
c5a4df30c6 risc-v: fix RVV backend on clang with undefined CV_RVV_SCALABLE
- v_interleave_quads
- v_pack_triplets
- v_signmask
2022-12-06 13:49:05 +00:00
Alexander Smorkalov
5696629b13
Merge pull request #22594 from ZhaoChuyang:pr_test_for_22253
add test for PR #22253
2022-12-01 13:47:32 +03:00
Vadim Levin
3a15152be5 refactor: rework test to be more specific 2022-11-30 18:31:03 +03:00
HAN Liutong
a32f2cd24a
Merge pull request #22520 from hanliutong:hsv
Modify the SIMD loop in color_hsv.

* Modify the SIMD loops in color_hsv.

* Add FP supporting in bit logic.

* Add temporary compatibility code.

* Use max_nlanes instead of vlanes for array declaration.

* Use "CV_SIMD || CV_SIMD_SCALABLE".

* Revert the modify of the Universal Intrinsic API

* Fix warnings.

* Use v_select instead of bits manipulation.
2022-11-28 18:28:14 +00:00
Alexander Alekhin
5d14cc68b7 Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-11-16 16:54:11 +00:00
Alexander Alekhin
54531f8e3b core: support CV_Check*() macros with 'bool' parameters 2022-11-15 11:47:16 +00:00
Alexander Smorkalov
778faddbd8
Merge pull request #22463 from hanliutong:rvv
Redesign the SIMD macro.
2022-10-27 14:16:03 +03:00
HAN Liutong
5462a6be6e Update SIMD macro for RVV backend. 2022-10-26 13:02:03 +00:00
Alexander Smorkalov
a60496f9df
Merge pull request #22633 from cudawarped:fix_3361
Reset cuda runtime error code to cudasuccess on runtime failure.
2022-10-26 15:48:06 +03:00
Alexander Alekhin
762481411d Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-10-15 16:44:47 +00:00
Hyunggi Chang
085fb78e85 fix typo (portatibility -> portability) 2022-10-13 21:39:52 +00:00
Alexander Alekhin
2763f988da Merge pull request #22526 from paroj:pyrect 2022-10-13 11:46:28 +00:00
cudawarped
f89dee4f3e Reset cuda error code to cudasuccess. 2022-10-13 10:15:40 +03:00
Pavel Rojtberg
35f43cc429 core: expose rectangle intersection to bindings 2022-10-12 14:08:12 +02:00
Alexander Alekhin
347246901e Merge pull request #21745 from alalek:dnn_plugin_openvino 2022-10-08 22:32:25 +00:00
Alexander Alekhin
43b2bb2c25 dnn: plugin support for OpenVINO 2022-10-07 16:57:31 +00:00
Sean McBride
1829eba584 Fixed most clang -Wextra-semi warnings 2022-09-27 18:06:46 -04:00
HAN Liutong
df24bd295d Fix v_signmask for RISC-V Vector. 2022-09-23 11:28:50 +00:00
Alexander Smorkalov
bfeeb0ad70
Merge pull request #22285 from asenyaev:asen/disabled_compiling_warnings_3.4
Disabled compiling warnings in case of symbols in cmake for 3.4
2022-09-20 15:14:36 +03:00
Alexander Smorkalov
2273af0166
Merge pull request #22286 from asenyaev:asen/disabled_compiling_warnings_4.x
Disabled compiling warnings in case of symbols in cmake for 4.x
2022-09-20 15:13:06 +03:00
Andrey Senyaev
ccfc34b13f Disabled compiling warnings in case of symbols in cmake for 4.x 2022-09-20 13:35:48 +03:00
Andrey Senyaev
3f4abcb228 Disabled compiling warnings in case of symbols in cmake for 3.4 2022-09-20 13:34:17 +03:00
Alexander Alekhin
2e15582799 build: eliminate uninitialized warnings from GCC12 2022-09-14 11:58:43 +00:00
Hao Chen
fce8349c99 Optimize the cvCeil and cvFloor functions.
This patch optimizes the cvCeil and cvFloor functions on
the LoongArch platform.

Signed-off-by: Hao Chen <chenhao@loongson.cn>
2022-09-13 10:49:09 +03:00
wxsheng
4154bd0667
Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX
* Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX
* Add resize.lasx.cpp for Loongson SIMD acceleration
* Add imgwarp.lasx.cpp for Loongson SIMD acceleration
* Add LASX acceleration support for dnn/conv
* Add CV_PAUSE(v) for Loongarch
* Set LASX by default on Loongarch64
* LoongArch: tune test threshold for Core/HAL.mat_decomp/15

Co-authored-by: shengwenxue <shengwenxue@loongson.cn>
2022-09-10 09:39:43 +03:00
HAN Liutong
7e2c8cc9f4 Add remaining intrinsics. 2022-08-26 07:06:51 +00:00
Alexander Smorkalov
d10832074e
Merge pull request #22353 from hanliutong:more-rvv-intrin
[GSoC] Add more universal intrinsic implementations for RVV.
2022-08-23 12:50:01 +03:00
HAN Liutong
189f647264 Add implementation for zip, transpose, interleave, reverse and combine. 2022-08-17 14:38:38 +00:00
Alexander Alekhin
2ebdc04787 Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-08-14 15:50:42 +00:00
HAN Liutong
e65ad44b32 Remove redundant intrinsics. 2022-08-12 14:12:52 +00:00
HAN Liutong
80c82e10aa Update implementations on arithmetics. 2022-08-12 06:51:41 +00:00
HAN Liutong
f0d29cd33c Add more universal intrinsic implementations for RVV. 2022-08-08 02:09:54 +00:00
HAN Liutong
2bd72af2ef
Merge pull request #22292 from hanliutong:fix
[GSoC] Fix compilation errors and warnings when using MSVC on Windows.

* Pass reference of the argument.

* Add some cast to suppress warnings.
2022-07-24 12:15:13 +03:00
HAN Liutong
3e3b53f815 Fix compile errors when all SIMD is disabled. 2022-07-21 08:14:32 +00:00
Tomoaki Teshima
b3269b08a1 neon: add dotprod dispatch implementation
* read vector at runtime
     * add enum
2022-07-20 19:25:39 +09:00
HAN Liutong
0ef803950b
Merge pull request #22179 from hanliutong:new-rvv
[GSoC] New universal intrinsic backend for RVV

* Add new rvv backend (partially implemented).

* Modify the framework of Universal Intrinsic.

* Add CV_SIMD macro guards to current UI code.

* Use vlanes() instead of nlanes.

* Modify the UI test.

* Enable the new RVV (scalable) backend.

* Remove whitespace.

* Rename and some others modify.

* Update intrin.hpp but still not work on AVX/SSE

* Update conditional compilation macros.

* Use static variable for vlanes.

* Use max_nlanes for array defining.
2022-07-19 20:02:00 +03:00