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77d887898d
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5193 Commits

Author SHA1 Message Date
Alexander Alekhin
77d887898d Merge pull request #22875 from asmorkalov:as/cl_error_code_fix 2022-11-28 19:05:59 +00:00
HAN Liutong
a32f2cd24a
Merge pull request #22520 from hanliutong:hsv 
Modify the SIMD loop in color_hsv.

* Modify the SIMD loops in color_hsv.

* Add FP supporting in bit logic.

* Add temporary compatibility code.

* Use max_nlanes instead of vlanes for array declaration.

* Use "CV_SIMD || CV_SIMD_SCALABLE".

* Revert the modify of the Universal Intrinsic API

* Fix warnings.

* Use v_select instead of bits manipulation.
 2022-11-28 18:28:14 +00:00
Alexander Smorkalov
1c3e287d32 More fixes for OpenCL error reporting. 2022-11-28 09:47:51 +03:00
Alexander Smorkalov
7622fbf895 Fixed OpenGL errors formatting. 2022-11-25 16:46:12 +03:00
Amir Hassan
3f371fe2dd
Merge pull request #22855 from kallaballa:print_cl_status_on_fail 
Print CL status code on error in opengl interop functions
 2022-11-25 09:13:57 +03:00
Alexander Alekhin
5d14cc68b7 Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-11-16 16:54:11 +00:00
Alexander Alekhin
54531f8e3b core: support CV_Check*() macros with 'bool' parameters 2022-11-15 11:47:16 +00:00
Alexander Smorkalov
778faddbd8
Merge pull request #22463 from hanliutong:rvv 
Redesign the SIMD macro.
 2022-10-27 14:16:03 +03:00
HAN Liutong
5462a6be6e Update SIMD macro for RVV backend. 2022-10-26 13:02:03 +00:00
Alexander Smorkalov
a60496f9df
Merge pull request #22633 from cudawarped:fix_3361 
Reset cuda runtime error code to cudasuccess on runtime failure.
 2022-10-26 15:48:06 +03:00
Alexander Alekhin
762481411d Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-10-15 16:44:47 +00:00
Hyunggi Chang
085fb78e85 fix typo (portatibility -> portability) 2022-10-13 21:39:52 +00:00
Alexander Alekhin
2763f988da Merge pull request #22526 from paroj:pyrect 2022-10-13 11:46:28 +00:00
cudawarped
f89dee4f3e Reset cuda error code to cudasuccess. 2022-10-13 10:15:40 +03:00
Pavel Rojtberg
35f43cc429 core: expose rectangle intersection to bindings 2022-10-12 14:08:12 +02:00
Alexander Alekhin
347246901e Merge pull request #21745 from alalek:dnn_plugin_openvino 2022-10-08 22:32:25 +00:00
Alexander Alekhin
43b2bb2c25 dnn: plugin support for OpenVINO 2022-10-07 16:57:31 +00:00
Vincent Rabaud
38c9c20a35 Move marking memory as initialized earlier. 2022-09-28 21:58:17 +02:00
Sean McBride
1829eba584 Fixed most clang -Wextra-semi warnings 2022-09-27 18:06:46 -04:00
HAN Liutong
df24bd295d Fix v_signmask for RISC-V Vector. 2022-09-23 11:28:50 +00:00
Alexander Smorkalov
bfeeb0ad70
Merge pull request #22285 from asenyaev:asen/disabled_compiling_warnings_3.4 
Disabled compiling warnings in case of symbols in cmake for 3.4
 2022-09-20 15:14:36 +03:00
Alexander Smorkalov
2273af0166
Merge pull request #22286 from asenyaev:asen/disabled_compiling_warnings_4.x 
Disabled compiling warnings in case of symbols in cmake for 4.x
 2022-09-20 15:13:06 +03:00
Andrey Senyaev
ccfc34b13f Disabled compiling warnings in case of symbols in cmake for 4.x 2022-09-20 13:35:48 +03:00
Andrey Senyaev
3f4abcb228 Disabled compiling warnings in case of symbols in cmake for 3.4 2022-09-20 13:34:17 +03:00
Alexander Alekhin
2e15582799 build: eliminate uninitialized warnings from GCC12 2022-09-14 11:58:43 +00:00
Hao Chen
fce8349c99 Optimize the cvCeil and cvFloor functions. 
This patch optimizes the cvCeil and cvFloor functions on
the LoongArch platform.

Signed-off-by: Hao Chen <chenhao@loongson.cn>
 2022-09-13 10:49:09 +03:00
wxsheng
4154bd0667
Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX 
* Add Loongson Advanced SIMD Extension support: -DCPU_BASELINE=LASX
* Add resize.lasx.cpp for Loongson SIMD acceleration
* Add imgwarp.lasx.cpp for Loongson SIMD acceleration
* Add LASX acceleration support for dnn/conv
* Add CV_PAUSE(v) for Loongarch
* Set LASX by default on Loongarch64
* LoongArch: tune test threshold for Core/HAL.mat_decomp/15

Co-authored-by: shengwenxue <shengwenxue@loongson.cn>
 2022-09-10 09:39:43 +03:00
Yuantao Feng
9dc844a6e1
Merge pull request #22346 from fengyuentau:mat1d_part1 
Changes separated from Mat 1D support in core #18594 (#22346)
 2022-09-09 12:56:30 +03:00
HAN Liutong
7e2c8cc9f4 Add remaining intrinsics. 2022-08-26 07:06:51 +00:00
Alexander Smorkalov
d10832074e
Merge pull request #22353 from hanliutong:more-rvv-intrin 
[GSoC] Add more universal intrinsic implementations for RVV.
 2022-08-23 12:50:01 +03:00
HAN Liutong
b9a1039566 Remove the test log in test_interleave_pq. 2022-08-18 08:01:09 +00:00
HAN Liutong
8dc332721f Add testcases for interleave_p&q and enable others testcases. 2022-08-17 14:39:23 +00:00
HAN Liutong
189f647264 Add implementation for zip, transpose, interleave, reverse and combine. 2022-08-17 14:38:38 +00:00
Alexander Alekhin
2ebdc04787 Merge remote-tracking branch 'upstream/3.4' into merge-3.4 2022-08-14 15:50:42 +00:00
Alexander Alekhin
d0d115321d Merge pull request #22350 from alalek:rework_psabi_warning 2022-08-13 15:05:41 +00:00
HAN Liutong
f572ae3474 add missing test cases(v_abs) 2022-08-12 14:13:26 +00:00
HAN Liutong
e65ad44b32 Remove redundant intrinsics. 2022-08-12 14:12:52 +00:00
HAN Liutong
80c82e10aa Update implementations on arithmetics. 2022-08-12 06:51:41 +00:00
HAN Liutong
2fb652ce09 Add testcase for continuous mul and add. 2022-08-12 01:44:30 +00:00
HAN Liutong
f0d29cd33c Add more universal intrinsic implementations for RVV. 2022-08-08 02:09:54 +00:00
Alexander Alekhin
44b2f9637a Revert "suppress warning on GCC 7 and later" 
This reverts commit a630ad73cb.
 2022-08-07 15:43:10 +03:00
Alexander Smorkalov
2ffa7ac0da
Merge pull request #22217 from CSharperMantle:CSharperMantle-patch-steady-clock 
Use `std::chrono::steady_clock` in `getTickCount`
 2022-08-03 14:09:45 +03:00
Alexander Alekhin
0862d69a6e Merge pull request #22271 from tomoaki0705:dotprod_neon 2022-07-25 15:00:32 +00:00
Giles Payne
b8106e4ba4 Fix bug in Objective-C/Swift [Mat initWithSize:**] functions 2022-07-25 20:57:53 +09:00
HAN Liutong
2bd72af2ef
Merge pull request #22292 from hanliutong:fix 
[GSoC] Fix compilation errors and warnings when using MSVC on Windows.

* Pass reference of the argument.

* Add some cast to suppress warnings.
 2022-07-24 12:15:13 +03:00
Maksim Shabunin
f729202272 core: remove unnecessary pointer cleanup in BufferArea 2022-07-24 11:58:17 +03:00
HAN Liutong
3e3b53f815 Fix compile errors when all SIMD is disabled. 2022-07-21 08:14:32 +00:00
Tomoaki Teshima
b3269b08a1 neon: add dotprod dispatch implementation 
* read vector at runtime
     * add enum
 2022-07-20 19:25:39 +09:00
HAN Liutong
0ef803950b
Merge pull request #22179 from hanliutong:new-rvv 
[GSoC] New universal intrinsic backend for RVV

* Add new rvv backend (partially implemented).

* Modify the framework of Universal Intrinsic.

* Add CV_SIMD macro guards to current UI code.

* Use vlanes() instead of nlanes.

* Modify the UI test.

* Enable the new RVV (scalable) backend.

* Remove whitespace.

* Rename and some others modify.

* Update intrin.hpp but still not work on AVX/SSE

* Update conditional compilation macros.

* Use static variable for vlanes.

* Use max_nlanes for array defining.
 2022-07-19 20:02:00 +03:00
Rong Mantle Bao
fa613e393f
Read CV_CXX11 for C++11 detection 2022-07-10 19:21:17 +08:00