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f5a14532c2
* add missing include * Apply CR
430 lines
13 KiB
C++
430 lines
13 KiB
C++
// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html.
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//
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// Copyright (C) 2017, Intel Corporation, all rights reserved.
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// Third party copyrights are property of their respective owners.
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#include "precomp.hpp"
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#include <opencv2/dnn/shape_utils.hpp>
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#include "op_halide.hpp"
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#include "net_impl.hpp"
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#ifdef HAVE_HALIDE
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#include "halide_scheduler.hpp"
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#include <HalideRuntimeOpenCL.h>
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#include <thread>
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#endif // HAVE_HALIDE
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namespace cv {
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namespace dnn {
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CV__DNN_INLINE_NS_BEGIN
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void Net::Impl::setHalideScheduler(const String& scheduler)
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{
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halideConfigFile = scheduler;
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}
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#ifdef HAVE_HALIDE
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void Net::Impl::compileHalide()
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{
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CV_TRACE_FUNCTION();
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CV_Assert(preferableBackend == DNN_BACKEND_HALIDE);
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HalideScheduler scheduler(halideConfigFile);
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std::vector< std::reference_wrapper<LayerData> > compileList; compileList.reserve(64);
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for (MapIdToLayerData::iterator it = layers.begin(); it != layers.end(); ++it)
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{
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LayerData& ld = it->second;
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Ptr<Layer> layer = ld.layerInstance;
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if (layer->supportBackend(DNN_BACKEND_HALIDE) && !ld.skip)
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{
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CV_Assert(!ld.backendNodes[DNN_BACKEND_HALIDE].empty());
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bool scheduled = scheduler.process(ld.backendNodes[DNN_BACKEND_HALIDE]);
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if (!scheduled)
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{
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// Use automatic scheduling provided by layer.
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layer->applyHalideScheduler(ld.backendNodes[DNN_BACKEND_HALIDE],
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ld.inputBlobs, ld.outputBlobs,
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preferableTarget);
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}
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compileList.emplace_back(ld);
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}
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}
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std::atomic<int> progress(0);
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auto fn = ([&] () -> void
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{
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for (;;)
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{
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int id = progress.fetch_add(1);
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if ((size_t)id >= compileList.size())
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return;
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const LayerData& ld = compileList[id].get();
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Ptr<BackendNode> node = ld.backendNodes.find(DNN_BACKEND_HALIDE)->second;
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dnn::compileHalide(ld.outputBlobs, node, preferableTarget);
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}
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});
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size_t num_threads = std::min(compileList.size(), (size_t)std::thread::hardware_concurrency());
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num_threads = std::max((size_t)1u, std::min((size_t)8u, num_threads));
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std::vector<std::thread> threads(num_threads - 1);
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for (auto& t: threads) t = std::thread(fn);
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fn(); // process own tasks
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for (auto& t: threads) t.join();
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}
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void Net::Impl::initHalideBackend()
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{
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CV_TRACE_FUNCTION();
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CV_Assert_N(preferableBackend == DNN_BACKEND_HALIDE, haveHalide());
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// Iterator to current layer.
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MapIdToLayerData::iterator it = layers.begin();
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// Iterator to base layer for fusion. In example, in case of conv+bn+relu
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// it'll be a conv layer.
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MapIdToLayerData::iterator baseIt = layers.begin();
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for (; it != layers.end(); it++)
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{
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LayerData &ldTop = it->second;
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Ptr<Layer> layerTop = ldTop.layerInstance;
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if (!layerTop->supportBackend(preferableBackend))
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{
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// Move base iterator to layer that don't support preferable
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// backend to prevent fusion over layer of different backend.
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baseIt = it;
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continue;
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}
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// Try to do layers fusion.
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LayerData &ldBot = baseIt->second;
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Ptr<Layer> layerBot = ldBot.layerInstance;
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// 1. Check that bottom and top from the same backends.
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if (it != layers.begin() && layerBot->supportBackend(preferableBackend))
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{
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// 2. Check that current layer works in-place.
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bool inPlace = ldTop.inputBlobs.size() == 1 &&
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ldBot.outputBlobs.size() == 1 &&
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ldTop.inputBlobs[0]->data ==
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ldBot.outputBlobs[0].data;
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if (inPlace)
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{
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// 3. Try to attach node.
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CV_Assert(!ldBot.backendNodes[preferableBackend].empty());
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Ptr<BackendNode> fusedNode =
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layerTop->tryAttach(ldBot.backendNodes[preferableBackend]);
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if (!fusedNode.empty())
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{
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ldTop.skip = true;
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ldBot.backendNodes[preferableBackend] = fusedNode;
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ldBot.outputBlobsWrappers = ldTop.outputBlobsWrappers;
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continue;
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}
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}
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}
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// No layers fusion.
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ldTop.skip = false;
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ldTop.backendNodes[DNN_BACKEND_HALIDE] =
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layerTop->initHalide(ldTop.inputBlobsWrappers);
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baseIt = it;
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}
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}
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#endif // HAVE_HALIDE
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CV__DNN_INLINE_NS_END
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#ifdef HAVE_HALIDE
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static MatShape getBufferShape(const MatShape& shape)
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{
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if (shape.size() == 2 || shape.size() == 4)
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{
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int w, h, c, n;
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getCanonicalSize(shape, &w, &h, &c, &n);
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return {w, h, c, n};
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}
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else
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{
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MatShape bufferShape(shape);
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std::reverse(bufferShape.begin(), bufferShape.end());
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return bufferShape;
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}
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}
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static MatShape getBufferShape(const MatSize& size)
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{
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return getBufferShape(shape(size));
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}
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Halide::Buffer<float> wrapToHalideBuffer(const Mat& mat)
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{
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return wrapToHalideBuffer(mat, getBufferShape(mat.size));
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}
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Halide::Buffer<float> wrapToHalideBuffer(const Mat& mat,
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const std::vector<int>& sizes)
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{
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Halide::Buffer<float> buffer((float*)mat.data, sizes);
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buffer.set_host_dirty(); // Indicate that data is on CPU.
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return buffer;
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}
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Halide::Buffer<> halideBuffer(const Ptr<BackendWrapper>& ptr)
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{
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CV_Assert(!ptr.empty());
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return ptr.dynamicCast<HalideBackendWrapper>()->buffer;
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}
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std::vector<Halide::Buffer<> > halideBuffers(const std::vector<Ptr<BackendWrapper> >& ptrs)
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{
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std::vector<Halide::Buffer<> > vec;
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vec.reserve(ptrs.size());
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for (const Ptr<BackendWrapper>& ptr : ptrs)
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{
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vec.push_back(halideBuffer(ptr));
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}
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return vec;
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}
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void getCanonicalSize(const Halide::Buffer<>& buffer, int* width, int* height,
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int* channels, int* batch)
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{
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CV_Assert(buffer.dimensions() == 4);
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*width = buffer.extent(0);
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*height = buffer.extent(1);
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*channels = buffer.extent(2);
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*batch = buffer.extent(3);
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}
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HalideBackendNode::HalideBackendNode(const Halide::Func& func)
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: BackendNode(DNN_BACKEND_HALIDE), funcs(1, func) {}
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HalideBackendNode::HalideBackendNode(const std::vector<Halide::Func>& funcs)
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: BackendNode(DNN_BACKEND_HALIDE), funcs(funcs) {}
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HalideBackendNode::HalideBackendNode(const Ptr<HalideBackendNode>& base,
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const Halide::Func& top)
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: BackendNode(DNN_BACKEND_HALIDE), funcs(base->funcs)
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{
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funcs.back() = top;
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}
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HalideBackendWrapper::HalideBackendWrapper(int targetId, const cv::Mat& m)
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: BackendWrapper(DNN_BACKEND_HALIDE, targetId)
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{
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managesDevMemory = true;
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buffer = wrapToHalideBuffer(m);
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if (targetId == DNN_TARGET_CPU)
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{
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return;
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}
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else if (targetId == DNN_TARGET_OPENCL)
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{
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Halide::Target t = Halide::get_host_target();
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t.set_feature(Halide::Target::OpenCL);
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buffer.copy_to_device(t);
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}
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else
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CV_Error(Error::StsNotImplemented, "Unknown target identifier");
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}
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HalideBackendWrapper::HalideBackendWrapper(const Ptr<BackendWrapper>& base,
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const MatShape& shape)
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: BackendWrapper(DNN_BACKEND_HALIDE, base->targetId)
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{
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managesDevMemory = false;
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Halide::Buffer<float> baseBuffer = halideBuffer(base);
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buffer = Halide::Buffer<float>((float*)baseBuffer.raw_buffer()->host,
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getBufferShape(shape));
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if (baseBuffer.has_device_allocation())
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{
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buffer.raw_buffer()->device = baseBuffer.raw_buffer()->device;
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buffer.raw_buffer()->device_interface = baseBuffer.raw_buffer()->device_interface;
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buffer.set_device_dirty();
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}
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else
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{
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buffer.set_host_dirty(); // Indicate that data is on CPU.
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CV_Assert(targetId == DNN_TARGET_CPU);
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}
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}
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HalideBackendWrapper::~HalideBackendWrapper()
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{
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if (buffer.has_device_allocation() && !managesDevMemory)
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{
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buffer.raw_buffer()->device = 0;
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buffer.raw_buffer()->device_interface = 0;
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buffer.set_device_dirty(false);
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}
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}
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void HalideBackendWrapper::copyToHost()
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{
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if (buffer.device_dirty())
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{
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buffer.device_sync();
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buffer.copy_to_host();
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}
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}
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void HalideBackendWrapper::setHostDirty()
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{
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buffer.set_device_dirty(false);
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buffer.set_host_dirty();
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}
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#endif // HAVE_HALIDE
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void getCanonicalSize(const MatSize& size, int* w, int* h, int* c, int* n)
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{
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getCanonicalSize(shape(size), w, h, c, n);
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}
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void getCanonicalSize(const MatShape& shape, int* width, int* height,
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int* channels, int* batch)
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{
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const int dims = shape.size();
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CV_Assert(dims == 2 || dims == 4);
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*batch = shape[0];
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*channels = shape[1];
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if (dims == 4)
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{
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*width = shape[3];
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*height = shape[2];
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}
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else
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{
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*width = 1;
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*height = 1;
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}
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}
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void compileHalide(const std::vector<Mat> &outputs, Ptr<BackendNode>& node, int targetId)
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{
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#ifdef HAVE_HALIDE
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CV_Assert(!node.empty());
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Halide::Func& top = node.dynamicCast<HalideBackendNode>()->funcs.back();
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int outW, outH, outC, outN;
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Halide::Var x("x"), y("y"), c("c"), n("n");
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getCanonicalSize(outputs[0].size, &outW, &outH, &outC, &outN);
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top.bound(x, 0, outW).bound(y, 0, outH)
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.bound(c, 0, outC).bound(n, 0, outN);
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Halide::Target target = Halide::get_host_target();
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target.set_feature(Halide::Target::NoAsserts);
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if (targetId == DNN_TARGET_OPENCL)
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{
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target.set_feature(Halide::Target::OpenCL);
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}
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CV_Assert(target.supported());
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top.compile_jit(target);
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#endif // HAVE_HALIDE
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}
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void forwardHalide(std::vector<Ptr<BackendWrapper> > &outputs,
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const Ptr<BackendNode>& node)
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{
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#ifdef HAVE_HALIDE
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CV_Assert(!node.empty());
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Halide::Func& top = node.dynamicCast<HalideBackendNode>()->funcs.back();
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auto outputBuffers = halideBuffers(outputs);
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top.realize(Halide::Realization(outputBuffers));
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#endif // HAVE_HALIDE
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}
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bool haveHalide()
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{
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#ifdef HAVE_HALIDE
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return true;
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#else
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return false;
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#endif // HAVE_HALIDE
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}
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CV__DNN_INLINE_NS_BEGIN
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void Layer::applyHalideScheduler(Ptr<BackendNode>& node, const std::vector<Mat*> &inputs,
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const std::vector<Mat> &outputs, int targetId) const
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{
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#ifndef HAVE_HALIDE
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CV_Error(Error::StsNotImplemented, "");
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#else
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CV_TRACE_FUNCTION();
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Halide::Var x("x"), y("y"), c("c"), n("n"), co("co"), ci("ci"),
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xo("xo"), xi("xi"), yo("yo"), yi("yi"), tile("tile");
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Halide::Func& top = node.dynamicCast<HalideBackendNode>()->funcs.back();
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int outW, outH, outC, outN;
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getCanonicalSize(outputs[0].size, &outW, &outH, &outC, &outN);
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if (targetId == DNN_TARGET_CPU)
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{
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if (outW == 1 && outH == 1)
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{
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if (outC + outN == 1)
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return;
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if (outC > 8)
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top.split(c, co, ci, 8)
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.fuse(x, y, tile).fuse(co, tile, tile).fuse(n, tile, tile)
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.parallel(tile)
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.vectorize(ci, 8);
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else
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top.fuse(x, y, tile).fuse(c, tile, tile).fuse(n, tile, tile)
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.parallel(tile);
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}
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else
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{
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if (outH > 2)
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{
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top.reorder(x, c, y)
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.split(y, yo, yi, 2)
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.fuse(yo, n, tile)
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.parallel(tile)
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.unroll(yi)
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.vectorize(x, outW >= 16 ? 16 : outW);
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}
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}
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}
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else if (targetId == DNN_TARGET_OPENCL)
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{
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if (outW == 1 && outH == 1)
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{
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int c_split = outC > 8 ? (outC > 16 ? 8 : 4) : outC;
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top.split(c, co, ci, c_split)
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.fuse(x, y, tile).fuse(co, tile, tile).fuse(n, tile, tile)
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.gpu_blocks(tile)
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.gpu_threads(ci);
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}
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else
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{
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int x_split = outW > 8 ? (outW >= 32 ? 16 : 8) : outW;
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int y_split = outH > 8 ? (outH >= 32 ? 16 : 8) : outH;
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// Supported vectorization widths: 2, 3, 4, 8, 16
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int c_split = outC > 8 ? (outC > 16 ? 8 : 4) : std::min(4, outC);
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top.split(x, xo, xi, x_split).split(y, yo, yi, y_split)
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.split(c, co, ci, c_split)
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.gpu_blocks(xo, yo, co)
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.gpu_threads(xi, yi)
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.reorder(xi, yi, ci, xo, yo, co)
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.vectorize(ci);
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}
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}
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else
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CV_Error(Error::StsNotImplemented, "Unknown target identifier");
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#endif // HAVE_HALIDE
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}
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CV__DNN_INLINE_NS_END
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}} // namespace
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