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https://github.com/microsoft/vcpkg.git
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f3c8c1cf46
* [gmp] update download urls * line breaks
522 lines
11 KiB
Diff
522 lines
11 KiB
Diff
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# HG changeset patch
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# User Torbjorn Granlund <tg@gmplib.org>
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# Date 1606685500 -3600
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# Node ID 5f32dbc41afc1f8cd77af1614f0caeb24deb7d7b
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# Parent 94c84d919f83ba963ed1809f8e80c7bef32db55c
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Avoid the x18 register since it is reserved on Darwin.
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aors_n.asm
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--- a/mpn/arm64/aors_n.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/aors_n.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -68,7 +68,7 @@
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EPILOGUE()
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PROLOGUE(func_n)
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CLRCY
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-L(ent): lsr x18, n, #2
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+L(ent): lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x7, [up]
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@@ -77,7 +77,7 @@
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str x13, [rp],#8
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tbnz n, #1, L(b11)
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-L(b01): cbz x18, L(ret)
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+L(b01): cbz x17, L(ret)
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ldp x4, x5, [up,#8]
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ldp x8, x9, [vp,#8]
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sub up, up, #8
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@@ -88,7 +88,7 @@
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ldp x10, x11, [vp,#8]
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add up, up, #8
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add vp, vp, #8
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- cbz x18, L(end)
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+ cbz x17, L(end)
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b L(top)
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L(bx0): tbnz n, #1, L(b10)
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@@ -101,7 +101,7 @@
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L(b10): ldp x6, x7, [up]
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ldp x10, x11, [vp]
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- cbz x18, L(end)
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+ cbz x17, L(end)
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ALIGN(16)
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L(top): ldp x4, x5, [up,#16]
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@@ -114,8 +114,8 @@
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ADDSUBC x12, x4, x8
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ADDSUBC x13, x5, x9
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stp x12, x13, [rp],#16
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- sub x18, x18, #1
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- cbnz x18, L(top)
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+ sub x17, x17, #1
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+ cbnz x17, L(top)
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L(end): ADDSUBC x12, x6, x10
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ADDSUBC x13, x7, x11
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aorsmul_1.asm
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--- a/mpn/arm64/aorsmul_1.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/aorsmul_1.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -32,10 +32,15 @@
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include(`../config.m4')
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-C cycles/limb
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-C Cortex-A53 9.3-9.8
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-C Cortex-A57 7.0
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-C X-Gene 5.0
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+C addmul_1 submul_1
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+C cycles/limb cycles/limb
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+C Cortex-A53 9.3-9.8 9.3-9.8
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+C Cortex-A55 9.0-9.5 9.3-9.8
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+C Cortex-A57 7 7
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+C Cortex-A72
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+C Cortex-A73 6 6
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+C X-Gene 5 5
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+C Apple M1 1.75 1.75
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C NOTES
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C * It is possible to keep the carry chain alive between the addition blocks
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/aorsorrlshC_n.asm
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--- a/mpn/arm64/aorsorrlshC_n.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/aorsorrlshC_n.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -65,14 +65,14 @@
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ASM_START()
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PROLOGUE(func_n)
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- lsr x18, n, #2
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+ lsr x6, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x5, [up]
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tbnz n, #1, L(b11)
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L(b01): ldr x11, [vp]
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- cbz x18, L(1)
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+ cbz x6, L(1)
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ldp x8, x9, [vp,#8]
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lsl x13, x11, #LSH
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ADDSUB( x15, x13, x5)
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@@ -94,7 +94,7 @@
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ADDSUB( x17, x13, x5)
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str x17, [rp],#8
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sub up, up, #8
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- cbz x18, L(end)
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+ cbz x6, L(end)
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b L(top)
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L(bx0): tbnz n, #1, L(b10)
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@@ -107,7 +107,7 @@
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L(b10): CLRRCY( x9)
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ldp x10, x11, [vp]
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sub up, up, #16
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- cbz x18, L(end)
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+ cbz x6, L(end)
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ALIGN(16)
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L(top): ldp x4, x5, [up,#16]
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@@ -124,8 +124,8 @@
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ADDSUBC(x16, x12, x4)
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ADDSUBC(x17, x13, x5)
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stp x16, x17, [rp],#16
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- sub x18, x18, #1
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- cbnz x18, L(top)
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+ sub x6, x6, #1
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+ cbnz x6, L(top)
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L(end): ldp x4, x5, [up,#16]
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extr x12, x10, x9, #RSH
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/cnd_aors_n.asm
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--- a/mpn/arm64/cnd_aors_n.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/cnd_aors_n.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -65,7 +65,7 @@
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CLRCY
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- lsr x18, n, #2
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+ lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x13, [vp]
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@@ -75,7 +75,7 @@
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str x9, [rp]
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tbnz n, #1, L(b11)
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-L(b01): cbz x18, L(rt)
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+L(b01): cbz x17, L(rt)
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ldp x12, x13, [vp,#8]
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ldp x10, x11, [up,#8]
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sub up, up, #8
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@@ -86,7 +86,7 @@
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L(b11): ldp x12, x13, [vp,#8]!
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ldp x10, x11, [up,#8]!
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sub rp, rp, #8
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- cbz x18, L(end)
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+ cbz x17, L(end)
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b L(top)
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L(bx0): ldp x12, x13, [vp]
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@@ -99,7 +99,7 @@
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b L(mid)
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L(b10): sub rp, rp, #16
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- cbz x18, L(end)
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+ cbz x17, L(end)
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ALIGN(16)
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L(top): bic x6, x12, cnd
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@@ -116,8 +116,8 @@
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ADDSUBC x9, x11, x7
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ldp x10, x11, [up,#32]!
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stp x8, x9, [rp,#32]!
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- sub x18, x18, #1
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- cbnz x18, L(top)
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+ sub x17, x17, #1
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+ cbnz x17, L(top)
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L(end): bic x6, x12, cnd
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bic x7, x13, cnd
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/logops_n.asm
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--- a/mpn/arm64/logops_n.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/logops_n.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -78,7 +78,7 @@
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ASM_START()
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PROLOGUE(func)
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- lsr x18, n, #2
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+ lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x7, [up]
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@@ -88,7 +88,7 @@
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str x15, [rp],#8
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tbnz n, #1, L(b11)
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-L(b01): cbz x18, L(ret)
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+L(b01): cbz x17, L(ret)
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ldp x4, x5, [up,#8]
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ldp x8, x9, [vp,#8]
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sub up, up, #8
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@@ -99,7 +99,7 @@
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ldp x10, x11, [vp,#8]
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add up, up, #8
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add vp, vp, #8
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- cbz x18, L(end)
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+ cbz x17, L(end)
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b L(top)
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L(bx0): tbnz n, #1, L(b10)
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@@ -110,7 +110,7 @@
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L(b10): ldp x6, x7, [up]
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ldp x10, x11, [vp]
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- cbz x18, L(end)
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+ cbz x17, L(end)
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ALIGN(16)
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L(top): ldp x4, x5, [up,#16]
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@@ -127,8 +127,8 @@
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POSTOP( x12)
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POSTOP( x13)
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stp x12, x13, [rp],#16
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- sub x18, x18, #1
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- cbnz x18, L(top)
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+ sub x17, x17, #1
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+ cbnz x17, L(top)
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L(end): LOGOP( x12, x6, x10)
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LOGOP( x13, x7, x11)
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/lshift.asm
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--- a/mpn/arm64/lshift.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/lshift.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -61,7 +61,7 @@
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add rp, rp_arg, n, lsl #3
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add up, up, n, lsl #3
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sub tnc, xzr, cnt
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- lsr x18, n, #2
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+ lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x4, [up,#-8]
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@@ -69,7 +69,7 @@
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L(b01): NSHIFT x0, x4, tnc
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PSHIFT x2, x4, cnt
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- cbnz x18, L(gt1)
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+ cbnz x17, L(gt1)
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str x2, [rp,#-8]
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ret
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L(gt1): ldp x4, x5, [up,#-24]
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@@ -89,7 +89,7 @@
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PSHIFT x13, x5, cnt
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NSHIFT x10, x4, tnc
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PSHIFT x2, x4, cnt
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- cbnz x18, L(gt2)
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+ cbnz x17, L(gt2)
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orr x10, x10, x13
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stp x2, x10, [rp,#-16]
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ret
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@@ -123,11 +123,11 @@
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orr x11, x12, x2
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stp x10, x11, [rp,#-32]!
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PSHIFT x2, x4, cnt
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-L(lo0): sub x18, x18, #1
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+L(lo0): sub x17, x17, #1
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L(lo3): NSHIFT x10, x6, tnc
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PSHIFT x13, x7, cnt
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NSHIFT x12, x7, tnc
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- cbnz x18, L(top)
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+ cbnz x17, L(top)
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L(end): orr x10, x10, x13
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orr x11, x12, x2
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/lshiftc.asm
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--- a/mpn/arm64/lshiftc.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/lshiftc.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -61,7 +61,7 @@
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add rp, rp_arg, n, lsl #3
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add up, up, n, lsl #3
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sub tnc, xzr, cnt
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- lsr x18, n, #2
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+ lsr x17, n, #2
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tbz n, #0, L(bx0)
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L(bx1): ldr x4, [up,#-8]
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@@ -69,7 +69,7 @@
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L(b01): NSHIFT x0, x4, tnc
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PSHIFT x2, x4, cnt
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- cbnz x18, L(gt1)
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+ cbnz x17, L(gt1)
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mvn x2, x2
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str x2, [rp,#-8]
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ret
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@@ -90,7 +90,7 @@
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PSHIFT x13, x5, cnt
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NSHIFT x10, x4, tnc
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PSHIFT x2, x4, cnt
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- cbnz x18, L(gt2)
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+ cbnz x17, L(gt2)
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eon x10, x10, x13
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mvn x2, x2
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stp x2, x10, [rp,#-16]
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@@ -125,11 +125,11 @@
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eon x11, x12, x2
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stp x10, x11, [rp,#-32]!
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PSHIFT x2, x4, cnt
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-L(lo0): sub x18, x18, #1
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+L(lo0): sub x17, x17, #1
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L(lo3): NSHIFT x10, x6, tnc
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PSHIFT x13, x7, cnt
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NSHIFT x12, x7, tnc
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- cbnz x18, L(top)
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+ cbnz x17, L(top)
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L(end): eon x10, x10, x13
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eon x11, x12, x2
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/mul_1.asm
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--- a/mpn/arm64/mul_1.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/mul_1.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -56,7 +56,7 @@
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PROLOGUE(mpn_mul_1)
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adds x4, xzr, xzr C clear register and cy flag
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-L(com): lsr x18, n, #2
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+L(com): lsr x17, n, #2
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tbnz n, #0, L(bx1)
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L(bx0): mov x11, x4
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@@ -65,7 +65,7 @@
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L(b10): ldp x4, x5, [up]
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mul x8, x4, v0
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umulh x10, x4, v0
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- cbz x18, L(2)
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+ cbz x17, L(2)
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ldp x6, x7, [up,#16]!
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mul x9, x5, v0
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b L(mid)-8
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@@ -80,7 +80,7 @@
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str x9, [rp],#8
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tbnz n, #1, L(b10)
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-L(b01): cbz x18, L(1)
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+L(b01): cbz x17, L(1)
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L(b00): ldp x6, x7, [up]
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mul x8, x6, v0
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@@ -90,8 +90,8 @@
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adcs x12, x8, x11
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umulh x11, x7, v0
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add rp, rp, #16
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- sub x18, x18, #1
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- cbz x18, L(end)
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+ sub x17, x17, #1
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+ cbz x17, L(end)
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ALIGN(16)
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L(top): mul x8, x4, v0
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@@ -110,8 +110,8 @@
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stp x12, x13, [rp],#32
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adcs x12, x8, x11
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umulh x11, x7, v0
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- sub x18, x18, #1
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- cbnz x18, L(top)
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+ sub x17, x17, #1
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+ cbnz x17, L(top)
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L(end): mul x8, x4, v0
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adcs x13, x9, x10
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diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/rsh1aors_n.asm
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--- a/mpn/arm64/rsh1aors_n.asm Sat Nov 28 23:38:32 2020 +0100
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+++ b/mpn/arm64/rsh1aors_n.asm Sun Nov 29 22:31:40 2020 +0100
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@@ -59,7 +59,7 @@
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ASM_START()
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PROLOGUE(func_n)
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- lsr x18, n, #2
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+ lsr x6, n, #2
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tbz n, #0, L(bx0)
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@@ -69,7 +69,7 @@
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L(b01): ADDSUB x13, x5, x9
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and x10, x13, #1
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- cbz x18, L(1)
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+ cbz x6, L(1)
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ldp x4, x5, [up],#48
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ldp x8, x9, [vp],#48
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ADDSUBC x14, x4, x8
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@@ -80,8 +80,8 @@
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ADDSUBC x12, x4, x8
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ADDSUBC x13, x5, x9
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str x17, [rp], #24
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- sub x18, x18, #1
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- cbz x18, L(end)
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+ sub x6, x6, #1
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+ cbz x6, L(end)
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b L(top)
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L(1): cset x14, COND
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@@ -97,7 +97,7 @@
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ldp x8, x9, [vp],#32
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ADDSUBC x12, x4, x8
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ADDSUBC x13, x5, x9
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- cbz x18, L(3)
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+ cbz x6, L(3)
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ldp x4, x5, [up,#-16]
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ldp x8, x9, [vp,#-16]
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extr x17, x12, x15, #1
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@@ -117,7 +117,7 @@
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ADDSUB x12, x4, x8
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ADDSUBC x13, x5, x9
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and x10, x12, #1
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- cbz x18, L(2)
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+ cbz x6, L(2)
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ldp x4, x5, [up,#-16]
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ldp x8, x9, [vp,#-16]
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ADDSUBC x14, x4, x8
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@@ -134,8 +134,8 @@
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ADDSUBC x12, x4, x8
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ADDSUBC x13, x5, x9
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add rp, rp, #16
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- sub x18, x18, #1
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- cbz x18, L(end)
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+ sub x6, x6, #1
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+ cbz x6, L(end)
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ALIGN(16)
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L(top): ldp x4, x5, [up,#-16]
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@@ -152,8 +152,8 @@
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ADDSUBC x12, x4, x8
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ADDSUBC x13, x5, x9
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|
stp x16, x17, [rp],#32
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|
- sub x18, x18, #1
|
|
- cbnz x18, L(top)
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|
+ sub x6, x6, #1
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|
+ cbnz x6, L(top)
|
|
|
|
L(end): extr x16, x15, x14, #1
|
|
extr x17, x12, x15, #1
|
|
diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/rshift.asm
|
|
--- a/mpn/arm64/rshift.asm Sat Nov 28 23:38:32 2020 +0100
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|
+++ b/mpn/arm64/rshift.asm Sun Nov 29 22:31:40 2020 +0100
|
|
@@ -60,7 +60,7 @@
|
|
PROLOGUE(mpn_rshift)
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|
mov rp, rp_arg
|
|
sub tnc, xzr, cnt
|
|
- lsr x18, n, #2
|
|
+ lsr x17, n, #2
|
|
tbz n, #0, L(bx0)
|
|
|
|
L(bx1): ldr x5, [up]
|
|
@@ -68,7 +68,7 @@
|
|
|
|
L(b01): NSHIFT x0, x5, tnc
|
|
PSHIFT x2, x5, cnt
|
|
- cbnz x18, L(gt1)
|
|
+ cbnz x17, L(gt1)
|
|
str x2, [rp]
|
|
ret
|
|
L(gt1): ldp x4, x5, [up,#8]
|
|
@@ -89,7 +89,7 @@
|
|
PSHIFT x13, x4, cnt
|
|
NSHIFT x10, x5, tnc
|
|
PSHIFT x2, x5, cnt
|
|
- cbnz x18, L(gt2)
|
|
+ cbnz x17, L(gt2)
|
|
orr x10, x10, x13
|
|
stp x10, x2, [rp]
|
|
ret
|
|
@@ -121,11 +121,11 @@
|
|
orr x11, x12, x2
|
|
stp x11, x10, [rp,#32]!
|
|
PSHIFT x2, x5, cnt
|
|
-L(lo0): sub x18, x18, #1
|
|
+L(lo0): sub x17, x17, #1
|
|
L(lo3): NSHIFT x10, x7, tnc
|
|
NSHIFT x12, x6, tnc
|
|
PSHIFT x13, x6, cnt
|
|
- cbnz x18, L(top)
|
|
+ cbnz x17, L(top)
|
|
|
|
L(end): orr x10, x10, x13
|
|
orr x11, x12, x2
|
|
diff -r 94c84d919f83 -r 5f32dbc41afc mpn/arm64/sqr_diag_addlsh1.asm
|
|
--- a/mpn/arm64/sqr_diag_addlsh1.asm Sat Nov 28 23:38:32 2020 +0100
|
|
+++ b/mpn/arm64/sqr_diag_addlsh1.asm Sun Nov 29 22:31:40 2020 +0100
|
|
@@ -47,7 +47,7 @@
|
|
ASM_START()
|
|
PROLOGUE(mpn_sqr_diag_addlsh1)
|
|
ldr x15, [up],#8
|
|
- lsr x18, n, #1
|
|
+ lsr x14, n, #1
|
|
tbz n, #0, L(bx0)
|
|
|
|
L(bx1): adds x7, xzr, xzr
|
|
@@ -62,8 +62,8 @@
|
|
ldr x17, [up],#16
|
|
ldp x6, x7, [tp],#32
|
|
umulh x11, x15, x15
|
|
- sub x18, x18, #1
|
|
- cbz x18, L(end)
|
|
+ sub x14, x14, #1
|
|
+ cbz x14, L(end)
|
|
|
|
ALIGN(16)
|
|
L(top): extr x9, x6, x5, #63
|
|
@@ -84,8 +84,8 @@
|
|
extr x8, x5, x4, #63
|
|
stp x12, x13, [rp],#16
|
|
adcs x12, x8, x10
|
|
- sub x18, x18, #1
|
|
- cbnz x18, L(top)
|
|
+ sub x14, x14, #1
|
|
+ cbnz x14, L(top)
|
|
|
|
L(end): extr x9, x6, x5, #63
|
|
mul x10, x17, x17
|
|
|