2018-02-06 20:02:51 +08:00
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// This file is part of OpenCV project.
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// It is subject to the license terms in the LICENSE file found in the top-level directory
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// of this distribution and at http://opencv.org/license.html
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2010-05-12 01:44:00 +08:00
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2018-02-06 20:02:51 +08:00
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#include "precomp.hpp"
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2017-06-06 21:26:51 +08:00
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#include "convert.hpp"
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2016-11-12 02:47:46 +08:00
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2020-11-12 01:57:53 +08:00
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#if !defined(OPENCV_SUPRESS_WARNING_AVX2_WITHOUT_FP16C) && \
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(defined(__GNUC__) && defined(__AVX2__) && !defined(__F16C__))
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#warning "Non-optimal compiler flags: AVX2 without FP16. Generated code is very slow. Consider adding '-mf16c' compiler option."
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#endif
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2018-02-06 20:02:51 +08:00
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namespace cv {
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2019-02-12 22:27:44 +08:00
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namespace hal {
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN
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2024-03-22 04:44:19 +08:00
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void cvt16f32f(const hfloat* src, float* dst, int len);
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void cvt32f16f(const float* src, hfloat* dst, int len);
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2019-02-12 22:27:44 +08:00
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void addRNGBias32f(float* arr, const float* scaleBiasPairs, int len);
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void addRNGBias64f(double* arr, const double* scaleBiasPairs, int len);
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CV_CPU_OPTIMIZATION_NAMESPACE_END
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} // namespace cv::hal
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2019-02-08 22:37:59 +08:00
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN
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BinaryFunc getConvertFunc(int sdepth, int ddepth);
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2019-02-12 22:27:44 +08:00
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CV_CPU_OPTIMIZATION_NAMESPACE_END
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2019-02-08 22:37:59 +08:00
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#ifndef CV_CPU_OPTIMIZATION_DECLARATIONS_ONLY
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2015-12-03 19:43:37 +08:00
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2018-09-10 21:56:29 +08:00
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namespace hal {
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2019-02-12 22:27:44 +08:00
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN
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BinaryFunc getConvertFunc(int sdepth, int ddepth);
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2017-04-21 19:52:45 +08:00
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2024-03-22 04:44:19 +08:00
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void cvt16f32f( const hfloat* src, float* dst, int len )
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2017-04-21 19:52:45 +08:00
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{
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2019-02-12 22:27:44 +08:00
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CV_INSTRUMENT_REGION();
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2018-09-07 00:36:59 +08:00
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int j = 0;
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Merge pull request #23980 from hanliutong:rewrite-core
Rewrite Universal Intrinsic code by using new API: Core module. #23980
The goal of this PR is to match and modify all SIMD code blocks guarded by `CV_SIMD` macro in the `opencv/modules/core` folder and rewrite them by using the new Universal Intrinsic API.
The patch is almost auto-generated by using the [rewriter](https://github.com/hanliutong/rewriter), related PR #23885.
Most of the files have been rewritten, but I marked this PR as draft because, the `CV_SIMD` macro also exists in the following files, and the reasons why they are not rewrited are:
1. ~~code design for fixed-size SIMD (v_int16x8, v_float32x4, etc.), need to manually rewrite.~~ Rewrited
- ./modules/core/src/stat.simd.hpp
- ./modules/core/src/matrix_transform.cpp
- ./modules/core/src/matmul.simd.hpp
2. Vector types are wrapped in other class/struct, that are not supported by the compiler in variable-length backends. Can not be rewrited directly.
- ./modules/core/src/mathfuncs_core.simd.hpp
```cpp
struct v_atan_f32
{
explicit v_atan_f32(const float& scale)
{
...
}
v_float32 compute(const v_float32& y, const v_float32& x)
{
...
}
...
v_float32 val90; // sizeless type can not used in a class
v_float32 val180;
v_float32 val360;
v_float32 s;
};
```
3. The API interface does not support/does not match
- ./modules/core/src/norm.cpp
Use `v_popcount`, ~~waiting for #23966~~ Fixed
- ./modules/core/src/has_non_zero.simd.hpp
Use illegal Universal Intrinsic API: For float type, there is no logical operation `|`. Further discussion needed
```cpp
/** @brief Bitwise OR
Only for integer types. */
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n> operator|(const v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n>& operator|=(v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
```
```cpp
#if CV_SIMD
typedef v_float32 v_type;
const v_type v_zero = vx_setzero_f32();
constexpr const int unrollCount = 8;
int step = v_type::nlanes * unrollCount;
int len0 = len & -step;
const float* srcSimdEnd = src+len0;
int countSIMD = static_cast<int>((srcSimdEnd-src)/step);
while(!res && countSIMD--)
{
v_type v0 = vx_load(src);
src += v_type::nlanes;
v_type v1 = vx_load(src);
src += v_type::nlanes;
....
src += v_type::nlanes;
v0 |= v1; //Illegal ?
....
//res = v_check_any(((v0 | v4) != v_zero));//beware : (NaN != 0) returns "false" since != is mapped to _CMP_NEQ_OQ and not _CMP_NEQ_UQ
res = !v_check_all(((v0 | v4) == v_zero));
}
v_cleanup();
#endif
```
### Pull Request Readiness Checklist
See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request
- [ ] I agree to contribute to the project under Apache 2 License.
- [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2023-08-11 13:33:33 +08:00
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#if (CV_SIMD || CV_SIMD_SCALABLE)
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const int VECSZ = VTraits<v_float32>::vlanes();
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2018-09-07 00:36:59 +08:00
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for( ; j < len; j += VECSZ )
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2017-04-21 19:52:45 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j > len - VECSZ )
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2017-04-21 19:52:45 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j == 0 )
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break;
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j = len - VECSZ;
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2017-04-21 19:52:45 +08:00
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}
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2018-09-07 00:36:59 +08:00
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v_store(dst + j, vx_load_expand(src + j));
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2017-04-21 19:52:45 +08:00
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}
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2017-12-15 05:00:35 +08:00
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#endif
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2018-09-07 00:36:59 +08:00
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for( ; j < len; j++ )
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dst[j] = (float)src[j];
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}
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2015-01-12 15:59:29 +08:00
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2024-03-22 04:44:19 +08:00
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void cvt32f16f( const float* src, hfloat* dst, int len )
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2015-01-12 15:59:29 +08:00
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{
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2019-02-12 22:27:44 +08:00
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CV_INSTRUMENT_REGION();
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2018-09-07 00:36:59 +08:00
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int j = 0;
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Merge pull request #23980 from hanliutong:rewrite-core
Rewrite Universal Intrinsic code by using new API: Core module. #23980
The goal of this PR is to match and modify all SIMD code blocks guarded by `CV_SIMD` macro in the `opencv/modules/core` folder and rewrite them by using the new Universal Intrinsic API.
The patch is almost auto-generated by using the [rewriter](https://github.com/hanliutong/rewriter), related PR #23885.
Most of the files have been rewritten, but I marked this PR as draft because, the `CV_SIMD` macro also exists in the following files, and the reasons why they are not rewrited are:
1. ~~code design for fixed-size SIMD (v_int16x8, v_float32x4, etc.), need to manually rewrite.~~ Rewrited
- ./modules/core/src/stat.simd.hpp
- ./modules/core/src/matrix_transform.cpp
- ./modules/core/src/matmul.simd.hpp
2. Vector types are wrapped in other class/struct, that are not supported by the compiler in variable-length backends. Can not be rewrited directly.
- ./modules/core/src/mathfuncs_core.simd.hpp
```cpp
struct v_atan_f32
{
explicit v_atan_f32(const float& scale)
{
...
}
v_float32 compute(const v_float32& y, const v_float32& x)
{
...
}
...
v_float32 val90; // sizeless type can not used in a class
v_float32 val180;
v_float32 val360;
v_float32 s;
};
```
3. The API interface does not support/does not match
- ./modules/core/src/norm.cpp
Use `v_popcount`, ~~waiting for #23966~~ Fixed
- ./modules/core/src/has_non_zero.simd.hpp
Use illegal Universal Intrinsic API: For float type, there is no logical operation `|`. Further discussion needed
```cpp
/** @brief Bitwise OR
Only for integer types. */
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n> operator|(const v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n>& operator|=(v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
```
```cpp
#if CV_SIMD
typedef v_float32 v_type;
const v_type v_zero = vx_setzero_f32();
constexpr const int unrollCount = 8;
int step = v_type::nlanes * unrollCount;
int len0 = len & -step;
const float* srcSimdEnd = src+len0;
int countSIMD = static_cast<int>((srcSimdEnd-src)/step);
while(!res && countSIMD--)
{
v_type v0 = vx_load(src);
src += v_type::nlanes;
v_type v1 = vx_load(src);
src += v_type::nlanes;
....
src += v_type::nlanes;
v0 |= v1; //Illegal ?
....
//res = v_check_any(((v0 | v4) != v_zero));//beware : (NaN != 0) returns "false" since != is mapped to _CMP_NEQ_OQ and not _CMP_NEQ_UQ
res = !v_check_all(((v0 | v4) == v_zero));
}
v_cleanup();
#endif
```
### Pull Request Readiness Checklist
See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request
- [ ] I agree to contribute to the project under Apache 2 License.
- [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2023-08-11 13:33:33 +08:00
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#if (CV_SIMD || CV_SIMD_SCALABLE)
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const int VECSZ = VTraits<v_float32>::vlanes();
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2018-09-07 00:36:59 +08:00
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for( ; j < len; j += VECSZ )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j > len - VECSZ )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j == 0 )
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break;
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j = len - VECSZ;
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2015-01-12 15:59:29 +08:00
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}
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2018-09-07 00:36:59 +08:00
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v_pack_store(dst + j, vx_load(src + j));
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2015-01-12 15:59:29 +08:00
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}
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2018-09-07 00:36:59 +08:00
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#endif
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for( ; j < len; j++ )
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2024-03-22 04:44:19 +08:00
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dst[j] = hfloat(src[j]);
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2018-09-07 00:36:59 +08:00
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}
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2015-01-12 15:59:29 +08:00
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2018-09-10 21:56:29 +08:00
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void addRNGBias32f( float* arr, const float* scaleBiasPairs, int len )
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2015-01-12 15:59:29 +08:00
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{
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2019-02-12 22:27:44 +08:00
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CV_INSTRUMENT_REGION();
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2018-09-07 00:36:59 +08:00
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// the loop is simple enough, so we let the compiler to vectorize it
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for( int i = 0; i < len; i++ )
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2018-09-10 21:56:29 +08:00
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arr[i] += scaleBiasPairs[i*2 + 1];
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2018-09-07 00:36:59 +08:00
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}
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2015-01-12 15:59:29 +08:00
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2018-09-07 00:36:59 +08:00
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void addRNGBias64f( double* arr, const double* scaleBiasPairs, int len )
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2015-01-12 15:59:29 +08:00
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{
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2019-02-12 22:27:44 +08:00
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CV_INSTRUMENT_REGION();
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2018-09-07 00:36:59 +08:00
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// the loop is simple enough, so we let the compiler to vectorize it
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for( int i = 0; i < len; i++ )
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2018-09-10 21:56:29 +08:00
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arr[i] += scaleBiasPairs[i*2 + 1];
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2018-09-07 00:36:59 +08:00
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}
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2015-01-12 15:59:29 +08:00
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2019-02-12 22:27:44 +08:00
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CV_CPU_OPTIMIZATION_NAMESPACE_END
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} // namespace cv::hal
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// cv::
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CV_CPU_OPTIMIZATION_NAMESPACE_BEGIN
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2015-01-12 15:59:29 +08:00
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2019-02-08 22:37:59 +08:00
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template<typename _Ts, typename _Td, typename _Twvec> static inline void
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2018-09-07 00:36:59 +08:00
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cvt_( const _Ts* src, size_t sstep, _Td* dst, size_t dstep, Size size )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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2015-01-12 15:59:29 +08:00
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2018-09-07 00:36:59 +08:00
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for( int i = 0; i < size.height; i++, src += sstep, dst += dstep )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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int j = 0;
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Merge pull request #23980 from hanliutong:rewrite-core
Rewrite Universal Intrinsic code by using new API: Core module. #23980
The goal of this PR is to match and modify all SIMD code blocks guarded by `CV_SIMD` macro in the `opencv/modules/core` folder and rewrite them by using the new Universal Intrinsic API.
The patch is almost auto-generated by using the [rewriter](https://github.com/hanliutong/rewriter), related PR #23885.
Most of the files have been rewritten, but I marked this PR as draft because, the `CV_SIMD` macro also exists in the following files, and the reasons why they are not rewrited are:
1. ~~code design for fixed-size SIMD (v_int16x8, v_float32x4, etc.), need to manually rewrite.~~ Rewrited
- ./modules/core/src/stat.simd.hpp
- ./modules/core/src/matrix_transform.cpp
- ./modules/core/src/matmul.simd.hpp
2. Vector types are wrapped in other class/struct, that are not supported by the compiler in variable-length backends. Can not be rewrited directly.
- ./modules/core/src/mathfuncs_core.simd.hpp
```cpp
struct v_atan_f32
{
explicit v_atan_f32(const float& scale)
{
...
}
v_float32 compute(const v_float32& y, const v_float32& x)
{
...
}
...
v_float32 val90; // sizeless type can not used in a class
v_float32 val180;
v_float32 val360;
v_float32 s;
};
```
3. The API interface does not support/does not match
- ./modules/core/src/norm.cpp
Use `v_popcount`, ~~waiting for #23966~~ Fixed
- ./modules/core/src/has_non_zero.simd.hpp
Use illegal Universal Intrinsic API: For float type, there is no logical operation `|`. Further discussion needed
```cpp
/** @brief Bitwise OR
Only for integer types. */
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n> operator|(const v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n>& operator|=(v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
```
```cpp
#if CV_SIMD
typedef v_float32 v_type;
const v_type v_zero = vx_setzero_f32();
constexpr const int unrollCount = 8;
int step = v_type::nlanes * unrollCount;
int len0 = len & -step;
const float* srcSimdEnd = src+len0;
int countSIMD = static_cast<int>((srcSimdEnd-src)/step);
while(!res && countSIMD--)
{
v_type v0 = vx_load(src);
src += v_type::nlanes;
v_type v1 = vx_load(src);
src += v_type::nlanes;
....
src += v_type::nlanes;
v0 |= v1; //Illegal ?
....
//res = v_check_any(((v0 | v4) != v_zero));//beware : (NaN != 0) returns "false" since != is mapped to _CMP_NEQ_OQ and not _CMP_NEQ_UQ
res = !v_check_all(((v0 | v4) == v_zero));
}
v_cleanup();
#endif
```
### Pull Request Readiness Checklist
See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request
- [ ] I agree to contribute to the project under Apache 2 License.
- [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2023-08-11 13:33:33 +08:00
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#if (CV_SIMD || CV_SIMD_SCALABLE)
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const int VECSZ = VTraits<_Twvec>::vlanes()*2;
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2018-09-07 00:36:59 +08:00
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for( ; j < size.width; j += VECSZ )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j > size.width - VECSZ )
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2017-12-15 05:00:35 +08:00
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{
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2018-09-07 00:36:59 +08:00
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if( j == 0 || src == (_Ts*)dst )
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break;
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j = size.width - VECSZ;
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2017-12-15 05:00:35 +08:00
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}
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2018-09-07 00:36:59 +08:00
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_Twvec v0, v1;
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vx_load_pair_as(src + j, v0, v1);
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v_store_pair_as(dst + j, v0, v1);
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2015-01-12 15:59:29 +08:00
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}
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2018-09-07 00:36:59 +08:00
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#endif
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for( ; j < size.width; j++ )
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dst[j] = saturate_cast<_Td>(src[j]);
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2015-01-12 15:59:29 +08:00
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}
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2018-09-07 00:36:59 +08:00
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}
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2015-01-12 15:59:29 +08:00
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2018-09-07 00:36:59 +08:00
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// in order to reduce the code size, for (16f <-> ...) conversions
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// we add a conversion function without loop unrolling
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2019-02-08 22:37:59 +08:00
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template<typename _Ts, typename _Td, typename _Twvec> static inline void
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2018-09-07 00:36:59 +08:00
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cvt1_( const _Ts* src, size_t sstep, _Td* dst, size_t dstep, Size size )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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sstep /= sizeof(src[0]);
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dstep /= sizeof(dst[0]);
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2015-01-12 15:59:29 +08:00
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2018-09-07 00:36:59 +08:00
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for( int i = 0; i < size.height; i++, src += sstep, dst += dstep )
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2015-01-12 15:59:29 +08:00
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{
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2018-09-07 00:36:59 +08:00
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int j = 0;
|
Merge pull request #23980 from hanliutong:rewrite-core
Rewrite Universal Intrinsic code by using new API: Core module. #23980
The goal of this PR is to match and modify all SIMD code blocks guarded by `CV_SIMD` macro in the `opencv/modules/core` folder and rewrite them by using the new Universal Intrinsic API.
The patch is almost auto-generated by using the [rewriter](https://github.com/hanliutong/rewriter), related PR #23885.
Most of the files have been rewritten, but I marked this PR as draft because, the `CV_SIMD` macro also exists in the following files, and the reasons why they are not rewrited are:
1. ~~code design for fixed-size SIMD (v_int16x8, v_float32x4, etc.), need to manually rewrite.~~ Rewrited
- ./modules/core/src/stat.simd.hpp
- ./modules/core/src/matrix_transform.cpp
- ./modules/core/src/matmul.simd.hpp
2. Vector types are wrapped in other class/struct, that are not supported by the compiler in variable-length backends. Can not be rewrited directly.
- ./modules/core/src/mathfuncs_core.simd.hpp
```cpp
struct v_atan_f32
{
explicit v_atan_f32(const float& scale)
{
...
}
v_float32 compute(const v_float32& y, const v_float32& x)
{
...
}
...
v_float32 val90; // sizeless type can not used in a class
v_float32 val180;
v_float32 val360;
v_float32 s;
};
```
3. The API interface does not support/does not match
- ./modules/core/src/norm.cpp
Use `v_popcount`, ~~waiting for #23966~~ Fixed
- ./modules/core/src/has_non_zero.simd.hpp
Use illegal Universal Intrinsic API: For float type, there is no logical operation `|`. Further discussion needed
```cpp
/** @brief Bitwise OR
Only for integer types. */
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n> operator|(const v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
template<typename _Tp, int n> CV_INLINE v_reg<_Tp, n>& operator|=(v_reg<_Tp, n>& a, const v_reg<_Tp, n>& b);
```
```cpp
#if CV_SIMD
typedef v_float32 v_type;
const v_type v_zero = vx_setzero_f32();
constexpr const int unrollCount = 8;
int step = v_type::nlanes * unrollCount;
int len0 = len & -step;
const float* srcSimdEnd = src+len0;
int countSIMD = static_cast<int>((srcSimdEnd-src)/step);
while(!res && countSIMD--)
{
v_type v0 = vx_load(src);
src += v_type::nlanes;
v_type v1 = vx_load(src);
src += v_type::nlanes;
....
src += v_type::nlanes;
v0 |= v1; //Illegal ?
....
//res = v_check_any(((v0 | v4) != v_zero));//beware : (NaN != 0) returns "false" since != is mapped to _CMP_NEQ_OQ and not _CMP_NEQ_UQ
res = !v_check_all(((v0 | v4) == v_zero));
}
v_cleanup();
#endif
```
### Pull Request Readiness Checklist
See details at https://github.com/opencv/opencv/wiki/How_to_contribute#making-a-good-pull-request
- [ ] I agree to contribute to the project under Apache 2 License.
- [ ] To the best of my knowledge, the proposed patch is not based on a code under GPL or another license that is incompatible with OpenCV
- [ ] The PR is proposed to the proper branch
- [ ] There is a reference to the original bug report and related work
- [ ] There is accuracy test, performance test and test data in opencv_extra repository, if applicable
Patch to opencv_extra has the same branch name.
- [ ] The feature is well documented and sample code can be built with the project CMake
2023-08-11 13:33:33 +08:00
|
|
|
#if (CV_SIMD || CV_SIMD_SCALABLE)
|
|
|
|
const int VECSZ = VTraits<_Twvec>::vlanes();
|
2018-09-07 00:36:59 +08:00
|
|
|
for( ; j < size.width; j += VECSZ )
|
2015-01-12 15:59:29 +08:00
|
|
|
{
|
2018-09-07 00:36:59 +08:00
|
|
|
if( j > size.width - VECSZ )
|
2017-12-15 05:00:35 +08:00
|
|
|
{
|
2018-09-07 00:36:59 +08:00
|
|
|
if( j == 0 || src == (_Ts*)dst )
|
|
|
|
break;
|
|
|
|
j = size.width - VECSZ;
|
2017-12-15 05:00:35 +08:00
|
|
|
}
|
2018-09-07 00:36:59 +08:00
|
|
|
_Twvec v;
|
|
|
|
vx_load_as(src + j, v);
|
|
|
|
v_store_as(dst + j, v);
|
2015-01-12 15:59:29 +08:00
|
|
|
}
|
2018-09-07 00:36:59 +08:00
|
|
|
vx_cleanup();
|
2018-02-06 20:02:51 +08:00
|
|
|
#endif
|
2018-09-07 00:36:59 +08:00
|
|
|
for( ; j < size.width; j++ )
|
|
|
|
dst[j] = saturate_cast<_Td>(src[j]);
|
2018-02-06 20:02:51 +08:00
|
|
|
}
|
2011-04-17 21:14:45 +08:00
|
|
|
}
|
2010-05-12 01:44:00 +08:00
|
|
|
|
2018-09-07 00:36:59 +08:00
|
|
|
static void cvtCopy( const uchar* src, size_t sstep,
|
|
|
|
uchar* dst, size_t dstep, Size size, size_t elemsize)
|
2011-04-17 21:14:45 +08:00
|
|
|
{
|
2018-09-07 00:36:59 +08:00
|
|
|
size_t len = size.width*elemsize;
|
|
|
|
for( int i = 0; i < size.height; i++, src += sstep, dst += dstep )
|
2018-02-06 20:02:51 +08:00
|
|
|
{
|
2018-09-07 00:36:59 +08:00
|
|
|
memcpy( dst, src, len );
|
2018-02-06 20:02:51 +08:00
|
|
|
}
|
|
|
|
}
|
2013-11-28 04:57:36 +08:00
|
|
|
|
2018-09-07 00:36:59 +08:00
|
|
|
#define DEF_CVT_FUNC(suffix, cvtfunc, _Ts, _Td, _Twvec) \
|
2019-06-11 15:06:29 +08:00
|
|
|
static void cvt##suffix(const uchar* src_, size_t sstep, const uchar*, size_t, \
|
|
|
|
uchar* dst_, size_t dstep, Size size, void*) \
|
2019-02-08 22:37:59 +08:00
|
|
|
{ \
|
|
|
|
CV_INSTRUMENT_REGION(); \
|
2019-06-11 15:06:29 +08:00
|
|
|
const _Ts* src = (const _Ts*)src_; \
|
|
|
|
_Td* dst = (_Td*)dst_; \
|
2019-02-08 22:37:59 +08:00
|
|
|
cvtfunc<_Ts, _Td, _Twvec>(src, sstep, dst, dstep, size); \
|
|
|
|
}
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 8u -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(8u8s, cvt_, uchar, schar, v_int16)
|
|
|
|
DEF_CVT_FUNC(8u16u, cvt_, uchar, ushort, v_uint16)
|
|
|
|
DEF_CVT_FUNC(8u16s, cvt_, uchar, short, v_int16)
|
|
|
|
DEF_CVT_FUNC(8u32s, cvt_, uchar, int, v_int32)
|
|
|
|
DEF_CVT_FUNC(8u32f, cvt_, uchar, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(8u64f, cvt_, uchar, double, v_int32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(8u16f, cvt1_, uchar, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 8s -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(8s8u, cvt_, schar, uchar, v_int16)
|
|
|
|
DEF_CVT_FUNC(8s16u, cvt_, schar, ushort, v_uint16)
|
|
|
|
DEF_CVT_FUNC(8s16s, cvt_, schar, short, v_int16)
|
|
|
|
DEF_CVT_FUNC(8s32s, cvt_, schar, int, v_int32)
|
|
|
|
DEF_CVT_FUNC(8s32f, cvt_, schar, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(8s64f, cvt_, schar, double, v_int32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(8s16f, cvt1_, schar, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 16u -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(16u8u, cvt_, ushort, uchar, v_uint16)
|
|
|
|
DEF_CVT_FUNC(16u8s, cvt_, ushort, schar, v_uint16)
|
|
|
|
DEF_CVT_FUNC(16u16s, cvt_, ushort, short, v_int32)
|
|
|
|
DEF_CVT_FUNC(16u32s, cvt_, ushort, int, v_int32)
|
|
|
|
DEF_CVT_FUNC(16u32f, cvt_, ushort, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(16u64f, cvt_, ushort, double, v_int32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(16u16f, cvt1_,ushort, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 16s -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(16s8u, cvt_, short, uchar, v_int16)
|
|
|
|
DEF_CVT_FUNC(16s8s, cvt_, short, schar, v_int16)
|
|
|
|
DEF_CVT_FUNC(16s16u, cvt_, short, ushort, v_int32)
|
|
|
|
DEF_CVT_FUNC(16s32s, cvt_, short, int, v_int32)
|
|
|
|
DEF_CVT_FUNC(16s32f, cvt_, short, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(16s64f, cvt_, short, double, v_int32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(16s16f, cvt1_,short, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 32s -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(32s8u, cvt_, int, uchar, v_int32)
|
|
|
|
DEF_CVT_FUNC(32s8s, cvt_, int, schar, v_int32)
|
|
|
|
DEF_CVT_FUNC(32s16u, cvt_, int, ushort, v_int32)
|
|
|
|
DEF_CVT_FUNC(32s16s, cvt_, int, short, v_int32)
|
|
|
|
DEF_CVT_FUNC(32s32f, cvt_, int, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(32s64f, cvt_, int, double, v_int32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(32s16f, cvt1_,int, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 32f -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(32f8u, cvt_, float, uchar, v_float32)
|
|
|
|
DEF_CVT_FUNC(32f8s, cvt_, float, schar, v_float32)
|
|
|
|
DEF_CVT_FUNC(32f16u, cvt_, float, ushort, v_float32)
|
|
|
|
DEF_CVT_FUNC(32f16s, cvt_, float, short, v_float32)
|
|
|
|
DEF_CVT_FUNC(32f32s, cvt_, float, int, v_float32)
|
|
|
|
DEF_CVT_FUNC(32f64f, cvt_, float, double, v_float32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(32f16f, cvt1_,float, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 64f -> ... ////////////////////////
|
|
|
|
|
|
|
|
DEF_CVT_FUNC(64f8u, cvt_, double, uchar, v_int32)
|
|
|
|
DEF_CVT_FUNC(64f8s, cvt_, double, schar, v_int32)
|
|
|
|
DEF_CVT_FUNC(64f16u, cvt_, double, ushort, v_int32)
|
|
|
|
DEF_CVT_FUNC(64f16s, cvt_, double, short, v_int32)
|
|
|
|
DEF_CVT_FUNC(64f32s, cvt_, double, int, v_int32)
|
|
|
|
DEF_CVT_FUNC(64f32f, cvt_, double, float, v_float32)
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(64f16f, cvt1_,double, hfloat, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
////////////////////// 16f -> ... ////////////////////////
|
|
|
|
|
2024-03-22 04:44:19 +08:00
|
|
|
DEF_CVT_FUNC(16f8u, cvt_, hfloat, uchar, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f8s, cvt_, hfloat, schar, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f16u, cvt1_, hfloat, ushort, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f16s, cvt1_, hfloat, short, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f32s, cvt1_, hfloat, int, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f32f, cvt1_, hfloat, float, v_float32)
|
|
|
|
DEF_CVT_FUNC(16f64f, cvt1_, hfloat, double, v_float32)
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
///////////// "conversion" w/o conversion ///////////////
|
|
|
|
|
2019-06-11 15:06:29 +08:00
|
|
|
static void cvt8u(const uchar* src, size_t sstep, const uchar*, size_t, uchar* dst, size_t dstep, Size size, void*)
|
2019-02-08 22:37:59 +08:00
|
|
|
{ CV_INSTRUMENT_REGION(); cvtCopy(src, sstep, dst, dstep, size, 1); }
|
2018-09-07 00:36:59 +08:00
|
|
|
|
2019-06-11 15:06:29 +08:00
|
|
|
static void cvt16u(const uchar* src, size_t sstep, const uchar*, size_t, uchar* dst, size_t dstep, Size size, void*)
|
2019-02-08 22:37:59 +08:00
|
|
|
{ CV_INSTRUMENT_REGION(); cvtCopy((const uchar*)src, sstep, (uchar*)dst, dstep, size, 2); }
|
2018-09-07 00:36:59 +08:00
|
|
|
|
2019-06-11 15:06:29 +08:00
|
|
|
static void cvt32s(const uchar* src, size_t sstep, const uchar*, size_t, uchar* dst, size_t dstep, Size size, void*)
|
2019-02-08 22:37:59 +08:00
|
|
|
{ CV_INSTRUMENT_REGION(); cvtCopy((const uchar*)src, sstep, (uchar*)dst, dstep, size, 4); }
|
2018-09-07 00:36:59 +08:00
|
|
|
|
2019-06-11 15:06:29 +08:00
|
|
|
static void cvt64s(const uchar* src, size_t sstep, const uchar*, size_t, uchar* dst, size_t dstep, Size size, void*)
|
2019-02-08 22:37:59 +08:00
|
|
|
{ CV_INSTRUMENT_REGION(); cvtCopy((const uchar*)src, sstep, (uchar*)dst, dstep, size, 8); }
|
2018-09-07 00:36:59 +08:00
|
|
|
|
|
|
|
|
|
|
|
/* [TODO] Recover IPP calls
|
2018-02-06 20:02:51 +08:00
|
|
|
#if defined(HAVE_IPP)
|
|
|
|
#define DEF_CVT_FUNC_F(suffix, stype, dtype, ippFavor) \
|
|
|
|
static void cvt##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
|
|
|
|
dtype* dst, size_t dstep, Size size, double*) \
|
|
|
|
{ \
|
|
|
|
CV_IPP_RUN(src && dst, CV_INSTRUMENT_FUN_IPP(ippiConvert_##ippFavor, src, (int)sstep, dst, (int)dstep, ippiSize(size.width, size.height)) >= 0) \
|
|
|
|
cvt_(src, sstep, dst, dstep, size); \
|
2013-11-28 04:57:36 +08:00
|
|
|
}
|
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
#define DEF_CVT_FUNC_F2(suffix, stype, dtype, ippFavor) \
|
|
|
|
static void cvt##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
|
|
|
|
dtype* dst, size_t dstep, Size size, double*) \
|
|
|
|
{ \
|
|
|
|
CV_IPP_RUN(src && dst, CV_INSTRUMENT_FUN_IPP(ippiConvert_##ippFavor, src, (int)sstep, dst, (int)dstep, ippiSize(size.width, size.height), ippRndFinancial, 0) >= 0) \
|
|
|
|
cvt_(src, sstep, dst, dstep, size); \
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
#define DEF_CVT_FUNC_F(suffix, stype, dtype, ippFavor) \
|
|
|
|
static void cvt##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
|
|
|
|
dtype* dst, size_t dstep, Size size, double*) \
|
|
|
|
{ \
|
|
|
|
cvt_(src, sstep, dst, dstep, size); \
|
|
|
|
}
|
|
|
|
#define DEF_CVT_FUNC_F2 DEF_CVT_FUNC_F
|
2014-01-25 01:03:31 +08:00
|
|
|
#endif
|
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
#define DEF_CVT_FUNC(suffix, stype, dtype) \
|
|
|
|
static void cvt##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
|
|
|
|
dtype* dst, size_t dstep, Size size, double*) \
|
|
|
|
{ \
|
|
|
|
cvt_(src, sstep, dst, dstep, size); \
|
|
|
|
}
|
2016-11-02 02:14:21 +08:00
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
#define DEF_CPY_FUNC(suffix, stype) \
|
|
|
|
static void cvt##suffix( const stype* src, size_t sstep, const uchar*, size_t, \
|
|
|
|
stype* dst, size_t dstep, Size size, double*) \
|
|
|
|
{ \
|
|
|
|
cpy_(src, sstep, dst, dstep, size); \
|
2016-11-02 02:14:21 +08:00
|
|
|
}
|
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
DEF_CPY_FUNC(8u, uchar)
|
|
|
|
DEF_CVT_FUNC_F(8s8u, schar, uchar, 8s8u_C1Rs)
|
|
|
|
DEF_CVT_FUNC_F(16u8u, ushort, uchar, 16u8u_C1R)
|
|
|
|
DEF_CVT_FUNC_F(16s8u, short, uchar, 16s8u_C1R)
|
|
|
|
DEF_CVT_FUNC_F(32s8u, int, uchar, 32s8u_C1R)
|
|
|
|
DEF_CVT_FUNC_F2(32f8u, float, uchar, 32f8u_C1RSfs)
|
|
|
|
DEF_CVT_FUNC(64f8u, double, uchar)
|
2014-04-22 23:52:37 +08:00
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
DEF_CVT_FUNC_F2(8u8s, uchar, schar, 8u8s_C1RSfs)
|
|
|
|
DEF_CVT_FUNC_F2(16u8s, ushort, schar, 16u8s_C1RSfs)
|
|
|
|
DEF_CVT_FUNC_F2(16s8s, short, schar, 16s8s_C1RSfs)
|
|
|
|
DEF_CVT_FUNC_F(32s8s, int, schar, 32s8s_C1R)
|
|
|
|
DEF_CVT_FUNC_F2(32f8s, float, schar, 32f8s_C1RSfs)
|
|
|
|
DEF_CVT_FUNC(64f8s, double, schar)
|
2014-04-22 23:52:37 +08:00
|
|
|
|
2018-02-06 20:02:51 +08:00
|
|
|
DEF_CVT_FUNC_F(8u16u, uchar, ushort, 8u16u_C1R)
|
|
|
|
DEF_CVT_FUNC_F(8s16u, schar, ushort, 8s16u_C1Rs)
|
|
|
|
DEF_CPY_FUNC(16u, ushort)
|
|
|
|
DEF_CVT_FUNC_F(16s16u, short, ushort, 16s16u_C1Rs)
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DEF_CVT_FUNC_F2(32s16u, int, ushort, 32s16u_C1RSfs)
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DEF_CVT_FUNC_F2(32f16u, float, ushort, 32f16u_C1RSfs)
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DEF_CVT_FUNC(64f16u, double, ushort)
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2014-04-22 23:52:37 +08:00
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2018-02-06 20:02:51 +08:00
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DEF_CVT_FUNC_F(8u16s, uchar, short, 8u16s_C1R)
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DEF_CVT_FUNC_F(8s16s, schar, short, 8s16s_C1R)
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DEF_CVT_FUNC_F2(16u16s, ushort, short, 16u16s_C1RSfs)
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DEF_CVT_FUNC_F2(32s16s, int, short, 32s16s_C1RSfs)
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DEF_CVT_FUNC(32f16s, float, short)
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DEF_CVT_FUNC(64f16s, double, short)
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2014-04-22 23:52:37 +08:00
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2018-02-06 20:02:51 +08:00
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DEF_CVT_FUNC_F(8u32s, uchar, int, 8u32s_C1R)
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DEF_CVT_FUNC_F(8s32s, schar, int, 8s32s_C1R)
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DEF_CVT_FUNC_F(16u32s, ushort, int, 16u32s_C1R)
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DEF_CVT_FUNC_F(16s32s, short, int, 16s32s_C1R)
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DEF_CPY_FUNC(32s, int)
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DEF_CVT_FUNC_F2(32f32s, float, int, 32f32s_C1RSfs)
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DEF_CVT_FUNC(64f32s, double, int)
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2014-04-22 23:52:37 +08:00
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2018-02-06 20:02:51 +08:00
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DEF_CVT_FUNC_F(8u32f, uchar, float, 8u32f_C1R)
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DEF_CVT_FUNC_F(8s32f, schar, float, 8s32f_C1R)
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DEF_CVT_FUNC_F(16u32f, ushort, float, 16u32f_C1R)
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DEF_CVT_FUNC_F(16s32f, short, float, 16s32f_C1R)
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DEF_CVT_FUNC_F(32s32f, int, float, 32s32f_C1R)
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DEF_CVT_FUNC(64f32f, double, float)
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2014-04-22 23:52:37 +08:00
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2018-02-06 20:02:51 +08:00
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DEF_CVT_FUNC(8u64f, uchar, double)
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DEF_CVT_FUNC(8s64f, schar, double)
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DEF_CVT_FUNC(16u64f, ushort, double)
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DEF_CVT_FUNC(16s64f, short, double)
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DEF_CVT_FUNC(32s64f, int, double)
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DEF_CVT_FUNC(32f64f, float, double)
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DEF_CPY_FUNC(64s, int64)
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2018-09-07 00:36:59 +08:00
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*/
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2014-04-22 23:52:37 +08:00
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2018-02-06 20:02:51 +08:00
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BinaryFunc getConvertFunc(int sdepth, int ddepth)
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{
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static BinaryFunc cvtTab[][8] =
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{
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2017-04-21 19:52:45 +08:00
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{
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2019-06-11 15:06:29 +08:00
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(cvt8u), (cvt8s8u), (cvt16u8u),
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(cvt16s8u), (cvt32s8u), (cvt32f8u),
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(cvt64f8u), (cvt16f8u)
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2018-02-06 20:02:51 +08:00
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},
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{
|
2019-06-11 15:06:29 +08:00
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(cvt8u8s), cvt8u, (cvt16u8s),
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(cvt16s8s), (cvt32s8s), (cvt32f8s),
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(cvt64f8s), (cvt16f8s)
|
2018-02-06 20:02:51 +08:00
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},
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{
|
2019-06-11 15:06:29 +08:00
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(cvt8u16u), (cvt8s16u), cvt16u,
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(cvt16s16u), (cvt32s16u), (cvt32f16u),
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(cvt64f16u), (cvt16f16u)
|
2018-02-06 20:02:51 +08:00
|
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},
|
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|
|
{
|
2019-06-11 15:06:29 +08:00
|
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(cvt8u16s), (cvt8s16s), (cvt16u16s),
|
|
|
|
cvt16u, (cvt32s16s), (cvt32f16s),
|
|
|
|
(cvt64f16s), (cvt16f16s)
|
2018-02-06 20:02:51 +08:00
|
|
|
},
|
|
|
|
{
|
2019-06-11 15:06:29 +08:00
|
|
|
(cvt8u32s), (cvt8s32s), (cvt16u32s),
|
|
|
|
(cvt16s32s), cvt32s, (cvt32f32s),
|
|
|
|
(cvt64f32s), (cvt16f32s)
|
2018-02-06 20:02:51 +08:00
|
|
|
},
|
|
|
|
{
|
2019-06-11 15:06:29 +08:00
|
|
|
(cvt8u32f), (cvt8s32f), (cvt16u32f),
|
|
|
|
(cvt16s32f), (cvt32s32f), cvt32s,
|
|
|
|
(cvt64f32f), (cvt16f32f)
|
2018-02-06 20:02:51 +08:00
|
|
|
},
|
|
|
|
{
|
2019-06-11 15:06:29 +08:00
|
|
|
(cvt8u64f), (cvt8s64f), (cvt16u64f),
|
|
|
|
(cvt16s64f), (cvt32s64f), (cvt32f64f),
|
|
|
|
(cvt64s), (cvt16f64f)
|
2018-02-06 20:02:51 +08:00
|
|
|
},
|
2014-04-22 23:52:37 +08:00
|
|
|
{
|
2019-06-11 15:06:29 +08:00
|
|
|
(cvt8u16f), (cvt8s16f), (cvt16u16f), (cvt16s16f),
|
|
|
|
(cvt32s16f), (cvt32f16f), (cvt64f16f), (cvt16u)
|
2014-04-22 23:52:37 +08:00
|
|
|
}
|
2018-02-06 20:02:51 +08:00
|
|
|
};
|
|
|
|
return cvtTab[CV_MAT_DEPTH(ddepth)][CV_MAT_DEPTH(sdepth)];
|
|
|
|
}
|
2014-04-22 23:52:37 +08:00
|
|
|
|
2019-02-08 22:37:59 +08:00
|
|
|
CV_CPU_OPTIMIZATION_NAMESPACE_END
|
2017-04-21 19:52:45 +08:00
|
|
|
#endif
|
2019-02-08 22:37:59 +08:00
|
|
|
} // namespace
|