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opencv/modules/dnn/test/test_backends.cpp

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OpenCV face detection network test
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// This file is part of OpenCV project.
// It is subject to the license terms in the LICENSE file found in the top-level directory
// of this distribution and at http://opencv.org/license.html.
//
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
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// Copyright (C) 2018-2019, Intel Corporation, all rights reserved.
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// Third party copyrights are property of their respective owners.
#include "test_precomp.hpp"
#include "opencv2/core/ocl.hpp"
ts: refactor OpenCV tests - removed tr1 usage (dropped in C++17) - moved includes of vector/map/iostream/limits into ts.hpp - require opencv_test + anonymous namespace (added compile check) - fixed norm() usage (must be from cvtest::norm for checks) and other conflict functions - added missing license headers
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namespace opencv_test { namespace {
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Enable more deep learning tests
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class DNNTestNetwork : public DNNTestLayer
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{
public:
void processNet(const std::string& weights, const std::string& proto,
Enable some tests for clDNN plugin from Intel's Inference Engine
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Size inpSize, const std::string& outputLayer = "",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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const std::string& halideScheduler = "",
Enable some tests for clDNN plugin from Intel's Inference Engine
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double l1 = 0.0, double lInf = 0.0)
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{
// Create a common input blob.
int blobSize[] = {1, 3, inpSize.height, inpSize.width};
Mat inp(4, blobSize, CV_32FC1);
randu(inp, 0.0f, 1.0f);
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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processNet(weights, proto, inp, outputLayer, halideScheduler, l1, lInf);
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}
void processNet(std::string weights, std::string proto,
Enable some tests for clDNN plugin from Intel's Inference Engine
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Mat inp, const std::string& outputLayer = "",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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std::string halideScheduler = "",
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
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double l1 = 0.0, double lInf = 0.0, double detectionConfThresh = 0.2)
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{
Enable more deep learning tests
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checkBackend();
l1 = l1 ? l1 : default_l1;
lInf = lInf ? lInf : default_lInf;
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weights = findDataFile(weights, false);
if (!proto.empty())
test: fix usage of findDataFile() misused 'optional' mode
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proto = findDataFile(proto);
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// Create two networks - with default backend and target and a tested one.
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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Net netDefault = readNet(weights, proto);
Make Intel's Inference Engine backend is default if no preferable backend is specified.
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netDefault.setPreferableBackend(DNN_BACKEND_OPENCV);
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netDefault.setInput(inp);
Mat outDefault = netDefault.forward(outputLayer).clone();
Check if Inference Engine networks are fully supported by backend
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net = readNet(weights, proto);
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net.setInput(inp);
net.setPreferableBackend(backend);
net.setPreferableTarget(target);
if (backend == DNN_BACKEND_HALIDE && !halideScheduler.empty())
{
test: fix usage of findDataFile() misused 'optional' mode
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halideScheduler = findDataFile(halideScheduler);
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net.setHalideScheduler(halideScheduler);
}
Mat out = net.forward(outputLayer).clone();
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
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check(outDefault, out, outputLayer, l1, lInf, detectionConfThresh, "First run");
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// Test 2: change input.
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float* inpData = (float*)inp.data;
for (int i = 0; i < inp.size[0] * inp.size[1]; ++i)
{
Mat slice(inp.size[2], inp.size[3], CV_32F, inpData);
cv::flip(slice, slice, 1);
inpData += slice.total();
}
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netDefault.setInput(inp);
net.setInput(inp);
outDefault = netDefault.forward(outputLayer).clone();
out = net.forward(outputLayer).clone();
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check(outDefault, out, outputLayer, l1, lInf, detectionConfThresh, "Second run");
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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}
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Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
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void check(Mat& ref, Mat& out, const std::string& outputLayer, double l1, double lInf,
double detectionConfThresh, const char* msg)
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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{
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if (outputLayer == "detection_out")
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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{
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
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if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019)
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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{
// Inference Engine produces detections terminated by a row which starts from -1.
out = out.reshape(1, out.total() / 7);
int numDetections = 0;
while (numDetections < out.rows && out.at<float>(numDetections, 0) != -1)
{
numDetections += 1;
}
out = out.rowRange(0, numDetections);
}
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
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normAssertDetections(ref, out, msg, detectionConfThresh, l1, lInf);
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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}
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else
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
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normAssert(ref, out, msg, l1, lInf);
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}
Check if Inference Engine networks are fully supported by backend
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Net net;
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};
TEST_P(DNNTestNetwork, AlexNet)
{
dnn(test-tags): add time / memory tags
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applyTestTag(CV_TEST_TAG_MEMORY_1GB);
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processNet("dnn/bvlc_alexnet.caffemodel", "dnn/bvlc_alexnet.prototxt",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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Size(227, 227), "prob",
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target == DNN_TARGET_OPENCL ? "dnn/halide_scheduler_opencl_alexnet.yml" :
"dnn/halide_scheduler_alexnet.yml");
Check if Inference Engine networks are fully supported by backend
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expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
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expectNoFallbacksFromCUDA(net);
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}
TEST_P(DNNTestNetwork, ResNet_50)
{
dnn(test): update test tags for Debug build
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applyTestTag(
(target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_512MB : CV_TEST_TAG_MEMORY_1GB),
CV_TEST_TAG_DEBUG_LONG
);
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processNet("dnn/ResNet-50-model.caffemodel", "dnn/ResNet-50-deploy.prototxt",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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Size(224, 224), "prob",
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target == DNN_TARGET_OPENCL ? "dnn/halide_scheduler_opencl_resnet_50.yml" :
"dnn/halide_scheduler_resnet_50.yml");
Check if Inference Engine networks are fully supported by backend
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expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
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expectNoFallbacksFromCUDA(net);
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}
TEST_P(DNNTestNetwork, SqueezeNet_v1_1)
{
processNet("dnn/squeezenet_v1.1.caffemodel", "dnn/squeezenet_v1.1.prototxt",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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Size(227, 227), "prob",
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target == DNN_TARGET_OPENCL ? "dnn/halide_scheduler_opencl_squeezenet_v1_1.yml" :
"dnn/halide_scheduler_squeezenet_v1_1.yml");
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
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expectNoFallbacksFromCUDA(net);
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}
TEST_P(DNNTestNetwork, GoogLeNet)
{
dnn(test-tags): add time / memory tags
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applyTestTag(target == DNN_TARGET_CPU ? "" : CV_TEST_TAG_MEMORY_512MB);
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processNet("dnn/bvlc_googlenet.caffemodel", "dnn/bvlc_googlenet.prototxt",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
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Size(224, 224), "prob");
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
}
TEST_P(DNNTestNetwork, Inception_5h)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_MEMORY_512MB);
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
double l1 = default_l1, lInf = default_lInf;
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && (target == DNN_TARGET_CPU || target == DNN_TARGET_OPENCL))
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
{
l1 = 1.72e-5;
lInf = 8e-4;
}
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
2018-03-17 00:27:04 +08:00
processNet("dnn/tensorflow_inception_graph.pb", "", Size(224, 224), "softmax2",
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
target == DNN_TARGET_OPENCL ? "dnn/halide_scheduler_opencl_inception_5h.yml" :
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
"dnn/halide_scheduler_inception_5h.yml",
l1, lInf);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
}
TEST_P(DNNTestNetwork, ENet)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(target == DNN_TARGET_CPU ? "" : CV_TEST_TAG_MEMORY_512MB);
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_NN_BUILDER);
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_NGRAPH);
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
if (backend == DNN_BACKEND_OPENCV && target == DNN_TARGET_OPENCL_FP16)
applyTestTag(CV_TEST_TAG_DNN_SKIP_OPENCL_FP16);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
if (backend == DNN_BACKEND_CUDA && target == DNN_TARGET_CUDA_FP16)
applyTestTag(CV_TEST_TAG_DNN_SKIP_CUDA_FP16);
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
2018-03-17 00:27:04 +08:00
processNet("dnn/Enet-model-best.net", "", Size(512, 512), "l367_Deconvolution",
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
target == DNN_TARGET_OPENCL ? "dnn/halide_scheduler_opencl_enet.yml" :
"dnn/halide_scheduler_enet.yml",
2e-5, 0.15);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
}
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
TEST_P(DNNTestNetwork, MobileNet_SSD_Caffe)
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_MEMORY_512MB);
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
2018-05-31 19:05:21 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
Mat inp = blobFromImage(sample, 1.0f / 127.5, Size(300, 300), Scalar(127.5, 127.5, 127.5), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD) ? 1.5e-2 : 0.0;
float iouDiff = (target == DNN_TARGET_MYRIAD) ? 0.063 : 0.0;
Fixed DetectionOutput output blob shape
2019-05-14 17:08:21 +08:00
float detectionConfThresh = (target == DNN_TARGET_MYRIAD) ? 0.252 : FLT_MIN;
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
processNet("dnn/MobileNetSSD_deploy.caffemodel", "dnn/MobileNetSSD_deploy.prototxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff, detectionConfThresh);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
}
Fix change step
2019-02-02 01:23:51 +08:00
TEST_P(DNNTestNetwork, MobileNet_SSD_Caffe_Different_Width_Height)
{
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE)
Disable some tests for Myriad target of nGraph Add lightweight IE hardware targets checks nGraph: Concat with paddings Enable more nGraph tests Restore FP32->FP16 for GPU plugin of IE try to fix buildbot Use lightweight IE targets check only starts from R4
2019-12-24 18:34:33 +08:00
if ((backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 || backend == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH) &&
target == DNN_TARGET_MYRIAD && getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Fix change step
2019-02-02 01:23:51 +08:00
Mat inp = blobFromImage(sample, 1.0f / 127.5, Size(300, 560), Scalar(127.5, 127.5, 127.5), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 0.0, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
scoreDiff = 0.029;
iouDiff = 0.09;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.03;
iouDiff = 0.08;
}
Fix change step
2019-02-02 01:23:51 +08:00
processNet("dnn/MobileNetSSD_deploy.caffemodel", "dnn/MobileNetSSD_deploy.prototxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Fix change step
2019-02-02 01:23:51 +08:00
}
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
TEST_P(DNNTestNetwork, MobileNet_SSD_v1_TensorFlow)
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(target == DNN_TARGET_CPU ? "" : CV_TEST_TAG_MEMORY_512MB);
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
dnn(test): OpenVINO 2019R2
2019-07-25 14:57:49 +08:00
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Include preprocessing nodes to object detection TensorFlow networks (#12211) * Include preprocessing nodes to object detection TensorFlow networks * Enable more fusion * faster_rcnn_resnet50_coco_2018_01_28 test
2018-08-31 20:41:56 +08:00
Mat inp = blobFromImage(sample, 1.0f, Size(300, 300), Scalar(), false);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
float detectionConfThresh = (target == DNN_TARGET_MYRIAD) ? 0.216 : 0.2;
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 0.0, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
scoreDiff = 0.095;
iouDiff = 0.09;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.007;
iouDiff = 0.08;
}
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
processNet("dnn/ssd_mobilenet_v1_coco_2017_11_17.pb", "dnn/ssd_mobilenet_v1_coco_2017_11_17.pbtxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff, detectionConfThresh);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Fix change step
2019-02-02 01:23:51 +08:00
}
TEST_P(DNNTestNetwork, MobileNet_SSD_v1_TensorFlow_Different_Width_Height)
{
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE)
Disable some tests for Myriad target of nGraph Add lightweight IE hardware targets checks nGraph: Concat with paddings Enable more nGraph tests Restore FP32->FP16 for GPU plugin of IE try to fix buildbot Use lightweight IE targets check only starts from R4
2019-12-24 18:34:33 +08:00
if ((backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 || backend == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH) &&
target == DNN_TARGET_MYRIAD && getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
dnn(test): OpenVINO 2019R2
2019-07-25 14:57:49 +08:00
#if defined(INF_ENGINE_RELEASE) && INF_ENGINE_VER_MAJOR_EQ(2019020000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD, CV_TEST_TAG_DNN_SKIP_IE_NN_BUILDER, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
dnn(test): OpenVINO 2019R2
2019-07-25 14:57:49 +08:00
#endif
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Fix change step
2019-02-02 01:23:51 +08:00
Mat inp = blobFromImage(sample, 1.0f, Size(300, 560), Scalar(), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 0.0, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
Merge remote-tracking branch 'upstream/3.4' into merge-3.4
2020-02-27 01:09:03 +08:00
scoreDiff = 0.013;
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
iouDiff = 0.06;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.007;
iouDiff = 0.06;
}
Fix change step
2019-02-02 01:23:51 +08:00
processNet("dnn/ssd_mobilenet_v1_coco_2017_11_17.pb", "dnn/ssd_mobilenet_v1_coco_2017_11_17.pbtxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
}
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
TEST_P(DNNTestNetwork, MobileNet_SSD_v2_TensorFlow)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_512MB : CV_TEST_TAG_MEMORY_1GB);
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
dnn(test): OpenVINO 2019R2
2019-07-25 14:57:49 +08:00
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Include preprocessing nodes to object detection TensorFlow networks (#12211) * Include preprocessing nodes to object detection TensorFlow networks * Enable more fusion * faster_rcnn_resnet50_coco_2018_01_28 test
2018-08-31 20:41:56 +08:00
Mat inp = blobFromImage(sample, 1.0f, Size(300, 300), Scalar(), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 2e-5, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
scoreDiff = 0.013;
iouDiff = 0.062;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.02;
iouDiff = 0.07;
}
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
processNet("dnn/ssd_mobilenet_v2_coco_2018_03_29.pb", "dnn/ssd_mobilenet_v2_coco_2018_03_29.pbtxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff, 0.25);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
}
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
TEST_P(DNNTestNetwork, SSD_VGG16)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_LONG, (target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_1GB : CV_TEST_TAG_MEMORY_2GB),
CV_TEST_TAG_DEBUG_VERYLONG);
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
2018-05-31 19:05:21 +08:00
if (backend == DNN_BACKEND_HALIDE && target == DNN_TARGET_CPU)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE); // TODO HALIDE_CPU
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
2018-05-31 19:05:21 +08:00
Mat inp = blobFromImage(sample, 1.0f, Size(300, 300), Scalar(), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 0.0, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16)
{
scoreDiff = 0.0325;
}
else if (target == DNN_TARGET_MYRIAD)
{
scoreDiff = 0.0325;
iouDiff = 0.032;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.03;
}
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
processNet("dnn/VGG_ILSVRC2016_SSD_300x300_iter_440000.caffemodel",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
"dnn/ssd_vgg16.prototxt", inp, "detection_out", "", scoreDiff, iouDiff);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
}
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
TEST_P(DNNTestNetwork, OpenPose_pose_coco)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_LONG, (target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_1GB : CV_TEST_TAG_MEMORY_2GB),
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
CV_TEST_TAG_DEBUG_LONG);
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE) && INF_ENGINE_VER_MAJOR_LE(2018050000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
&& getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
const float l1 = (target == DNN_TARGET_MYRIAD) ? 0.0056 : 0.0;
const float lInf = (target == DNN_TARGET_MYRIAD) ? 0.072 : 0.0;
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
processNet("dnn/openpose_pose_coco.caffemodel", "dnn/openpose_pose_coco.prototxt",
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
Size(46, 46), "", "", l1, lInf);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
}
TEST_P(DNNTestNetwork, OpenPose_pose_mpi)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_LONG, (target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_1GB : CV_TEST_TAG_MEMORY_2GB),
CV_TEST_TAG_DEBUG_VERYLONG);
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE) && INF_ENGINE_VER_MAJOR_LE(2018050000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
&& getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
Merge pull request #14792 from dkurt:dnn_ie_min_version_r5 * Remove Inference Engine 2018R3 and 2018R4 * Fix 2018R5
2019-06-14 23:17:02 +08:00
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
// output range: [-0.001, 0.97]
const float l1 = (target == DNN_TARGET_MYRIAD) ? 0.012 : 0.0;
const float lInf = (target == DNN_TARGET_MYRIAD || target == DNN_TARGET_OPENCL_FP16) ? 0.16 : 0.0;
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
processNet("dnn/openpose_pose_mpi.caffemodel", "dnn/openpose_pose_mpi.prototxt",
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
Size(46, 46), "", "", l1, lInf);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
}
TEST_P(DNNTestNetwork, OpenPose_pose_mpi_faster_4_stages)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_LONG, CV_TEST_TAG_MEMORY_1GB);
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE) && INF_ENGINE_VER_MAJOR_LE(2018050000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
&& getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
Merge pull request #14792 from dkurt:dnn_ie_min_version_r5 * Remove Inference Engine 2018R3 and 2018R4 * Fix 2018R5
2019-06-14 23:17:02 +08:00
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
// The same .caffemodel but modified .prototxt
// See https://github.com/CMU-Perceptual-Computing-Lab/openpose/blob/master/src/openpose/pose/poseParameters.cpp
processNet("dnn/openpose_pose_mpi.caffemodel", "dnn/openpose_pose_mpi_faster_4_stages.prototxt",
Fix ONNX's emotion_ferplus model. Reduce input size for OpenPose tests
2018-11-23 23:23:27 +08:00
Size(46, 46));
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
}
TEST_P(DNNTestNetwork, OpenFace)
{
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
#if defined(INF_ENGINE_RELEASE)
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if INF_ENGINE_VER_MAJOR_EQ(2018050000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
#endif
Enable more deep learning tests using Intel's Inference Engine backend
2018-08-27 20:45:44 +08:00
#endif
Enable some dnn tests according to the new Intel's Inference Engine release (R4)
2018-11-26 17:09:50 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
const float l1 = (target == DNN_TARGET_MYRIAD) ? 0.0024 : 0.0;
const float lInf = (target == DNN_TARGET_MYRIAD) ? 0.0071 : 0.0;
processNet("dnn/openface_nn4.small2.v1.t7", "", Size(96, 96), "", "", l1, lInf);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
Intel Inference Engine deep learning backend (#10608) * Intel Inference Engine deep learning backend. * OpenFace network using Inference Engine backend
2018-02-06 16:57:35 +08:00
}
OpenCV face detection network using Inference Engine backend
2018-02-06 21:23:18 +08:00
TEST_P(DNNTestNetwork, opencv_face_detector)
{
Update Intel's Inference Engine deep learning backend (#11587) * Update Intel's Inference Engine deep learning backend * Remove cpu_extension dependency * Update Darknet accuracy tests
2018-05-31 19:05:21 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat img = imread(findDataFile("gpu/lbpcascade/er.png"));
Add missing parameter to DetectionOutput layer from Intel's Inference Engine
2018-07-31 16:37:45 +08:00
Mat inp = blobFromImage(img, 1.0, Size(), Scalar(104.0, 177.0, 123.0), false, false);
OpenCV face detection network using Inference Engine backend
2018-02-06 21:23:18 +08:00
processNet("dnn/opencv_face_detector.caffemodel", "dnn/opencv_face_detector.prototxt",
Load networks from intermediate representation of Intel's Deep learning deployment toolkit.
2018-03-17 00:27:04 +08:00
inp, "detection_out");
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
OpenCV face detection network using Inference Engine backend
2018-02-06 21:23:18 +08:00
}
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
TEST_P(DNNTestNetwork, Inception_v2_SSD_TensorFlow)
{
dnn(test): update test tags for Debug build
2019-05-27 20:14:18 +08:00
applyTestTag(
(target == DNN_TARGET_CPU ? CV_TEST_TAG_MEMORY_512MB : CV_TEST_TAG_MEMORY_1GB),
CV_TEST_TAG_DEBUG_LONG
);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#if defined(INF_ENGINE_RELEASE)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
&& getInferenceEngineVPUType() == CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD_X);
dnn(test): OpenVINO 2019R2
2019-07-25 14:57:49 +08:00
#endif
#if defined(INF_ENGINE_RELEASE) && INF_ENGINE_VER_MAJOR_EQ(2019020000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD, CV_TEST_TAG_DNN_SKIP_IE_NN_BUILDER, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
#endif
Enable SSD models from TensorFlow with OpenCL plugin of Intel's Inference Engine
2018-06-08 21:55:21 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat sample = imread(findDataFile("dnn/street.png"));
Include preprocessing nodes to object detection TensorFlow networks (#12211) * Include preprocessing nodes to object detection TensorFlow networks * Enable more fusion * faster_rcnn_resnet50_coco_2018_01_28 test
2018-08-31 20:41:56 +08:00
Mat inp = blobFromImage(sample, 1.0f, Size(300, 300), Scalar(), false);
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float scoreDiff = 0.0, iouDiff = 0.0;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
scoreDiff = 0.015;
iouDiff = 0.0731;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
scoreDiff = 0.015;
iouDiff = 0.08;
}
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
processNet("dnn/ssd_inception_v2_coco_2017_11_17.pb", "dnn/ssd_inception_v2_coco_2017_11_17.pbtxt",
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
inp, "detection_out", "", scoreDiff, iouDiff);
Check if Inference Engine networks are fully supported by backend
2019-04-19 19:54:08 +08:00
expectNoFallbacksFromIE(net);
MobileNet-SSD from TensorFlow 1.3 and Inception-V2-SSD using Inference Engine backend
2018-02-07 16:28:45 +08:00
}
OpenCL GPU target for Inference Engine deep learning backend Enable FP16 GPU target for DL Inference Engine backend.
2018-03-12 22:35:28 +08:00
TEST_P(DNNTestNetwork, DenseNet_121)
{
dnn(test-tags): add time / memory tags
2018-10-09 06:38:06 +08:00
applyTestTag(CV_TEST_TAG_MEMORY_512MB);
Enable more deep learning tests using Intel's Inference Engine backend
2018-08-27 20:45:44 +08:00
if (backend == DNN_BACKEND_HALIDE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #13932 from l-bat:MyriadX_master_dldt * Fix precision in tests for MyriadX * Fix ONNX tests * Add output range in ONNX tests * Skip tests on Myriad OpenVINO 2018R5 * Add detect MyriadX * Add detect MyriadX on OpenVINO R5 * Skip tests on Myriad next version of OpenVINO * dnn(ie): VPU type from environment variable * dnn(test): validate VPU type * dnn(test): update DLIE test skip conditions
2019-03-29 21:42:58 +08:00
// Reference output values are in range [-3.807, 4.605]
Enable more deep learning tests using Intel's Inference Engine backend
2018-08-27 20:45:44 +08:00
float l1 = 0.0, lInf = 0.0;
if (target == DNN_TARGET_OPENCL_FP16)
{
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
l1 = 2e-2;
lInf = 9e-2;
dnn(test): adjust tests for OpenVINO 2020.4
2020-07-16 06:52:08 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH)
lInf = 0.1f;
Enable more deep learning tests using Intel's Inference Engine backend
2018-08-27 20:45:44 +08:00
}
else if (target == DNN_TARGET_MYRIAD)
{
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
l1 = 0.1;
lInf = 0.6;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
l1 = 0.008;
lInf = 0.05;
Enable more deep learning tests using Intel's Inference Engine backend
2018-08-27 20:45:44 +08:00
}
processNet("dnn/DenseNet_121.caffemodel", "dnn/DenseNet_121.prototxt", Size(224, 224), "", "", l1, lInf);
Enable some tests for Inference Engine backend
2019-06-25 02:55:32 +08:00
if (target != DNN_TARGET_MYRIAD || getInferenceEngineVPUType() != CV_DNN_INFERENCE_ENGINE_VPU_TYPE_MYRIAD_X)
expectNoFallbacksFromIE(net);
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
OpenCL GPU target for Inference Engine deep learning backend Enable FP16 GPU target for DL Inference Engine backend.
2018-03-12 22:35:28 +08:00
}
Enable FastNeuralStyle and OpenFace networks with IE backend
2018-06-09 20:37:04 +08:00
TEST_P(DNNTestNetwork, FastNeuralStyle_eccv16)
{
dnn(test): update test tags for Debug build
2019-05-27 20:14:18 +08:00
applyTestTag(CV_TEST_TAG_MEMORY_512MB, CV_TEST_TAG_DEBUG_VERYLONG);
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
if (backend == DNN_BACKEND_HALIDE)
applyTestTag(CV_TEST_TAG_DNN_SKIP_HALIDE);
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_MYRIAD)
dnn(test): skip failed ngraph tests
2020-02-07 21:40:50 +08:00
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD, CV_TEST_TAG_DNN_SKIP_IE_NN_BUILDER);
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NGRAPH && target == DNN_TARGET_MYRIAD)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_MYRIAD, CV_TEST_TAG_DNN_SKIP_IE_NGRAPH);
Added optimization fuse
2019-02-08 22:12:33 +08:00
#if defined(INF_ENGINE_RELEASE)
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
#if INF_ENGINE_VER_MAJOR_LE(2018050000)
Merge pull request #15537 from l-bat:ngraph * Support nGraph * Fix resize
2019-12-02 21:16:06 +08:00
if (backend == DNN_BACKEND_INFERENCE_ENGINE_NN_BUILDER_2019 && target == DNN_TARGET_OPENCL)
applyTestTag(CV_TEST_TAG_DNN_SKIP_IE_OPENCL, CV_TEST_TAG_DNN_SKIP_IE_VERSION);
Added optimization fuse
2019-02-08 22:12:33 +08:00
#endif
#endif
test: fix usage of findDataFile() misused 'optional' mode
2019-06-20 21:43:28 +08:00
Mat img = imread(findDataFile("dnn/googlenet_1.png"));
Enable FastNeuralStyle and OpenFace networks with IE backend
2018-06-09 20:37:04 +08:00
Mat inp = blobFromImage(img, 1.0, Size(320, 240), Scalar(103.939, 116.779, 123.68), false, false);
// Output image has values in range [-143.526, 148.539].
Merge pull request #16010 from YashasSamaga:cuda4dnn-fp16-tests * enable tests for DNN_TARGET_CUDA_FP16 * disable deconvolution tests * disable shortcut tests * fix typos and some minor changes * dnn(test): skip CUDA FP16 test too (run_pool_max)
2019-12-20 21:36:32 +08:00
float l1 = 4e-5, lInf = 2e-3;
if (target == DNN_TARGET_OPENCL_FP16 || target == DNN_TARGET_MYRIAD)
{
l1 = 0.4;
lInf = 7.45;
}
else if (target == DNN_TARGET_CUDA_FP16)
{
l1 = 0.3;
lInf = 7.2;
}
Enable FastNeuralStyle and OpenFace networks with IE backend
2018-06-09 20:37:04 +08:00
processNet("dnn/fast_neural_style_eccv16_starry_night.t7", "", inp, "", "", l1, lInf);
dnn(test): replace SkipTestException with tags
2019-06-15 20:17:25 +08:00
#if defined(HAVE_INF_ENGINE) && INF_ENGINE_VER_MAJOR_GE(2019010000)
Enable more deconvolution layer configurations with IE backend
2019-05-28 23:24:25 +08:00
expectNoFallbacksFromIE(net);
Merge pull request #14792 from dkurt:dnn_ie_min_version_r5 * Remove Inference Engine 2018R3 and 2018R4 * Fix 2018R5
2019-06-14 23:17:02 +08:00
#endif
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
expectNoFallbacksFromCUDA(net);
Enable FastNeuralStyle and OpenFace networks with IE backend
2018-06-09 20:37:04 +08:00
}
Merge pull request #14827 from YashasSamaga:cuda4dnn-csl-low CUDA backend for the DNN module * stub cuda4dnn design * minor fixes for tests and doxygen * add csl public api directory to module headers * add low-level CSL components * add high-level CSL components * integrate csl::Tensor into backbone code * switch to CPU iff unsupported; otherwise, fail on error * add fully connected layer * add softmax layer * add activation layers * support arbitary rank TensorDescriptor * pass input wrappers to `initCUDA()` * add 1d/2d/3d-convolution * add pooling layer * reorganize and refactor code * fixes for gcc, clang and doxygen; remove cxx14/17 code * add blank_layer * add LRN layer * add rounding modes for pooling layer * split tensor.hpp into tensor.hpp and tensor_ops.hpp * add concat layer * add scale layer * add batch normalization layer * split math.cu into activations.cu and math.hpp * add eltwise layer * add flatten layer * add tensor transform api * add asymmetric padding support for convolution layer * add reshape layer * fix rebase issues * add permute layer * add padding support for concat layer * refactor and reorganize code * add normalize layer * optimize bias addition in scale layer * add prior box layer * fix and optimize normalize layer * add asymmetric padding support for pooling layer * add event API * improve pooling performance for some padding scenarios * avoid over-allocation of compute resources to kernels * improve prior box performance * enable layer fusion * add const layer * add resize layer * add slice layer * add padding layer * add deconvolution layer * fix channelwise ReLU initialization * add vector traits * add vectorized versions of relu, clipped_relu, power * add vectorized concat kernels * improve concat_with_offsets performance * vectorize scale and bias kernels * add support for multi-billion element tensors * vectorize prior box kernels * fix address alignment check * improve bias addition performance of conv/deconv/fc layers * restructure code for supporting multiple targets * add DNN_TARGET_CUDA_FP64 * add DNN_TARGET_FP16 * improve vectorization * add region layer * improve tensor API, add dynamic ranks 1. use ManagedPtr instead of a Tensor in backend wrapper 2. add new methods to tensor classes - size_range: computes the combined size of for a given axis range - tensor span/view can be constructed from a raw pointer and shape 3. the tensor classes can change their rank at runtime (previously rank was fixed at compile-time) 4. remove device code from tensor classes (as they are unused) 5. enforce strict conditions on tensor class APIs to improve debugging ability * fix parametric relu activation * add squeeze/unsqueeze tensor API * add reorg layer * optimize permute and enable 2d permute * enable 1d and 2d slice * add split layer * add shuffle channel layer * allow tensors of different ranks in reshape primitive * patch SliceOp to allow Crop Layer * allow extra shape inputs in reshape layer * use `std::move_backward` instead of `std::move` for insert in resizable_static_array * improve workspace management * add spatial LRN * add nms (cpu) to region layer * add max pooling with argmax ( and a fix to limits.hpp) * add max unpooling layer * rename DNN_TARGET_CUDA_FP32 to DNN_TARGET_CUDA * update supportBackend to be more rigorous * remove stray include from preventing non-cuda build * include op_cuda.hpp outside condition #if * refactoring, fixes and many optimizations * drop DNN_TARGET_CUDA_FP64 * fix gcc errors * increase max. tensor rank limit to six * add Interp layer * drop custom layers; use BackendNode * vectorize activation kernels * fixes for gcc * remove wrong assertion * fix broken assertion in unpooling primitive * fix build errors in non-CUDA build * completely remove workspace from public API * fix permute layer * enable accuracy and perf. tests for DNN_TARGET_CUDA * add asynchronous forward * vectorize eltwise ops * vectorize fill kernel * fixes for gcc * remove CSL headers from public API * remove csl header source group from cmake * update min. cudnn version in cmake * add numerically stable FP32 log1pexp * refactor code * add FP16 specialization to cudnn based tensor addition * vectorize scale1 and bias1 + minor refactoring * fix doxygen build * fix invalid alignment assertion * clear backend wrappers before allocateLayers * ignore memory lock failures * do not allocate internal blobs * integrate NVTX * add numerically stable half precision log1pexp * fix indentation, following coding style, improve docs * remove accidental modification of IE code * Revert "add asynchronous forward" This reverts commit 1154b9da9da07e9b52f8a81bdcea48cf31c56f70. * [cmake] throw error for unsupported CC versions * fix rebase issues * add more docs, refactor code, fix bugs * minor refactoring and fixes * resolve warnings/errors from clang * remove haveCUDA() checks from supportBackend() * remove NVTX integration * changes based on review comments * avoid exception when no CUDA device is present * add color code for CUDA in Net::dump
2019-10-21 19:28:00 +08:00
INSTANTIATE_TEST_CASE_P(/*nothing*/, DNNTestNetwork, dnnBackendsAndTargets(true, true, false, true, true));
OpenCV face detection network test
2018-01-21 02:55:25 +08:00
ts: refactor OpenCV tests - removed tr1 usage (dropped in C++17) - moved includes of vector/map/iostream/limits into ts.hpp - require opencv_test + anonymous namespace (added compile check) - fixed norm() usage (must be from cvtest::norm for checks) and other conflict functions - added missing license headers
2017-11-05 21:48:40 +08:00
}} // namespace
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